Searched defs:NewSrc (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 934 TargetInstrInfo::RegSubRegPair NewSrc = variable
944 .addReg(NewSrc.Reg, 0, NewSrc.SubReg);
956 // We extended the lifetime of NewSrc.Reg, clear the kill flags to
958 MRI.clearKillFlags(NewSrc.Reg);
1213 TargetInstrInfo::RegSubRegPair NewSrc = CpyRewriter->getNewSource( local
1215 if (SrcReg == NewSrc.Reg || NewSrc.Reg == 0)
1219 if (CpyRewriter->RewriteCurrentSource(NewSrc.Reg, NewSrc
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceInst.cpp | 465 Variable *NewSrc = Func->makeVariable(Dest->getType()); local
467 NewSrc->setName(Func, Dest->getName() + "_phi");
468 if (auto *NewSrc64On32 = llvm::dyn_cast<Variable64On32>(NewSrc))
470 this->Dest = NewSrc;
471 return InstAssign::create(Func, Dest, NewSrc);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1306 SDValue NewSrc = local
1309 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl);
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| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 2566 unsigned Opc, bool AllowSP, unsigned &NewSrc,
2582 NewSrc = SrcReg;
2586 if (TargetRegisterInfo::isVirtualRegister(NewSrc) &&
2587 !MF.getRegInfo().constrainRegClass(NewSrc, RC))
2599 NewSrc = getX86SubSuperRegister(Src.getReg(), 64);
2601 MI.getParent()->computeRegisterLiveness(&getRegisterInfo(), NewSrc, MI);
2621 NewSrc = MF.getRegInfo().createVirtualRegister(RC);
2623 .addReg(NewSrc, RegState::Define | RegState::Undef, X86::sub_32bit)
2565 classifyLEAReg(MachineInstr &MI, const MachineOperand &Src, unsigned Opc, bool AllowSP, unsigned &NewSrc, bool &isKill, bool &isUndef, MachineOperand &ImplicitOp) const argument
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