/external/llvm/lib/MC/ |
H A D | MCFragment.cpp | 79 assert(F->Offset != ~UINT64_C(0) && "Address not set!"); 80 return F->Offset; 107 uint64_t Offset = Target.getConstant(); local 114 Offset += ValA; 122 Offset -= ValB; 125 Val = Offset; 248 Offset(~UINT64_C(0)) { 310 OS << "<MCFixup" << " Offset:" << AF.getOffset() 341 << " Offset:" << Offset [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64BranchRelaxation.cpp | 59 /// Offset - Distance from the beginning of the function to the beginning 63 unsigned Offset; member in struct:__anon12925::AArch64BranchRelaxation::BasicBlockInfo 72 BasicBlockInfo() : Offset(0), Size(0) {} 78 unsigned PO = Offset + Size; 125 assert(BlockInfo[Num].Offset % (1u << Align) == 0); 126 assert(!Num || BlockInfo[PrevNum].postOffset() <= BlockInfo[Num].Offset); 136 dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset) 193 unsigned Offset = BlockInfo[MBB->getNumber()].Offset; local 198 Offset [all...] |
H A D | AArch64RegisterInfo.cpp | 254 int64_t Offset) const { 283 int64_t FPOffset = Offset - 16 * 20; 288 Offset += MFI->getLocalFrameSize(); 292 Offset += 128; // 128 bytes of spill slots 306 if (isFrameOffsetLegal(MI, AArch64::SP, Offset)) 315 int64_t Offset) const { 316 assert(Offset <= INT_MAX && "Offset too big to fit in int."); 318 int SaveOffset = Offset; 327 int64_t Offset) cons 377 int Offset; local [all...] |
/external/llvm/lib/Target/AMDGPU/ |
H A D | R600OptimizeVectorRegisters.cpp | 250 unsigned Offset; local 252 Offset = 2; 254 Offset = 3; 256 unsigned Swizzle = MI.getOperand(i + Offset).getImm() + 1; 259 MI.getOperand(i + Offset).setImm(RemapChan[j].second - 1);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMachObjectWriter.cpp | 389 uint32_t Offset = Target.getConstant(); local 391 Offset += 1 << Log2Size; 392 if (Offset && A && !Writer->doesSymbolRequireExternRelocation(*A) &&
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H A D | ARMTargetStreamer.cpp | 53 int64_t Offset) {} 54 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {} argument 55 void ARMTargetStreamer::emitPad(int64_t Offset) {} argument 52 emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset) argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 176 int Offset = HFI.getFrameIndexReference(MF, FI, BP); local 178 int RealOffset = Offset + MI.getOperand(FIOp+1).getImm();
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonAsmBackend.cpp | 417 uint32_t Offset = Fixup.getOffset(); variable 419 assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!"); 420 char *InstAddr = Data + Offset; 503 ": Offset=" << Offset <<
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/external/llvm/lib/Target/Lanai/Disassembler/ |
H A D | LanaiDisassembler.cpp | 179 unsigned Offset = (Insn & 0xffff); local 180 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); 203 unsigned Offset = (Insn & 0x3ff); local 204 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); 210 uint64_t Address, uint64_t Offset, 214 return Dis->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, 228 unsigned Offset = (Insn & 0xffff); local 229 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); 209 tryAddingSymbolicOperand(int64_t Value, bool IsBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder) argument
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/external/llvm/lib/Target/Lanai/ |
H A D | LanaiMemAluCombiner.cpp | 288 const MachineOperand &Offset) { 308 if (Offset.isReg() && Offset.getReg() == Lanai::R0) 311 if (Offset.isImm() && 312 ((Offset.getImm() == 0 && 317 Offset.getImm() == Op2.getImm())) 320 // The Offset and 2nd operand are both registers and equal 321 if (Offset.isReg() && Op2.getReg() == Offset.getReg()) 333 MachineOperand *Offset local 286 isSuitableAluInstr(bool IsSpls, const MbbIterator &AluIter, const MachineOperand &Base, const MachineOperand &Offset) argument [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 222 uint64_t Offset = CN->getSExtValue(); local 229 AM.Disp += Offset;
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/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelDAGToDAG.cpp | 99 SDValue &Offset) { 107 Offset = CurDAG->getTargetConstant(0, DL, ValTy); 114 Offset = Addr.getOperand(1); 131 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), DL, ValTy); 137 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), DL, ValTy); 157 Offset = Opnd0; 163 Offset = CurDAG->getTargetConstant(0, DL, ValTy); 168 SDValue &Offset) { 169 return selectAddr(false, Addr, Base, Offset); 173 SDValue &Offset) { 98 selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base, SDValue &Offset) argument 167 selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset) argument 172 selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset) argument [all...] |
H A D | MipsISelDAGToDAG.cpp | 70 SDValue &Offset) const { 76 SDValue &Offset) const { 82 SDValue &Offset) const { 88 SDValue &Offset) const { 94 SDValue &Offset) const { 100 SDValue &Offset) const { 106 SDValue &Offset) const { 112 SDValue &Offset) const { 118 SDValue &Offset) { 124 SDValue &Offset) { 117 selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset) argument 123 selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset) argument [all...] |
H A D | MipsLongBranch.cpp | 196 int64_t Offset = 0; local 203 Offset += MBBInfos[N].Size; 205 return Offset + 4; 210 Offset += MBBInfos[N].Size; 212 return -Offset + 4; 494 int64_t Offset = computeOffset(I->Br) / ShVal; local 501 Offset *= 2; 505 if (!ForceLongBranch && isInt<16>(Offset))
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCLoopPreIncPrep.cpp | 107 BucketElement(const SCEVConstant *O, Instruction *I) : Offset(O), Instr(I) {} 108 BucketElement(Instruction *I) : Offset(nullptr), Instr(I) {} 110 const SCEVConstant *Offset; member in struct:__anon13252::BucketElement 285 if (!Buckets[i].Elements[j].Offset || 286 Buckets[i].Elements[j].Offset->isZero()) 289 const SCEV *Offset = Buckets[i].Elements[j].Offset; local 290 Buckets[i].BaseSCEV = SE->getAddExpr(Buckets[i].BaseSCEV, Offset); 292 if (E.Offset) 293 E.Offset [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 48 bool SelectADDRri(SDValue N, SDValue &Base, SDValue &Offset); 77 SDValue &Base, SDValue &Offset) { 81 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32); 100 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Addr), 107 Offset = Addr.getOperand(0).getOperand(0); 112 Offset = Addr.getOperand(1).getOperand(0); 117 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32); 76 SelectADDRri(SDValue Addr, SDValue &Base, SDValue &Offset) argument
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/external/llvm/lib/Target/ |
H A D | Target.cpp | 132 unsigned long long Offset) { 134 return unwrap(TD)->getStructLayout(STy)->getElementContainingOffset(Offset); 131 LLVMElementAtOffset(LLVMTargetDataRef TD, LLVMTypeRef StructTy, unsigned long long Offset) argument
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MachObjectWriter.cpp | 541 uint32_t Offset = Target.getConstant(); local 543 Offset += 1 << Log2Size; 547 if (Offset && A && !Writer->doesSymbolRequireExternRelocation(*A) &&
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/external/llvm/lib/Target/X86/ |
H A D | X86ExpandPseudo.cpp | 93 int Offset = 0; local 97 Offset = StackAdj-MaxTCDelta; 98 assert(Offset >= 0 && "Offset should never be negative"); 100 if (Offset) { 102 Offset += X86FL->mergeSPUpdates(MBB, MBBI, true); 103 X86FL->emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true); 148 assert(DestAddr.isReg() && "Offset should be in register!");
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H A D | X86InstrBuilder.h | 127 addOffset(const MachineInstrBuilder &MIB, int Offset) { argument 128 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0); 132 /// [Reg + Offset], i.e., one with no scale or index, but with a 137 unsigned Reg, bool isKill, int Offset) { 138 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset); 177 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) { 188 MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags, 190 return addOffset(MIB.addFrameIndex(FI), Offset) 136 addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset) argument
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H A D | X86RegisterInfo.cpp | 605 int Offset; local 606 Offset = TFI->getFrameIndexReference(MF, FrameIndex, IgnoredFrameReg); 607 FI.ChangeToImmediate(Offset); 637 int64_t Offset = MI.getOperand(FIOperandNum + 1).getImm() + FIOffset; local 638 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); 643 // Offset is a 32-bit integer. 645 int Offset = FIOffset + Imm; local 648 MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset); 650 // Offset is symbolic. This is extremely rare. 651 uint64_t Offset local [all...] |
H A D | X86SelectionDAGInfo.cpp | 179 unsigned Offset = SizeVal - BytesLeft; local 185 DAG.getConstant(Offset, dl, AddrVT)), 189 DstPtrInfo.getWithOffset(Offset)); 265 unsigned Offset = SizeVal - BytesLeft; local 271 DAG.getConstant(Offset, dl, 274 DAG.getConstant(Offset, dl, 278 DstPtrInfo.getWithOffset(Offset), 279 SrcPtrInfo.getWithOffset(Offset)));
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelDAGToDAG.cpp | 65 bool SelectADDRspii(SDValue Addr, SDValue &Base, SDValue &Offset); 88 SDValue &Offset) { 92 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32); 102 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), 87 SelectADDRspii(SDValue Addr, SDValue &Base, SDValue &Offset) argument
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H A D | XCoreRegisterInfo.cpp | 64 unsigned Reg, unsigned FrameReg, int Offset ) { 73 .addImm(Offset) 80 .addImm(Offset) 86 .addImm(Offset); 96 int Offset, RegScavenger *RS ) { 103 TII.loadImmediate(MBB, II, ScratchOffset, Offset); 131 unsigned Reg, int Offset) { 135 bool isU6 = isImmU6(Offset); 142 .addImm(Offset) 149 .addImm(Offset) 93 InsertFPConstInst(MachineBasicBlock::iterator II, const XCoreInstrInfo &TII, unsigned Reg, unsigned FrameReg, int Offset, RegScavenger *RS ) argument 129 InsertSPImmInst(MachineBasicBlock::iterator II, const XCoreInstrInfo &TII, unsigned Reg, int Offset) argument 162 InsertSPConstInst(MachineBasicBlock::iterator II, const XCoreInstrInfo &TII, unsigned Reg, int Offset, RegScavenger *RS ) argument 274 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); local [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | LoadCombine.cpp | 43 APInt Offset; member in struct:__anon13483::PointerOffsetPair 101 POP.Offset = APInt(BitWidth, 0); 105 APInt LastOffset = POP.Offset; 106 if (!GEP->accumulateConstantOffset(DL, POP.Offset)) { 108 POP.Offset = LastOffset; 127 return A.POP.Offset.slt(B.POP.Offset); 150 PrevOffset = L.POP.Offset; 160 if (L.POP.Offset.sgt(PrevEnd)) { 168 if (L.POP.Offset ! [all...] |