1//===-- Mips16ISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips16 ----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Subclass of MipsDAGToDAGISel specialized for mips16.
11//
12//===----------------------------------------------------------------------===//
13
14#include "Mips16ISelDAGToDAG.h"
15#include "MCTargetDesc/MipsBaseInfo.h"
16#include "Mips.h"
17#include "MipsMachineFunction.h"
18#include "MipsRegisterInfo.h"
19#include "llvm/CodeGen/MachineConstantPool.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineInstrBuilder.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/CodeGen/SelectionDAGNodes.h"
25#include "llvm/IR/CFG.h"
26#include "llvm/IR/GlobalValue.h"
27#include "llvm/IR/Instructions.h"
28#include "llvm/IR/Intrinsics.h"
29#include "llvm/IR/Type.h"
30#include "llvm/Support/Debug.h"
31#include "llvm/Support/ErrorHandling.h"
32#include "llvm/Support/raw_ostream.h"
33#include "llvm/Target/TargetMachine.h"
34using namespace llvm;
35
36#define DEBUG_TYPE "mips-isel"
37
38bool Mips16DAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
39  Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
40  if (!Subtarget->inMips16Mode())
41    return false;
42  return MipsDAGToDAGISel::runOnMachineFunction(MF);
43}
44/// Select multiply instructions.
45std::pair<SDNode *, SDNode *>
46Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, const SDLoc &DL, EVT Ty,
47                               bool HasLo, bool HasHi) {
48  SDNode *Lo = nullptr, *Hi = nullptr;
49  SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
50                                       N->getOperand(1));
51  SDValue InFlag = SDValue(Mul, 0);
52
53  if (HasLo) {
54    unsigned Opcode = Mips::Mflo16;
55    Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
56    InFlag = SDValue(Lo, 1);
57  }
58  if (HasHi) {
59    unsigned Opcode = Mips::Mfhi16;
60    Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
61  }
62  return std::make_pair(Lo, Hi);
63}
64
65void Mips16DAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
66  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
67
68  if (!MipsFI->globalBaseRegSet())
69    return;
70
71  MachineBasicBlock &MBB = MF.front();
72  MachineBasicBlock::iterator I = MBB.begin();
73  MachineRegisterInfo &RegInfo = MF.getRegInfo();
74  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
75  DebugLoc DL;
76  unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg();
77  const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
78
79  V0 = RegInfo.createVirtualRegister(RC);
80  V1 = RegInfo.createVirtualRegister(RC);
81  V2 = RegInfo.createVirtualRegister(RC);
82
83  BuildMI(MBB, I, DL, TII.get(Mips::GotPrologue16), V0)
84      .addReg(V1, RegState::Define)
85      .addExternalSymbol("_gp_disp", MipsII::MO_ABS_HI)
86      .addExternalSymbol("_gp_disp", MipsII::MO_ABS_LO);
87
88  BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
89  BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
90      .addReg(V1)
91      .addReg(V2);
92}
93
94void Mips16DAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) {
95  initGlobalBaseReg(MF);
96}
97
98bool Mips16DAGToDAGISel::selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base,
99                                    SDValue &Offset) {
100  SDLoc DL(Addr);
101  EVT ValTy = Addr.getValueType();
102
103  // if Address is FI, get the TargetFrameIndex.
104  if (SPAllowed) {
105    if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
106      Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
107      Offset = CurDAG->getTargetConstant(0, DL, ValTy);
108      return true;
109    }
110  }
111  // on PIC code Load GA
112  if (Addr.getOpcode() == MipsISD::Wrapper) {
113    Base = Addr.getOperand(0);
114    Offset = Addr.getOperand(1);
115    return true;
116  }
117  if (!TM.isPositionIndependent()) {
118    if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
119         Addr.getOpcode() == ISD::TargetGlobalAddress))
120      return false;
121  }
122  // Addresses of the form FI+const or FI|const
123  if (CurDAG->isBaseWithConstantOffset(Addr)) {
124    ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
125    if (isInt<16>(CN->getSExtValue())) {
126      // If the first operand is a FI, get the TargetFI Node
127      if (SPAllowed) {
128        if (FrameIndexSDNode *FIN =
129                dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
130          Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
131          Offset = CurDAG->getTargetConstant(CN->getZExtValue(), DL, ValTy);
132          return true;
133        }
134      }
135
136      Base = Addr.getOperand(0);
137      Offset = CurDAG->getTargetConstant(CN->getZExtValue(), DL, ValTy);
138      return true;
139    }
140  }
141  // Operand is a result from an ADD.
142  if (Addr.getOpcode() == ISD::ADD) {
143    // When loading from constant pools, load the lower address part in
144    // the instruction itself. Example, instead of:
145    //  lui $2, %hi($CPI1_0)
146    //  addiu $2, $2, %lo($CPI1_0)
147    //  lwc1 $f0, 0($2)
148    // Generate:
149    //  lui $2, %hi($CPI1_0)
150    //  lwc1 $f0, %lo($CPI1_0)($2)
151    if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
152        Addr.getOperand(1).getOpcode() == MipsISD::GPRel) {
153      SDValue Opnd0 = Addr.getOperand(1).getOperand(0);
154      if (isa<ConstantPoolSDNode>(Opnd0) || isa<GlobalAddressSDNode>(Opnd0) ||
155          isa<JumpTableSDNode>(Opnd0)) {
156        Base = Addr.getOperand(0);
157        Offset = Opnd0;
158        return true;
159      }
160    }
161  }
162  Base = Addr;
163  Offset = CurDAG->getTargetConstant(0, DL, ValTy);
164  return true;
165}
166
167bool Mips16DAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base,
168                                      SDValue &Offset) {
169  return selectAddr(false, Addr, Base, Offset);
170}
171
172bool Mips16DAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base,
173                                        SDValue &Offset) {
174  return selectAddr(true, Addr, Base, Offset);
175}
176
177/// Select instructions not customized! Used for
178/// expanded, promoted and normal instructions
179bool Mips16DAGToDAGISel::trySelect(SDNode *Node) {
180  unsigned Opcode = Node->getOpcode();
181  SDLoc DL(Node);
182
183  ///
184  // Instruction Selection not handled by the auto-generated
185  // tablegen selection should be handled here.
186  ///
187  EVT NodeTy = Node->getValueType(0);
188  unsigned MultOpc;
189
190  switch (Opcode) {
191  default:
192    break;
193
194  case ISD::SUBE:
195  case ISD::ADDE: {
196    SDValue InFlag = Node->getOperand(2), CmpLHS;
197    unsigned Opc = InFlag.getOpcode();
198    (void)Opc;
199    assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
200            (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
201           "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
202
203    unsigned MOp;
204    if (Opcode == ISD::ADDE) {
205      CmpLHS = InFlag.getValue(0);
206      MOp = Mips::AdduRxRyRz16;
207    } else {
208      CmpLHS = InFlag.getOperand(0);
209      MOp = Mips::SubuRxRyRz16;
210    }
211
212    SDValue Ops[] = {CmpLHS, InFlag.getOperand(1)};
213
214    SDValue LHS = Node->getOperand(0);
215    SDValue RHS = Node->getOperand(1);
216
217    EVT VT = LHS.getValueType();
218
219    unsigned Sltu_op = Mips::SltuRxRyRz16;
220    SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops);
221    unsigned Addu_op = Mips::AdduRxRyRz16;
222    SDNode *AddCarry =
223        CurDAG->getMachineNode(Addu_op, DL, VT, SDValue(Carry, 0), RHS);
224
225    CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, SDValue(AddCarry, 0));
226    return true;
227  }
228
229  /// Mul with two results
230  case ISD::SMUL_LOHI:
231  case ISD::UMUL_LOHI: {
232    MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
233    std::pair<SDNode *, SDNode *> LoHi =
234        selectMULT(Node, MultOpc, DL, NodeTy, true, true);
235    if (!SDValue(Node, 0).use_empty())
236      ReplaceUses(SDValue(Node, 0), SDValue(LoHi.first, 0));
237
238    if (!SDValue(Node, 1).use_empty())
239      ReplaceUses(SDValue(Node, 1), SDValue(LoHi.second, 0));
240
241    CurDAG->RemoveDeadNode(Node);
242    return true;
243  }
244
245  case ISD::MULHS:
246  case ISD::MULHU: {
247    MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
248    auto LoHi = selectMULT(Node, MultOpc, DL, NodeTy, false, true);
249    ReplaceNode(Node, LoHi.second);
250    return true;
251  }
252  }
253
254  return false;
255}
256
257FunctionPass *llvm::createMips16ISelDag(MipsTargetMachine &TM,
258                                        CodeGenOpt::Level OptLevel) {
259  return new Mips16DAGToDAGISel(TM, OptLevel);
260}
261