Searched defs:Promote (Results 1 - 5 of 5) sorted by relevance

/external/clang/test/SemaTemplate/
H A Dnested-name-spec-template.cpp7 template<typename T> struct Promote;
9 template<> struct Promote<short> { struct in namespace:N::M
13 template<> struct Promote<int> { struct in namespace:N::M
17 template<> struct Promote<float> { struct in namespace:N::M
21 Promote<short>::type *ret_intptr(int* ip) { return ip; }
22 Promote<int>::type *ret_intptr2(int* ip) { return ip; }
25 M::Promote<int>::type *ret_intptr3(int* ip) { return ip; }
26 M::template Promote<int>::type *ret_intptr4(int* ip) { return ip; }
31 M::template Promote<int> pi;
37 N::M::Promote<in
42 N::M::template Promote; // expected-error{{expected unqualified-id}} member in class:N::M
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/external/swiftshader/third_party/LLVM/include/llvm/Target/
H A DTargetLowering.h92 Promote, // This operation should be executed in a larger type. enumerator in enum:llvm::TargetLowering::LegalizeAction
262 /// type (return 'Promote'), or we need to expand it into multiple registers
481 assert(Action != Promote && "Can't promote condition code!");
496 assert(getOperationAction(Op, VT) == Promote &&
514 getOperationAction(Op, NVT) == Promote);
1825 && "Promote may not follow Expand or Promote");
1877 // Promote the integer element types until a legal vector type is found
/external/drm_hwcomposer/
H A Dglworker.cpp712 bool GLWorkerCompositor::CachedFramebuffer::Promote() { function in class:android::GLWorkerCompositor::CachedFramebuffer
733 if (cached_framebuffer->Promote()) {
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp115 SDValue Promote(SDValue Op);
354 case TargetLowering::Promote:
355 Result = Promote(Op);
383 SDValue VectorLegalizer::Promote(SDValue Op) { function in class:__anon12751::VectorLegalizer
389 // "Promote" the operation by extending the operand.
393 // Promote the operation by extending the operand.
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelLowering.cpp116 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
117 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
118 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
300 setOperationAction(ISD::CTLZ , MVT::i8, Promote);
301 setOperationAction(ISD::CTLZ , MVT::i16, Promote);
325 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote);
326 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote);
327 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote);
328 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
343 setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote);
2363 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); local
2380 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); local
2414 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); local
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