Searched defs:src1 (Results 101 - 125 of 234) sorted by relevance

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/external/bison/lib/
H A Debitset.c1029 ebitset_op3_cmp (bitset dst, bitset src1, bitset src2, enum bitset_ops op) argument
1045 ebitset_resize (dst, max (BITSET_NBITS_ (src1), BITSET_NBITS_ (src2)));
1047 ssize1 = EBITSET_SIZE (src1);
1054 selts1 = EBITSET_ELTS (src1);
1177 ebitset_and_cmp (bitset dst, bitset src1, bitset src2) argument
1188 else if (EBITSET_ZERO_P (src1))
1195 return ebitset_op3_cmp (dst, src1, src2, BITSET_OP_AND);
1200 ebitset_and (bitset dst, bitset src1, bitset src2) argument
1202 ebitset_and_cmp (dst, src1, src2);
1207 ebitset_andn_cmp (bitset dst, bitset src1, bitse argument
1227 ebitset_andn(bitset dst, bitset src1, bitset src2) argument
1234 ebitset_or_cmp(bitset dst, bitset src1, bitset src2) argument
1249 ebitset_or(bitset dst, bitset src1, bitset src2) argument
1256 ebitset_xor_cmp(bitset dst, bitset src1, bitset src2) argument
1271 ebitset_xor(bitset dst, bitset src1, bitset src2) argument
[all...]
/external/libvpx/libvpx/vp8/common/mips/msa/
H A Dsixtap_filter_msa.c35 #define HORIZ_6TAP_FILT(src0, src1, mask0, mask1, mask2, filt_h0, filt_h1, \
41 VSHF_B3_SB(src0, src1, src0, src1, src0, src1, mask0, mask1, mask2, \
52 #define HORIZ_6TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
57 VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \
59 VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \
61 VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \
65 #define HORIZ_6TAP_8WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
71 VSHF_B2_SB(src0, src0, src1, src
138 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
164 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
209 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
253 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, filt0, filt1, filt2; local
299 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
344 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10; local
392 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
458 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
530 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
625 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
650 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
695 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
727 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; local
773 v16i8 src0, src1, src2, src3, src4, src5; local
818 v16i8 src0, src1, src2, src7, src8, src9, src10; local
862 v16i8 src0, src1, src2, src3, src4, src5, src6; local
921 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; local
978 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; local
1057 v16i8 src0, src1, src2, src3, src4, src5, src6; local
1120 v16i8 src0, src1, src2, src3, src4, src5, src6; local
1205 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
1267 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
[all...]
/external/libvpx/libvpx/vpx_dsp/mips/
H A Dintrapred_msa.c60 v16u8 src1, src2; local
62 src1 = LD_UB(src);
66 ST_UB2(src1, src2, dst, 16);
105 v16u8 src0, src1, src2, src3; local
115 src1 = (v16u8)__msa_fill_b(inp1);
119 ST_UB4(src0, src1, src2, src3, dst, dst_stride);
128 v16u8 src0, src1, src2, src3; local
138 src1 = (v16u8)__msa_fill_b(inp1);
144 ST_UB2(src1, src1, ds
390 v16u8 src0, src1, src2, src3; local
420 v16u8 src0, src1, src2, src3; local
[all...]
H A Dsad_msa.c27 uint32_t src0, src1, src2, src3, ref0, ref1, ref2, ref3; local
34 LW4(src_ptr, src_stride, src0, src1, src2, src3);
39 INSERT_W4_UB(src0, src1, src2, src3, src);
53 v16u8 src0, src1, src2, src3, ref0, ref1, ref2, ref3; local
57 LD_UB4(src, src_stride, src0, src1, src2, src3);
62 PCKEV_D4_UB(src1, src0, src3, src2, ref1, ref0, ref3, ref2, src0, src1,
64 sad += SAD_UB2_UH(src0, src1, ref0, ref1);
74 v16u8 src0, src1, ref0, ref1; local
78 LD_UB2(src, src_stride, src0, src1);
98 v16u8 src0, src1, ref0, ref1; local
135 v16u8 src0, src1, src2, src3; local
166 uint32_t src0, src1, src2, src3; local
207 v16u8 src0, src1, src2, src3; local
290 v16u8 src0, src1, ref0_0, ref0_1, ref0_2, ref0, ref1; local
332 v16u8 src0, src1, src2, src3; local
380 uint32_t src0, src1, src2, src3; local
461 v16u8 src0, src1, src2, src3; local
630 v16u8 src0, src1; local
686 v16u8 src0, src1, src2, src3; local
802 uint32_t src0, src1, src2, src3; local
863 v16u8 src0, src1, src2, src3; local
979 v16u8 src0, src1, ref0, ref1; local
1023 v16u8 src0, src1, src2, src3; local
1086 uint32_t src0, src1, src2, src3, ref0, ref1, ref2, ref3; local
1115 v16u8 src0, src1, src2, src3, ref0, ref1, ref2, ref3; local
1139 v16u8 src0, src1, src2, src3, ref0, ref1, ref2, ref3; local
1174 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local
1210 v16u8 src0, src1, src2, src3; local
[all...]
H A Dsub_pixel_variance_msa.c45 uint32_t src0, src1, src2, src3; local
55 LW4(src_ptr, src_stride, src0, src1, src2, src3);
60 INSERT_W4_UB(src0, src1, src2, src3, src);
80 v16u8 src0, src1, src2, src3; local
89 LD_UB4(src_ptr, src_stride, src0, src1, src2, src3);
94 PCKEV_D4_UB(src1, src0, src3, src2, ref1, ref0, ref3, ref2, src0, src1,
96 AVER_UB2_UB(src0, pred0, src1, pred1, src0, src1);
98 CALC_MSE_AVG_B(src1, ref
169 v16u8 src0, src1, ref0, ref1, pred0, pred1; local
227 v16u8 src0, src1, ref0, ref1, pred0, pred1; local
287 v16u8 src0, src1, src2, src3; local
336 v16u8 src0, src1, src2, src3; local
389 v16i8 src0, src1, src2, src3; local
428 v16i8 src0, src1, src2, src3; local
468 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; local
552 v16u8 src0, src1, src2, src3, src4, out; local
595 v16u8 src0, src1, src2, src3, src4; local
639 v16u8 src0, src1, src2, src3, src4; local
735 v16u8 src0, src1, src2, src3, src4; local
784 v16u8 src0, src1, src2, src3, src4; local
840 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local
955 v16i8 src0, src1, src2, src3; local
1000 v16i8 src0, src1, src2, src3; local
1048 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; local
1154 v16u8 src0, src1, src2, src3, src4; local
1201 v16u8 src0, src1, src2, src3, src4; local
1250 v16u8 src0, src1, src2, src3, src4; local
1365 v16u8 src0, src1, src2, src3, src4; local
1416 v16u8 src0, src1, src2, src3, src4; local
1480 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local
[all...]
H A Dvpx_convolve8_avg_vert_msa.c20 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
32 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
35 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
78 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
89 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
92 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6);
93 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
135 v16i8 src0, src1, src local
249 v16i8 src0, src1, src2, src3, src4; local
284 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src87_r; local
332 v16u8 src0, src1, src2, src3, src4; local
356 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
413 v16u8 src0, src1, src2, src3, src4, dst0, dst1, dst2, dst3, filt0; local
462 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; local
533 v16u8 src0, src1, src2, src3, src4, src5; local
[all...]
/external/libvpx/libvpx/vpx_dsp/x86/
H A Dhighbd_loopfilter_sse2.c991 uint16_t *src1[1]; local
995 src1[0] = in1;
999 highbd_transpose(src1, in_p, dest1, out_p, 1);
/external/mesa3d/src/compiler/glsl/
H A Dlower_instructions.cpp1469 ir_variable *src1 = local
1470 new(ir) ir_variable(glsl_type::uvec(elements), "src1", ir_var_temporary);
1495 i.insert_before(src1);
1503 i.insert_before(assign(src1, ir->operands[0]));
1528 i.insert_before(assign(src1, i2u(abs(itmp1))));
1532 i.insert_before(assign(src1l, bit_and(src1, c0000FFFF)));
1534 i.insert_before(assign(src1h, rshift(src1, c16)));
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_lowering.c172 * dst.y = src0.y \times src1.y
174 * dst.w = src1.w
183 * if (dst.yz aliases src1.w) {
184 * MOV tmpB.yw, src1.yw
185 * src1 = tmpB
187 * MUL dst.y, src0.y, src1.y
189 * MOV dst.w, src1.w
202 struct tgsi_full_src_register *src1 = &inst->Src[1]; local
210 if (aliases(dst, TGSI_WRITEMASK_YZ, src1, TGSI_WRITEMASK_W)) {
211 create_mov(tctx, &ctx->tmp[B].dst, src1, TGSI_WRITEMASK_Y
281 struct tgsi_full_src_register *src1 = &inst->Src[1]; local
407 struct tgsi_full_src_register *src1 = &inst->Src[1]; local
502 struct tgsi_full_src_register *src1 = &inst->Src[1]; local
951 struct tgsi_full_src_register *src1 = &inst->Src[1]; local
[all...]
/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dilo_shader_fs.c756 * src1 := ddx
763 * src1 := (v or bias or lod, ...)
769 * src1 := sampler
774 * src1 := sampler
783 * src1 := sampler
923 struct toy_src src1[4]; local
924 tsrc_transpose(inst->src[1], src1);
925 ref_or_si = src1[ref_pos - 4];
949 struct toy_src src1[4]; local
950 tsrc_transpose(inst->src[1], src1);
968 struct toy_src src1[4]; local
[all...]
H A Dtoy_compiler.h259 struct toy_src src1,
271 inst->src[1] = src1;
284 struct toy_src src1)
286 return tc_add3(tc, opcode, dst, src0, src1, tsrc_null());
331 struct toy_src src1) \
334 dst, src0, src1); \
342 struct toy_src src1, \
346 dst, src0, src1, src2); \
354 struct toy_src src1, \
359 dst, src0, src1); \
256 tc_add3(struct toy_compiler *tc, unsigned opcode, struct toy_dst dst, struct toy_src src0, struct toy_src src1, struct toy_src src2) argument
281 tc_add2(struct toy_compiler *tc, int opcode, struct toy_dst dst, struct toy_src src0, struct toy_src src1) argument
[all...]
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_emit_nvc0.cpp1344 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2) local
1346 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1363 srcId(i, src1, 26);
1391 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2) local
1395 srcId(i, src1, 26);
1608 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2) local
1611 srcId(i, src1, 20);
H A Dnv50_ir_lowering_nv50.cpp47 ImmediateValue src1; local
48 bool src1imm = mul->src(1).getImmediate(src1);
82 src1.reg.data.s32 = abs(src1.reg.data.s32);
92 if (src1imm && (src1.reg.data.u32 & 0xffff0000) == 0) {
94 bld->mkImm(src1.reg.data.u32 & 0xffff));
97 src1imm ? bld->mkImm(src1.reg.data.u32 >> 16) : b[1]);
98 if (src1imm && (src1.reg.data.u32 & 0x0000ffff) == 0) {
106 if (src1imm && (src1.reg.data.u32 & 0x0000ffff) == 0) {
1064 Value *src1 local
1095 Value *src1 = bld.getSSA(); local
[all...]
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_program_alu.c279 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
283 src1.Negate &= ~(RC_MASK_Z | RC_MASK_W);
284 src1.Swizzle &= ~(63 << (3 * 2));
285 src1.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3));
286 emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1);
302 * [1, src0.y*src1.y, src0.z, src1.w]
708 * CMP is defined as dst = src0 < 0.0 ? src1 : src2
714 * LRP dst, tmp0, src1, src2
724 /* LRP dst, tmp0, src1, src
745 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
[all...]
/external/mesa3d/src/gallium/drivers/swr/rasterizer/memory/
H A DStoreTile.h661 simd16scalari src1 = _simd16_cvtps_epi32(comp1); // padded byte gggggggggggggggg local
666 src1 = _simd16_slli_epi32(src1, 8);
670 simd16scalari final = _simd16_or_si(_simd16_or_si(src0, src1), _simd16_or_si(src2, src3)); // 0 1 2 3 4 5 6 7 8 9 A B C D E F
731 __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg local
740 __m128i srcLo1 = _mm256_castsi256_si128(src1); // 000g000g000g000g
745 __m128i srcHi1 = _mm256_extractf128_si256(src1, 1); // 000g000g000g000g
775 src1 = _mm256_slli_si256(src1, 1);
779 src0 = _mm256_or_si256(src0, src1);
835 simd16scalari src1 = _simd16_cvtps_epi32(comp1); // padded byte gggggggggggggggg local
897 __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg local
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_disasm.c1132 src1(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) function
1330 err |= src1(file, devinfo, inst);
1356 err |= src1(file, devinfo, inst);
1366 err |= src1(file, devinfo, inst);
H A Dbrw_fs_generator.cpp548 * | src1+0 | src1+1 | src1+2 | src1+3 |
556 * | src1+0 | src1+1 | src1+2 | src1+3 |
1008 struct brw_reg src1 = brw_reg(src.file, src.nr, 0, local
1015 brw_ADD(p, dst, src0, negate(src1));
1035 struct brw_reg src1 = brw_reg(src.file, src.nr, 0, local
1055 struct brw_reg src1 = brw_reg(src.file, src.nr, 2, local
1390 generate_set_sample_id(fs_inst *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
[all...]
H A Dbrw_vec4_generator.cpp58 struct brw_reg src1)
64 if (src1.file == BRW_GENERAL_REGISTER_FILE)
65 check_gen6_math_src_arg(src1);
68 gen6_math(p, dst, brw_math_function(inst->opcode), src0, src1);
77 struct brw_reg src1)
89 struct brw_reg &op0 = is_int_div ? src1 : src0;
90 struct brw_reg &op1 = is_int_div ? src0 : src1;
418 struct brw_reg src1)
432 * immediate value in src1, and store the result in DWORDs 3 and 4 of dst.
436 * mul(2) dst.3<1>UD src0<8;2,4>UD src1<
54 generate_math_gen6(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
73 generate_math2_gen4(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
415 generate_gs_set_write_offset(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
490 generate_gs_svb_write(struct brw_codegen *p, struct brw_vue_prog_data *prog_data, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
659 generate_gs_ff_sync_set_primitives(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) argument
681 generate_gs_ff_sync(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
[all...]
H A Dbrw_vec4_nir.cpp852 const src_reg src1 = (info->num_srcs >= 3 local
863 src0, src1,
1346 * the operands (src0 through SNB, src1 on IVB and later). The MACH
/external/opencv/cxcore/src/
H A Dcxarithm.cpp60 worktype t0 = __op__((src1)[i], (src2)[i]); \
61 worktype t1 = __op__((src1)[i+1], (src2)[i+1]); \
66 t0 = __op__((src1)[i+2],(src2)[i+2]); \
67 t1 = __op__((src1)[i+3],(src2)[i+3]); \
75 worktype t0 = __op__((src1)[i],(src2)[i]); \
82 ( const type* src1, int step1, const type* src2, int step2, \
84 (src1, step1, src2, step2, dst, step, size) ) \
86 step1/=sizeof(src1[0]); step2/=sizeof(src2[0]); step/=sizeof(dst[0]); \
90 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \
92 worktype t0 = __op__((src1)[
286 CvMat srcstub1, srcstub2, *src1, *src2; local
761 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
1321 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
1669 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
1869 icvAddWeighted_8u_fast_C1R( const uchar* src1, int step1, double alpha, const uchar* src2, int step2, double beta, double gamma, uchar* dst, int step, CvSize size ) argument
[all...]
H A Dcxcmp.cpp57 worktype a1 = _toggle_macro_(src1[x]), \
67 worktype a1 = _toggle_macro_(src1[x*2]), \
70 a1 = _toggle_macro_(src1[x*2+1]); \
81 worktype a1 = _toggle_macro_(src1[x*3]), \
84 a1 = _toggle_macro_(src1[x*3+1]); \
88 a1 = _toggle_macro_(src1[x*3+2]); \
99 worktype a1 = _toggle_macro_(src1[x*4]), \
102 a1 = _toggle_macro_(src1[x*4+1]); \
106 a1 = _toggle_macro_(src1[x*4+2]); \
110 a1 = _toggle_macro_(src1[
256 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
355 CvMat srcstub1, *src1 = (CvMat*)srcarr; local
567 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
705 CvMat srcstub1, *src1 = (CvMat*)srcarr; local
975 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
1076 CvMat srcstub1, *src1 = (CvMat*)srcarr; local
1425 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local
[all...]
/external/pdfium/core/fxcodec/codec/
H A Dfx_codec_jpx_opj.cpp615 int *L, *a, *b, *red, *green, *blue, *src0, *src1, *src2; local
653 a = src1 = image->comps[1].data;
682 FX_Free(src1);
/external/swiftshader/src/Shader/
H A DPixelProgram.cpp111 const Src &src1 = instruction->src[1]; local
145 if(src1.type != Shader::PARAMETER_VOID) s1 = fetchRegister(src1);
278 case Shader::OPCODE_M4X4: M4X4(d, s0, src1); break;
279 case Shader::OPCODE_M4X3: M4X3(d, s0, src1); break;
280 case Shader::OPCODE_M3X4: M3X4(d, s0, src1); break;
281 case Shader::OPCODE_M3X3: M3X3(d, s0, src1); break;
282 case Shader::OPCODE_M3X2: M3X2(d, s0, src1); break;
283 case Shader::OPCODE_TEX: TEXLD(d, s0, src1, project, bias); break;
284 case Shader::OPCODE_TEXLDD: TEXLDD(d, s0, src1, s
1053 M3X2(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1062 M3X3(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1073 M3X4(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1086 M4X3(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1097 M4X4(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1110 TEXLD(Vector4f &dst, Vector4f &src0, const Src &src1, bool project, bool bias) argument
1128 TEXOFFSET(Vector4f &dst, Vector4f &src0, const Src &src1, Vector4f &src2, bool bias) argument
1133 TEXLDL(Vector4f &dst, Vector4f &src0, const Src &src1, Vector4f &offset, bool bias) argument
1138 TEXELFETCH(Vector4f &dst, Vector4f &src0, const Src& src1) argument
1143 TEXELFETCH(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset) argument
1148 TEXGRAD(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &src2, Vector4f &src3) argument
1153 TEXGRAD(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &src2, Vector4f &src3, Vector4f &offset) argument
1158 TEXLDD(Vector4f &dst, Vector4f &src0, const Src &src1, Vector4f &src2, Vector4f &src3) argument
1163 TEXLDL(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1168 TEXSIZE(Vector4f &dst, Float4 &lod, const Src &src1) argument
1262 BREAKC(Vector4f &src0, Vector4f &src1, Control control) argument
[all...]
H A DVertexProgram.cpp140 Src src1 = instruction->src[1]; local
158 if(src1.type != Shader::PARAMETER_VOID) s1 = fetchRegister(src1);
230 case Shader::OPCODE_M3X2: M3X2(d, s0, src1); break;
231 case Shader::OPCODE_M3X3: M3X3(d, s0, src1); break;
232 case Shader::OPCODE_M3X4: M3X4(d, s0, src1); break;
233 case Shader::OPCODE_M4X3: M4X3(d, s0, src1); break;
234 case Shader::OPCODE_M4X4: M4X4(d, s0, src1); break;
318 case Shader::OPCODE_LOOP: LOOP(src1); break;
338 case Shader::OPCODE_TEXLDL: TEXLDL(d, s0, src1); brea
976 M3X2(Vector4f &dst, Vector4f &src0, Src &src1) argument
985 M3X3(Vector4f &dst, Vector4f &src0, Src &src1) argument
996 M3X4(Vector4f &dst, Vector4f &src0, Src &src1) argument
1009 M4X3(Vector4f &dst, Vector4f &src0, Src &src1) argument
1020 M4X4(Vector4f &dst, Vector4f &src0, Src &src1) argument
1056 BREAKC(Vector4f &src0, Vector4f &src1, Control control) argument
1568 TEXLDL(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1573 TEX(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1579 TEXOFFSET(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &src2) argument
1585 TEXLDL(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset) argument
1590 TEXELFETCH(Vector4f &dst, Vector4f &src0, const Src& src1) argument
1595 TEXELFETCH(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset) argument
1600 TEXGRAD(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &src2, Vector4f &src3) argument
1605 TEXGRAD(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &src2, Vector4f &src3, Vector4f &offset) argument
1610 TEXSIZE(Vector4f &dst, Float4 &lod, const Src &src1) argument
[all...]
/external/v8/src/arm/
H A Dmacro-assembler-arm.h152 void Mls(Register dst, Register src1, Register src2, Register srcA,
154 void And(Register dst, Register src1, const Operand& src2,
337 void Push(Register src1, Register src2, Condition cond = al) { argument
338 if (src1.code() > src2.code()) {
339 stm(db_w, sp, src1.bit() | src2.bit(), cond);
341 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
347 void Push(Register src1, Register src2, Register src3, Condition cond = al) { argument
348 if (src1.code() > src2.code()) {
350 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
352 stm(db_w, sp, src1
362 Push(Register src1, Register src2, Register src3, Register src4, Condition cond = al) argument
389 Push(Register src1, Register src2, Register src3, Register src4, Register src5, Condition cond = al) argument
418 Pop(Register src1, Register src2, Condition cond = al) argument
429 Pop(Register src1, Register src2, Register src3, Condition cond = al) argument
445 Pop(Register src1, Register src2, Register src3, Register src4, Condition cond = al) argument
[all...]

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