Searched refs:i16 (Results 76 - 100 of 224) sorted by relevance

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/external/dhcpcd-6.8.2/dbus/
H A Ddbus-dict.c92 dbus_int16_t i16; local
124 i16 = strtol(data, NULL, 0);
128 DBUS_TYPE_INT16, &i16))
/external/libhevc/common/arm/
H A Dihevc_deblk_chroma_vert.s114 vshl.i16 q0,q0,#2
145 vadd.i16 q0,q3,q1
146 vsub.i16 q1,q9,q1
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DValueTypes.h40 i16 = 3, // This is a 16 bit integer value enumerator in enum:llvm::MVT::SimpleValueType
59 v2i16 = 17, // 2 x i16
60 v4i16 = 18, // 4 x i16
61 v8i16 = 19, // 8 x i16
62 v16i16 = 20, // 16 x i16
198 case v16i16: return i16;
254 case i16 :
324 return MVT::i16;
345 case MVT::i16:
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
H A DPTXISelLowering.cpp39 addRegisterClass(MVT::i16, PTX::RegI16RegisterClass);
55 setLoadExtAction(ISD::EXTLOAD, MVT::i16, Expand);
56 setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand);
57 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
306 else if (RegVT == MVT::i16) {
/external/vulkan-validation-layers/libs/glm/gtc/
H A Dtype_precision.hpp256 typedef detail::int16 i16; typedef in namespace:glm
286 typedef detail::tvec1<i16, defaultp> i16vec1;
290 typedef detail::tvec2<i16, defaultp> i16vec2;
294 typedef detail::tvec3<i16, defaultp> i16vec3;
298 typedef detail::tvec4<i16, defaultp> i16vec4;
/external/icu/icu4c/source/test/iotest/
H A Diotest.cpp215 int16_t i16; local
271 i16 = (int16_t)uto64(argument);
272 uBufferLenReturned = u_sprintf_u(uBuffer, format, i16);
273 uFileBufferLenReturned = u_fprintf_u(testFile.getAlias(), format, i16);
380 int16_t i16, expected16; local
454 uBufferLenReturned = u_sscanf_u(argument, format, &i16);
455 //uFileBufferLenReturned = u_fscanf_u(testFile, format, i16);
456 if (i16 != expected16) {
458 i, i16, expected16);
584 int16_t i16; local
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp301 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) {
491 case MVT::i16:
634 case MVT::i16:
834 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 ||
855 case MVT::i16:
1015 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 &&
1037 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) {
1177 if (DestVT != MVT::i16 && DestVT != MVT::i8)
1417 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32)
1441 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetV
[all...]
/external/libavc/common/arm/
H A Dih264_deblk_luma_a9.s133 vshl.i16 q13, q15, #2 @Q13 = (q0 - p0)<<2
134 vshl.i16 q12, q12, #2 @Q12 = (q0 - p0)<<2
137 vadd.i16 q12, q12, q14 @
138 vadd.i16 q13, q13, q15 @Q13,Q12 = [ (q0 - p0)<<2 ] + (p1 - q1)
155 vsub.i16 q14, q14, q13 @Q14,Q5 = [p2 + (p0+q0+1)>>1] - (p1<<1)
156 vsub.i16 q5, q5, q8 @
161 vsub.i16 q2, q2, q8 @
162 vsub.i16 q15, q15, q13 @Q15,Q2 = [q2 + (p0+q0+1)>>1] - (q1<<1)
266 vadd.i16 q8, q14, q14 @2*(p0+q0+q1)L
267 vadd.i16 q
[all...]
/external/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp196 { ISD::FP_TO_SINT, MVT::i16, MVT::f32, 2 },
197 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 },
198 { ISD::FP_TO_SINT, MVT::i16, MVT::f64, 2 },
199 { ISD::FP_TO_UINT, MVT::i16, MVT::f64, 2 },
226 { ISD::SINT_TO_FP, MVT::f32, MVT::i16, 2 },
227 { ISD::UINT_TO_FP, MVT::f32, MVT::i16, 2 },
228 { ISD::SINT_TO_FP, MVT::f64, MVT::i16, 2 },
229 { ISD::UINT_TO_FP, MVT::f64, MVT::i16, 2 },
249 // i16 -> i64 requires two dependent operations.
250 { ISD::SIGN_EXTEND, MVT::i64, MVT::i16,
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86GenCallingConv.inc123 LocVT == MVT::i16) {
297 LocVT == MVT::i16) {
357 LocVT == MVT::i16) {
396 LocVT == MVT::i16) {
425 LocVT == MVT::i16) {
487 LocVT == MVT::i16) {
622 LocVT == MVT::i16 ||
671 LocVT == MVT::i16) {
817 if (LocVT == MVT::i16) {
989 if (LocVT == MVT::i16) {
[all...]
H A DX86ISelDAGToDAG.cpp599 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
602 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1149 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1151 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1406 case MVT::i16:
1607 case MVT::i16:
1770 // i8 is unshrinkable, i16 should be promoted to i32.
1842 case MVT::i16: LoReg = X86::AX; Opc = X86::MUL16r; break;
1870 case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break;
1878 case MVT::i16
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dneon-shift-encoding.s14 @ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf2]
15 vshl.i16 d16, d16, #15
30 @ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xf2]
31 vshl.i16 q8, q8, #15
146 @ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xf3]
147 vshll.i16 q8, d16, #16
150 @ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf2]
151 vshrn.i16 d16, q8, #8
220 @ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2]
221 vrshrn.i16 d1
[all...]
H A Dneon-add-encoding.s6 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf2]
7 vadd.i16 d16, d17, d16
126 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2]
127 vaddhn.i16 d16, q8, q9
132 @ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf3]
133 vraddhn.i16 d16, q8, q9
H A Dneont2-add-encoding.s7 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08]
8 vadd.i16 d16, d17, d16
127 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04]
128 vaddhn.i16 d16, q8, q9
133 @ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xff,0xa2,0x04]
134 vraddhn.i16 d16, q8, q9
H A Dneon-cmp-encoding.s4 vceq.i16 d16, d16, d17
8 vceq.i16 q8, q8, q9
13 @ CHECK: vceq.i16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf3]
17 @ CHECK: vceq.i16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf3]
/external/vulkan-validation-layers/libs/glm/
H A Dfwd.hpp313 typedef detail::int16 i16; typedef in namespace:glm
406 typedef detail::tvec1<i16, lowp> lowp_i16vec1;
410 typedef detail::tvec2<i16, lowp> lowp_i16vec2;
414 typedef detail::tvec3<i16, lowp> lowp_i16vec3;
418 typedef detail::tvec4<i16, lowp> lowp_i16vec4;
423 typedef detail::tvec1<i16, mediump> mediump_i16vec1;
427 typedef detail::tvec2<i16, mediump> mediump_i16vec2;
431 typedef detail::tvec3<i16, mediump> mediump_i16vec3;
435 typedef detail::tvec4<i16, mediump> mediump_i16vec4;
440 typedef detail::tvec1<i16, high
[all...]
/external/llvm/test/MC/ARM/
H A Dneont2-add-encoding.s7 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08]
8 vadd.i16 d16, d17, d16
127 @ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04]
128 vaddhn.i16 d16, q8, q9
133 @ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xff,0xa2,0x04]
134 vraddhn.i16 d16, q8, q9
H A Dneon-pairwise-encoding.s5 @ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xf2]
6 vpadd.i16 d16, d17, d16
14 @ CHECK: vpadd.i16 d17, d17, d16 @ encoding: [0xb0,0x1b,0x51,0xf2]
15 vpadd.i16 d17, d16
/external/valgrind/none/tests/arm/
H A Dneon64.stdout.exp4 vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
5 vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
10 vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
11 vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
29 vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
30 vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
35 vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
36 vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
50 vorr.i16 d2, #0x7 :: Qd 0x55575557 0x55575557
51 vorr.i16 d
[all...]
H A Dneon128.c356 TESTINSN_imm("vmov.i16 q1", q1, 0x7);
359 TESTINSN_imm("vmov.i16 q7", q7, 0x700);
370 TESTINSN_imm("vmvn.i16 q1", q1, 0x7);
373 TESTINSN_imm("vmvn.i16 q7", q7, 0x700);
382 TESTINSN_imm("vorr.i16 q2", q2, 0x7);
384 TESTINSN_imm("vorr.i16 q6", q6, 0x700);
390 TESTINSN_imm("vbic.i16 q3", q3, 0x7);
392 TESTINSN_imm("vbic.i16 q8", q8, 0x700);
408 TESTINSN_un("vmov q10, q11", q10, q11, i16, 7);
415 TESTINSN_bin("vadd.i16 q
[all...]
/external/libavc/encoder/arm/
H A Dime_distortion_metrics_a9q.s123 vadd.i16 q0, q0, q1
124 vadd.i16 d0, d1, d0
206 vadd.i16 q0, q0, q1
207 vadd.i16 d0, d1, d0
294 vadd.i16 q6, q0, q1
296 vadd.i16 d12, d12, d13
332 vadd.i16 q0, q0, q1
333 vadd.i16 d0, d1, d0
649 vadd.i16 d0, d18, d19 @ x
650 vadd.i16 d
[all...]
/external/clang/test/Parser/
H A Daltivec.c103 typedef short i16; typedef
106 // i8, i16, i32 here are field names, not type names.
108 vector pixel i16; member in struct:S
/external/r8/src/test/examples/invoke/
H A DInvoke.java258 int i7, int i8, int i9, int i10, int i11, int i12, int i13, int i14, int i15, int i16) {
259 oneArgumentMethod(i16);
260 twoArgumentMethod(i16, i9);
261 twoArgumentMethod(i16, i10);
262 twoArgumentMethod(i16, i11);
334 int i11, int i12, int i13, int i14, int i15, int i16, int i17, int i18, int i19, int i20,
373 int i13 = 13; int i14 = 14; int i15 = 15; int i16 = 16; int i17 = 17;
424 i6, i7, i8, i9, i10, i11, i12, i13, i14, i15, i16, i17, i18, i19, i20,
257 unusedArgumentRanged(int i0, int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10, int i11, int i12, int i13, int i14, int i15, int i16) argument
332 manyArgs( int i0, int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10, int i11, int i12, int i13, int i14, int i15, int i16, int i17, int i18, int i19, int i20, int i21, int i22, int i23, int i24, int i25, int i26, int i27, int i28, int i29, int i30, int i31, int i32, int i33, int i34, int i35, int i36, int i37, int i38, int i39, int i40, int i41, int i42, int i43, int i44, int i45, int i46, int i47, int i48, int i49, int i50, int i51, int i52, int i53, int i54, int i55, int i56, int i57, int i58, int i59, int i60, int i61, int i62, int i63, int i64, int i65, int i66, int i67, int i68, int i69, int i70, int i71, int i72, int i73, int i74, int i75, int i76, int i77, int i78, int i79, int i80, int i81, int i82, int i83, int i84, int i85, int i86, int i87, int i88, int i89, int i90, int i91, int i92, int i93, int i94, int i95, int i96, int i97, int i98, int i99, int i100, int i101, int i102, int i103, int i104, int i105, int i106, int i107, int i108, int i109, int i110, int i111, int i112, int i113, int i114, int i115, int i116, int i117, int i118, int i119, int i120, int i121, int i122, int i123, int i124, int i125, int i126, int i127, int i128, int i129, int i130, int i131, int i132, int i133, int i134, int i135, int i136, int i137, int i138, int i139, int i140, int i141, int i142, int i143, int i144, int i145, int i146, int i147, int i148, int i149, int i150, int i151, int i152, int i153, int i154, int i155, int i156, int i157, int i158, int i159, int i160, int i161, int i162, int i163, int i164, int i165, int i166, int i167, int i168, int i169, int i170, int i171, int i172, int i173, int i174, int i175, int i176, int i177, int i178, int i179, int i180, int i181, int i182, int i183, int i184, int i185, int i186, int i187, int i188, int i189, int i190, int i191, int i192, int i193, int i194, int i195, int i196, int i197, int i198, int i199, int i200, int i201, int i202, int i203, int i204, int i205, int i206, int i207, int i208, int i209, int i210, int i211, int i212, int i213, int i214, int i215, int i216, int i217, int i218, int i219, int i220, int i221, int i222, int i223, int i224, int i225, int i226, int i227, int i228, int i229, int i230, int i231, int i232, int i233, int i234, int i235, int i236, int i237, int i238, int i239, int i240, int i241, int i242, int i243, int i244, int i245, int i246, int i247, int i248, int i249, int i250, int i251, int i252, int i253, int i254) argument
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp98 VT = MVT::i16;
120 VT = MVT::i16;
/external/webp/src/dsp/
H A Dcommon_sse2.h36 uint16_t i16[8];
45 for (n = 0; n < 8; ++n) fprintf(stderr, "%.4x ", tmp.i16[n]);

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