Searched refs:CCState (Results 1 - 25 of 62) sorted by relevance

123

/external/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.h25 CCState &) {
H A DPPCCCState.h1 //===---- PPCCCState.h - CCState with PowerPC specific extensions -----------===//
19 class PPCCCState : public CCState {
35 : CCState(CC, isVarArg, MF, locs, C) {}
/external/llvm/lib/Target/Mips/
H A DMipsCCState.h1 //===---- MipsCCState.h - CCState with Mips specific extensions -----------===//
21 class MipsCCState : public CCState {
70 : CCState(CC, isVarArg, MF, locs, C), SpecialCallingConv(SpecialCC) {}
78 CCState::AnalyzeCallOperands(Outs, Fn);
96 CCState::AnalyzeFormalArguments(Ins, Fn);
105 CCState::AnalyzeCallResult(Ins, Fn);
113 CCState::AnalyzeReturn(Outs, Fn);
121 bool Return = CCState::CheckReturn(ArgsFlags, Fn);
H A DMips16ISelLowering.h35 const CCState &CCInfo, unsigned NextStackOffset,
H A DMipsSEISelLowering.h55 const CCState &CCInfo, unsigned NextStackOffset,
H A DMipsISelLowering.h272 void HandleByVal(CCState *, unsigned &, unsigned) const override;
457 isEligibleForTailCallOptimization(const CCState &CCInfo,
486 CCState &State) const;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86GenCallingConv.inc11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState
[all...]
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp10 // This file implements the CCState class, used for lowering and implementing
28 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, function in class:CCState
44 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
62 void CCState::MarkAllocated(unsigned Reg) {
70 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
89 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
103 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
121 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
138 void CCState
[all...]
/external/llvm/lib/Target/X86/
H A DX86CallingConv.h28 CCState &State) {
39 CCState &) {
50 CCState &State) {
/external/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h26 class SystemZCCState : public CCState {
43 : CCState(CC, isVarArg, MF, locs, C) {}
56 CCState::AnalyzeFormalArguments(Ins, Fn);
70 CCState::AnalyzeCallOperands(Outs, Fn);
92 CCState &State) {
/external/swiftshader/third_party/LLVM/lib/CodeGen/
H A DCallingConvLower.cpp10 // This file implements the CCState class, used for lowering and implementing
26 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, function in class:CCState
42 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
60 void CCState::MarkAllocated(unsigned Reg) {
69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
138 void CCState
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMCallingConv.h31 CCState &State, bool CanFail) {
62 CCState &State) {
74 CCState &State, bool CanFail) {
110 CCState &State) {
120 CCValAssign::LocInfo &LocInfo, CCState &State) {
142 CCState &State) {
153 CCState &State) {
H A DARMISelLowering.h445 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
449 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
463 virtual void HandleByVal(CCState *, unsigned &) const;
/external/llvm/lib/Target/ARM/
H A DARMCallingConv.h30 CCState &State, bool CanFail) {
61 CCState &State) {
73 CCState &State, bool CanFail) {
115 CCState &State) {
125 CCValAssign::LocInfo &LocInfo, CCState &State) {
147 CCState &State) {
158 CCState &State) {
183 CCState &State) {
H A DARMISelLowering.h612 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &dl,
617 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
627 void HandleByVal(CCState *, unsigned &, unsigned) const override;
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DCallingConvLower.h10 // This file declares the CCState and CCValAssign classes, used for lowering
27 class CCState;
136 ISD::ArgFlagsTy ArgFlags, CCState &State);
143 ISD::ArgFlagsTy &ArgFlags, CCState &State);
150 /// CCState - This class holds information needed while lowering arguments and
153 class CCState { class in namespace:llvm
172 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
/external/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h46 CCState &State, unsigned SlotAlign) {
67 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
86 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
H A DAArch64CallLowering.cpp63 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
/external/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h10 // This file declares the CCState and CCValAssign classes, used for lowering
26 class CCState;
177 ISD::ArgFlagsTy ArgFlags, CCState &State);
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
191 /// CCState - This class holds information needed while lowering arguments and
194 class CCState { class in namespace:llvm
263 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h115 void AnalyzeFormalArguments(CCState &State,
117 void AnalyzeReturn(CCState &State,
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp260 static void AnalyzeVarArgs(CCState &State,
265 static void AnalyzeVarArgs(CCState &State,
275 static void AnalyzeArguments(CCState &State,
340 static void AnalyzeRetResult(CCState &State,
345 static void AnalyzeRetResult(CCState &State,
351 static void AnalyzeReturnValues(CCState &State,
422 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
518 // CCState - Info about the registers and stack slot.
519 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
565 CCState CCInf
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp41 CCState &State);
658 CCState &State) {
703 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
842 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
885 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1016 // CCState - Info about the registers and stack slot.
1017 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp86 class HexagonCCState : public CCState {
93 : CCState(CC, isVarArg, MF, locs, C),
107 ISD::ArgFlagsTy ArgFlags, CCState &State);
112 ISD::ArgFlagsTy ArgFlags, CCState &State);
117 ISD::ArgFlagsTy ArgFlags, CCState &State);
122 ISD::ArgFlagsTy ArgFlags, CCState &State);
127 ISD::ArgFlagsTy ArgFlags, CCState &State);
132 ISD::ArgFlagsTy ArgFlags, CCState &State);
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
142 ISD::ArgFlagsTy ArgFlags, CCState
[all...]
/external/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp168 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
242 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
356 // CCState - Info about the registers and stack slot.
357 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
400 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
H A DBlackfinISelLowering.cpp176 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
188 assert(RC->contains(VA.getLocReg()) && "Unexpected regclass in CCState");
189 assert(RC->hasType(RegVT) && "Unexpected regclass in CCState");
233 // CCState - Info about the registers and stack slot.
234 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
295 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
383 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(),

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