| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | FastISel.h | 239 unsigned FastEmitInst_(unsigned MachineInstOpcode,
245 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
252 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
260 unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
269 unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
277 unsigned FastEmitInst_rii(unsigned MachineInstOpcode,
285 unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
293 unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 392 unsigned fastEmitInst_(unsigned MachineInstOpcode,
397 unsigned fastEmitInst_r(unsigned MachineInstOpcode,
403 unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
409 unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
416 unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
422 unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
428 unsigned fastEmitInst_f(unsigned MachineInstOpcode,
434 unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1102 unsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode, argument
1105 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1111 unsigned FastISel::FastEmitInst_r(unsigned MachineInstOpcode, argument
1115 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1130 unsigned FastISel::FastEmitInst_rr(unsigned MachineInstOpcode, argument
1135 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1151 unsigned FastISel::FastEmitInst_rrr(unsigned MachineInstOpcode, argument
1157 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1175 unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, argument
1180 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1196 FastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2) argument
1219 FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm) argument
1240 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1264 FastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
1280 FastEmitInst_ii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm1, uint64_t Imm2) argument
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 109 virtual unsigned FastEmitInst_(unsigned MachineInstOpcode,
111 virtual unsigned FastEmitInst_r(unsigned MachineInstOpcode,
114 virtual unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
118 virtual unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
123 virtual unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
127 virtual unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
131 virtual unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
136 virtual unsigned FastEmitInst_i(unsigned MachineInstOpcode,
139 virtual unsigned FastEmitInst_ii(unsigned MachineInstOpcode,
278 unsigned ARMFastISel::FastEmitInst_(unsigned MachineInstOpcode, argument
287 FastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill) argument
306 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
328 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
353 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
375 FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm) argument
397 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
422 FastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
441 FastEmitInst_ii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm1, uint64_t Imm2) argument
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1806 unsigned FastISel::fastEmitInst_(unsigned MachineInstOpcode, argument
1809 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1815 unsigned FastISel::fastEmitInst_r(unsigned MachineInstOpcode, argument
1818 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1836 unsigned FastISel::fastEmitInst_rr(unsigned MachineInstOpcode, argument
1840 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1860 unsigned FastISel::fastEmitInst_rrr(unsigned MachineInstOpcode, argument
1865 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1888 unsigned FastISel::fastEmitInst_ri(unsigned MachineInstOpcode, argument
1891 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1910 fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2) argument
1935 fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm) argument
1954 fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1980 fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 115 unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
119 unsigned fastEmitInst_r(unsigned MachineInstOpcode,
122 unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
2302 unsigned PPCFastISel::fastEmitInst_ri(unsigned MachineInstOpcode, argument
2306 if (MachineInstOpcode == PPC::ADDI)
2308 else if (MachineInstOpcode == PPC::ADDI8)
2315 return FastISel::fastEmitInst_ri(MachineInstOpcode, UseRC,
2322 unsigned PPCFastISel::fastEmitInst_r(unsigned MachineInstOpcode, argument
2329 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0, Op0IsKill);
2335 unsigned PPCFastISel::fastEmitInst_rr(unsigned MachineInstOpcode, argument
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 104 unsigned fastEmitInst_r(unsigned MachineInstOpcode,
107 unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
111 unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
115 unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
120 unsigned fastEmitInst_i(unsigned MachineInstOpcode,
278 unsigned ARMFastISel::fastEmitInst_r(unsigned MachineInstOpcode, argument
282 const MCInstrDesc &II = TII.get(MachineInstOpcode);
300 unsigned ARMFastISel::fastEmitInst_rr(unsigned MachineInstOpcode, argument
305 const MCInstrDesc &II = TII.get(MachineInstOpcode);
328 unsigned ARMFastISel::fastEmitInst_ri(unsigned MachineInstOpcode, argument
354 fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
384 fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
[all...] |
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 178 unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
1866 unsigned MipsFastISel::fastEmitInst_rr(unsigned MachineInstOpcode, argument
1876 if (MachineInstOpcode == Mips::MUL) {
1878 const MCInstrDesc &II = TII.get(MachineInstOpcode);
1889 return FastISel::fastEmitInst_rr(MachineInstOpcode, RC, Op0, Op0IsKill, Op1,
|