Searched refs:Op (Results 1 - 25 of 804) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/
H A DX86ATTInstPrinter.cpp59 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op, argument
61 switch (MI->getOperand(Op).getImm()) {
80 const MCOperand &Op = MI->getOperand(OpNo); local
81 if (Op.isImm())
83 O << (int)Op.getImm();
85 assert(Op.isExpr() && "unknown pcrel immediate operand");
86 O << *Op.getExpr();
92 const MCOperand &Op = MI->getOperand(OpNo); local
93 if (Op.isReg()) {
94 O << '%' << getRegisterName(Op
108 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument
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H A DX86IntelInstPrinter.cpp49 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op, argument
51 switch (MI->getOperand(Op).getImm()) {
68 const MCOperand &Op = MI->getOperand(OpNo); local
69 if (Op.isImm())
70 O << Op.getImm();
72 assert(Op.isExpr() && "unknown pcrel immediate operand");
73 O << *Op.getExpr();
84 const MCOperand &Op = MI->getOperand(OpNo); local
85 if (Op.isReg()) {
86 PrintRegName(O, getRegisterName(Op
95 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument
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/external/spirv-llvm/lib/SPIRV/libSPIRV/
H A DSPIRVOpCode.h51 SPIRVMap<Op, std::string>::init() {
52 #define _SPIRV_OP(x, ...) add(Op##x, #x);
56 SPIRV_DEF_NAMEMAP(Op, OpCodeNameMap)
58 inline bool isAtomicOpCode(Op OpCode) {
65 inline bool isBinaryOpCode(Op OpCode) {
71 inline bool isShiftOpCode(Op OpCode) {
76 inline bool isLogicalOpCode(Op OpCode) {
81 inline bool isBitwiseOpCode(Op OpCode) {
86 inline bool isBinaryShiftLogicalBitwiseOpCode(Op OpCode) {
92 inline bool isCmpOpCode(Op OpCod
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/external/v8/tools/clang/rewrite_to_chrome_style/tests/
H A Doperators-expected.cc7 struct Op { struct in namespace:blink
8 bool operator==(const Op&) { return true; } argument
20 blink::Op a, b;
H A Doperators-original.cc7 struct Op { struct in namespace:blink
8 bool operator==(const Op&) { return true; } argument
20 blink::Op a, b;
/external/llvm/include/llvm/CodeGen/
H A DMachineOperand.h589 MachineOperand Op(MachineOperand::MO_Immediate);
590 Op.setImm(Val);
591 return Op;
595 MachineOperand Op(MachineOperand::MO_CImmediate);
596 Op.Contents.CI = CI;
597 return Op;
601 MachineOperand Op(MachineOperand::MO_FPImmediate);
602 Op.Contents.CFP = CFP;
603 return Op;
615 MachineOperand Op(MachineOperan
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/external/llvm/include/llvm/MC/
H A DMCInst.h112 MCOperand Op; local
113 Op.Kind = kRegister;
114 Op.RegVal = Reg;
115 return Op;
118 MCOperand Op; local
119 Op.Kind = kImmediate;
120 Op.ImmVal = Val;
121 return Op;
124 MCOperand Op; local
125 Op
130 MCOperand Op; local
136 MCOperand Op; local
158 setOpcode(unsigned Op) argument
168 addOperand(const MCOperand &Op) argument
179 insert(iterator I, const MCOperand &Op) argument
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp54 SDValue LegalizeOp(SDValue Op);
56 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
58 SDValue UnrollVSETCC(SDValue Op);
63 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
66 SDValue ExpandVSELECT(SDValue Op);
67 SDValue ExpandFNEG(SDValue Op);
71 SDValue PromoteVectorOp(SDValue Op);
104 SDValue VectorLegalizer::TranslateLegalizeResults(SDValue Op, SDValue Result) { argument
106 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i)
107 AddLegalizedOperand(Op
111 LegalizeOp(SDValue Op) argument
242 PromoteVectorOp(SDValue Op) argument
265 ExpandVSELECT(SDValue Op) argument
299 ExpandUINT_TO_FLOAT(SDValue Op) argument
339 ExpandFNEG(SDValue Op) argument
348 UnrollVSETCC(SDValue Op) argument
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp54 SDValue LegalizeOp(SDValue Op);
57 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
60 SDValue UnrollVSETCC(SDValue Op);
66 SDValue Expand(SDValue Op);
73 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
76 SDValue ExpandSEXTINREG(SDValue Op);
83 SDValue ExpandANY_EXTEND_VECTOR_INREG(SDValue Op);
90 SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDValue Op);
96 SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op);
99 SDValue ExpandBSWAP(SDValue Op);
179 TranslateLegalizeResults(SDValue Op, SDValue Result) argument
186 LegalizeOp(SDValue Op) argument
383 Promote(SDValue Op) argument
432 PromoteINT_TO_FP(SDValue Op) argument
468 PromoteFP_TO_INT(SDValue Op, bool isSigned) argument
494 ExpandLoad(SDValue Op) argument
638 ExpandStore(SDValue Op) argument
677 Expand(SDValue Op) argument
709 ExpandSELECT(SDValue Op) argument
767 ExpandSEXTINREG(SDValue Op) argument
789 ExpandANY_EXTEND_VECTOR_INREG(SDValue Op) argument
812 ExpandSIGN_EXTEND_VECTOR_INREG(SDValue Op) argument
836 ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op) argument
870 ExpandBSWAP(SDValue Op) argument
888 ExpandBITREVERSE(SDValue Op) argument
931 ExpandVSELECT(SDValue Op) argument
978 ExpandUINT_TO_FLOAT(SDValue Op) argument
1019 ExpandFNEG(SDValue Op) argument
1030 ExpandCTLZ_CTTZ_ZERO_UNDEF(SDValue Op) argument
1042 UnrollVSETCC(SDValue Op) argument
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/external/llvm/lib/Target/X86/InstPrinter/
H A DX86ATTInstPrinter.cpp72 void X86ATTInstPrinter::printSSEAVXCC(const MCInst *MI, unsigned Op, argument
74 int64_t Imm = MI->getOperand(Op).getImm();
112 void X86ATTInstPrinter::printXOPCC(const MCInst *MI, unsigned Op, argument
114 int64_t Imm = MI->getOperand(Op).getImm();
128 void X86ATTInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op, argument
130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
144 const MCOperand &Op = MI->getOperand(OpNo); local
145 if (Op.isImm())
146 O << formatImm(Op.getImm());
148 assert(Op
164 const MCOperand &Op = MI->getOperand(OpNo); local
195 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument
239 printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument
258 printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument
269 printMemOffset(const MCInst *MI, unsigned Op, raw_ostream &O) argument
292 printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O) argument
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H A DX86IntelInstPrinter.cpp54 void X86IntelInstPrinter::printSSEAVXCC(const MCInst *MI, unsigned Op, argument
56 int64_t Imm = MI->getOperand(Op).getImm();
94 void X86IntelInstPrinter::printXOPCC(const MCInst *MI, unsigned Op, argument
96 int64_t Imm = MI->getOperand(Op).getImm();
110 void X86IntelInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op, argument
112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
125 const MCOperand &Op = MI->getOperand(OpNo); local
126 if (Op.isImm())
127 O << formatImm(Op.getImm());
129 assert(Op
146 const MCOperand &Op = MI->getOperand(OpNo); local
157 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument
209 printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument
223 printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument
231 printMemOffset(const MCInst *MI, unsigned Op, raw_ostream &O) argument
254 printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O) argument
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/external/swiftshader/third_party/LLVM/include/llvm/MC/
H A DMCWin64EH.h36 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg) argument
37 : Operation(Op), Label(L), Offset(0), Register(Reg) {
38 assert(Op == Win64EH::UOP_PushNonVol);
43 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg, unsigned Off) argument
44 : Operation(Op), Label(L), Offset(Off), Register(Reg) {
45 assert(Op == Win64EH::UOP_SetFPReg ||
46 Op == Win64EH::UOP_SaveNonVol ||
47 Op == Win64EH::UOP_SaveNonVolBig ||
48 Op == Win64EH::UOP_SaveXMM128 ||
49 Op
51 MCWin64EHInstruction(OpType Op, MCSymbol *L, bool Code) argument
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H A DMCInst.h98 MCOperand Op; local
99 Op.Kind = kRegister;
100 Op.RegVal = Reg;
101 return Op;
104 MCOperand Op; local
105 Op.Kind = kImmediate;
106 Op.ImmVal = Val;
107 return Op;
110 MCOperand Op; local
111 Op
116 MCOperand Op; local
135 setOpcode(unsigned Op) argument
143 addOperand(const MCOperand &Op) argument
153 insert(iterator I, const MCOperand &Op) argument
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/external/llvm/lib/Target/MSP430/InstPrinter/
H A DMSP430InstPrinter.cpp37 const MCOperand &Op = MI->getOperand(OpNo); local
38 if (Op.isImm())
39 O << Op.getImm();
41 assert(Op.isExpr() && "unknown pcrel immediate operand");
42 Op.getExpr()->print(O, &MAI);
49 const MCOperand &Op = MI->getOperand(OpNo); local
50 if (Op.isReg()) {
51 O << getRegisterName(Op.getReg());
52 } else if (Op.isImm()) {
53 O << '#' << Op
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/
H A DMSP430InstPrinter.cpp36 const MCOperand &Op = MI->getOperand(OpNo); local
37 if (Op.isImm())
38 O << Op.getImm();
40 assert(Op.isExpr() && "unknown pcrel immediate operand");
41 O << *Op.getExpr();
48 const MCOperand &Op = MI->getOperand(OpNo); local
49 if (Op.isReg()) {
50 O << getRegisterName(Op.getReg());
51 } else if (Op.isImm()) {
52 O << '#' << Op
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/external/skia/src/gpu/
H A DGrDrawOpTest.h26 #define GR_DRAW_OP_TEST_DEFINE(Op) \
27 std::unique_ptr<GrDrawOp> Op##__Test(GrPaint&& paint, SkRandom* random, GrContext* context, \
29 #define GR_DRAW_OP_TEST_FRIEND(Op) \
30 friend std::unique_ptr<GrDrawOp> Op##__Test(GrPaint&& paint, SkRandom* random, \
/external/llvm/lib/Target/BPF/InstPrinter/
H A DBPFInstPrinter.cpp55 const MCOperand &Op = MI->getOperand(OpNo); local
56 if (Op.isReg()) {
57 O << getRegisterName(Op.getReg());
58 } else if (Op.isImm()) {
59 O << (int32_t)Op.getImm();
61 assert(Op.isExpr() && "Expected an expression");
62 printExpr(Op.getExpr(), O);
83 const MCOperand &Op = MI->getOperand(OpNo); local
84 if (Op.isImm())
85 O << (uint64_t)Op
87 O << Op; local
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DMachineOperand.h472 MachineOperand Op(MachineOperand::MO_Immediate);
473 Op.setImm(Val);
474 return Op;
478 MachineOperand Op(MachineOperand::MO_CImmediate);
479 Op.Contents.CI = CI;
480 return Op;
484 MachineOperand Op(MachineOperand::MO_FPImmediate);
485 Op.Contents.CFP = CFP;
486 return Op;
495 MachineOperand Op(MachineOperan
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H A DMachineRegisterInfo.h348 MachineOperand *Op; member in class:llvm::MachineRegisterInfo::defusechain_iterator
349 explicit defusechain_iterator(MachineOperand *op) : Op(op) {
366 defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
367 defusechain_iterator() : Op(0) {}
370 return Op == x.Op;
377 bool atEnd() const { return Op == 0; }
381 assert(Op && "Cannot increment end iterator!");
382 Op
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/external/swiftshader/third_party/subzero/pydir/
H A Dgen_test_arith_ll.py20 def arith(Native, Type, Op):
30 Signed = Op in {'sdiv', 'srem', 'ashr'}
31 Name = mangle(Op, Type, Signed)
33 if Type == 'i1' and (Op not in {'and', 'or', 'xor'}):
42 lines = x.format(native=Native, type=Type, op=Op, name=Name,
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h35 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
40 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
44 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
46 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerFROUND32(SDValue Op, SelectionDA
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H A DR600ISelLowering.h34 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
66 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
71 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
77 SDValue lowerPrivateExtLoad(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerLOAD(SDValue Op, SelectionDA
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/external/llvm/lib/Target/XCore/InstPrinter/
H A DXCoreInstPrinter.cpp75 const MCOperand &Op = MI->getOperand(OpNo); local
76 if (Op.isReg()) {
77 printRegName(O, Op.getReg());
81 if (Op.isImm()) {
82 O << Op.getImm();
86 assert(Op.isExpr() && "unknown operand kind in printOperand");
87 printExpr(Op.getExpr(), &MAI, O);
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/InstPrinter/
H A DMBlazeInstPrinter.cpp37 const MCOperand &Op = MI->getOperand(OpNo); local
38 if (Op.isReg()) {
39 O << getRegisterName(Op.getReg());
40 } else if (Op.isImm()) {
41 O << (int32_t)Op.getImm();
43 assert(Op.isExpr() && "unknown operand kind in printOperand");
44 O << *Op.getExpr();
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/
H A DMBlazeAsmParser.cpp222 MBlazeOperand *Op = new MBlazeOperand(Token); local
223 Op->Tok.Data = Str.data();
224 Op->Tok.Length = Str.size();
225 Op->StartLoc = S;
226 Op->EndLoc = S;
227 return Op;
231 MBlazeOperand *Op = new MBlazeOperand(Register); local
232 Op->Reg.RegNum = RegNum;
233 Op->StartLoc = S;
234 Op
239 MBlazeOperand *Op = new MBlazeOperand(Immediate); local
247 MBlazeOperand *Op = new MBlazeOperand(Fsl); local
256 MBlazeOperand *Op = new MBlazeOperand(Memory); local
267 MBlazeOperand *Op = new MBlazeOperand(Memory); local
375 MBlazeOperand *Op; local
458 MBlazeOperand *Op; local
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