/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 164 * @param insn - The instruction with the reader function to use. The cursor 170 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) { argument 171 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor); 174 ++(insn->readerCursor); 182 * @param insn - See consumeByte(). 186 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) { argument 187 return insn->reader(insn 190 unconsumeByte(struct InternalInstruction* insn) argument 237 dbgprintf(struct InternalInstruction* insn, const char* format, ...) argument 264 setPrefixPresent(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 281 isPrefixAtLocation(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 301 readPrefixes(struct InternalInstruction* insn) argument 529 readOpcode(struct InternalInstruction* insn) argument 648 getIDWithAttrMask(uint16_t* instructionID, struct InternalInstruction* insn, uint8_t attrMask) argument 715 getID(struct InternalInstruction* insn) argument 905 readSIB(struct InternalInstruction* insn) argument 1003 readDisplacement(struct InternalInstruction* insn) argument 1047 readModRM(struct InternalInstruction* insn) argument 1258 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) argument 1308 readOpcodeModifier(struct InternalInstruction* insn) argument 1343 readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) argument 1393 readImmediate(struct InternalInstruction* insn, uint8_t size) argument 1446 readVVVV(struct InternalInstruction* insn) argument 1469 readOperands(struct InternalInstruction* insn) argument 1591 decodeInstruction(struct InternalInstruction* insn, byteReader_t reader, void* readerArg, dlog_t logger, void* loggerArg, uint64_t startLoc, DisassemblerMode mode) argument [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.cpp | 191 * @param insn - The instruction with the reader function to use. The cursor 197 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) { argument 198 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor); 201 ++(insn->readerCursor); 209 * @param insn - See consumeByte(). 213 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) { argument 214 return insn->reader(insn 217 unconsumeByte(struct InternalInstruction* insn) argument 264 dbgprintf(struct InternalInstruction* insn, const char* format, ...) argument 289 setPrefixPresent(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 306 isPrefixAtLocation(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 323 readPrefixes(struct InternalInstruction* insn) argument 676 readOpcode(struct InternalInstruction* insn) argument 792 getIDWithAttrMask(uint16_t* instructionID, struct InternalInstruction* insn, uint16_t attrMask) argument 873 getID(struct InternalInstruction* insn, const void *miiArg) argument 1176 readSIB(struct InternalInstruction* insn) argument 1269 readDisplacement(struct InternalInstruction* insn) argument 1314 readModRM(struct InternalInstruction* insn) argument 1538 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) argument 1590 readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) argument 1637 readImmediate(struct InternalInstruction* insn, uint8_t size) argument 1691 readVVVV(struct InternalInstruction* insn) argument 1721 readMaskRegister(struct InternalInstruction* insn) argument 1739 readOperands(struct InternalInstruction* insn) argument 1868 decodeInstruction( struct InternalInstruction *insn, byteReader_t reader, const void *readerArg, dlog_t logger, void *loggerArg, const void *miiArg, uint64_t startLoc, DisassemblerMode mode) argument [all...] |
/external/valgrind/none/tests/s390x/ |
H A D | fpext.c | 7 #define L2F(insn, initial, target,round) \ 11 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \ 15 #define F2L(insn, initial, type, round, cc) \ 19 asm volatile(insn(round,0,2,0) \ 27 #define DO_INSN_L2F32(insn, round) \ 30 printf(#insn " %f\n", L2F(insn, 0, f32, round)); \ 31 printf(#insn " %f\n", L2F(insn, 1, f32, round)); \ 32 printf(#insn " [all...] |
H A D | comp-1.c | 21 #define SCOMP_REG_REG(insn, v1, v2) \ 26 asm volatile( #insn " %1, %2\n\t" \ 33 #insn, op1, op2, cc); \ 38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \ 43 asm volatile( #insn " %1, %2\n\t" \ 50 #insn, op1, (int64_t)op2, cc); \ 55 #define SCOMP_REG_IMM(insn, v1, v2) \ 59 asm volatile( insn(8, v2) \ 66 #insn, op1, (int64_t)v2, cc); \ 69 /* Run a sequence of signed comparisons for a given insn */ [all...] |
H A D | fpconv.c | 12 We do not test rounding here. Just making sure the insn selector 13 picks the correct insn. 16 #define I2F(insn, initial, target_type) \ 20 asm volatile(insn " %0,%1\n\t" :"=f" (target) :"d"(source)); \ 21 printf(insn " %"PRId64" -> %f\n", source, target); \ 24 #define DO_INSN_I32_TO_F(insn, target_type) \ 27 I2F(insn, 0, target_type); \ 28 I2F(insn, 1, target_type); \ 29 I2F(insn, -1, target_type); \ 30 I2F(insn, 4 [all...] |
H A D | comp-2.c | 21 #define SCOMP_REG_REG(insn, v1, v2) \ 26 asm volatile( #insn " %1, %2\n\t" \ 33 #insn, op1, op2, cc); \ 38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \ 43 asm volatile( #insn " %1, %2\n\t" \ 50 #insn, op1, (uint64_t)op2, cc); \ 55 #define SCOMP_REG_IMM(insn, v1, v2) \ 59 asm volatile( insn(8, v2) \ 66 #insn, op1, (uint64_t)v2, cc); \ 69 /* Run a sequence of unsigned comparisons for a given insn */ [all...] |
H A D | condloadstore.c | 5 #define LOAD_REG_MEM(insn, s, ccset, initial, mask) \ 19 insn(1,mask,5,000,00) \ 23 printf(#insn " %16.16lX into %16.16lX if mask" \ 29 #define LOAD_REG_REG(insn, s, ccset, initial, mask) \ 42 insn(mask,1,2) \ 46 printf(#insn " %16.16lX into %16.16lX if mask" \ 51 #define STORE_REG_REG(insn, s, ccset, initial, mask) \ 65 insn(1,mask,5,000,00) \ 69 printf(#insn " %16.16lX into %16.16lX if mask" \ 75 #define INSNVALCCINIT(insn, valu [all...] |
H A D | dfpext.c | 7 #define L2D(insn, initial, target,round) \ 11 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \ 15 #define I2D(insn, initial, target,round) \ 19 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \ 23 #define D2L(insn, initial, type, round, cc) \ 27 asm volatile(insn(round,0,2,0) \ 34 #define D2I(insn, initial, type, round, cc) \ 38 asm volatile(insn(round,0,2,0) \ 46 #define DO_PRINT_L2D(insn, l, d, round) \ 48 printf(#insn " roun [all...] |
/external/libpcap/ |
H A D | bpf_dump.c | 32 const struct bpf_insn *insn; local 36 insn = p->bf_insns; 39 for (i = 0; i < n; ++insn, ++i) { 40 printf("%u %u %u %u\n", insn->code, 41 insn->jt, insn->jf, insn->k); 46 for (i = 0; i < n; ++insn, ++i) 48 insn->code, insn [all...] |
/external/tcpdump/ |
H A D | bpf_dump.c | 35 struct bpf_insn *insn; local 39 insn = p->bf_insns; 42 for (i = 0; i < n; ++insn, ++i) { 43 printf("%u %u %u %u\n", insn->code, 44 insn->jt, insn->jf, insn->k); 49 for (i = 0; i < n; ++insn, ++i) 51 insn->code, insn [all...] |
/external/google-breakpad/src/third_party/libdisasm/ |
H A D | x86_insn.c | 11 int x86_insn_is_valid( x86_insn_t *insn ) { 12 if ( insn && insn->type != insn_invalid && insn->size > 0 ) { 19 uint32_t x86_get_address( x86_insn_t *insn ) { 21 if (! insn || ! insn->operands ) { 25 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { 40 int32_t x86_get_rel_offset( x86_insn_t *insn ) { 42 if (! insn || ! ins 155 x86_set_insn_addr( x86_insn_t *insn, uint32_t addr ) argument 159 x86_set_insn_offset( x86_insn_t *insn, unsigned int offset ) argument 163 x86_set_insn_function( x86_insn_t *insn, void * func ) argument 167 x86_set_insn_block( x86_insn_t *insn, void * block ) argument [all...] |
H A D | ia32_implicit.h | 11 unsigned int ia32_insn_implicit_ops( x86_insn_t *insn, unsigned int impl_idx );
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H A D | x86_operand_list.h | 6 x86_op_t * x86_operand_new( x86_insn_t *insn );
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H A D | x86_operand_list.c | 5 static void x86_oplist_append( x86_insn_t *insn, x86_oplist_t *op ) { argument 8 if (! insn ) { 12 list = insn->operands; 14 insn->operand_count = 1; 20 insn->explicit_count = 1; 21 insn->operands = op; 29 insn->operand_count = insn->operand_count + 1; 30 insn->explicit_count = insn 71 x86_operand_foreach( x86_insn_t *insn, x86_operand_fn func, void *arg, enum x86_op_foreach_type type ) argument 149 count_operand( x86_op_t *op, x86_insn_t *insn, void *arg ) argument 154 x86_operand_count( x86_insn_t *insn, enum x86_op_foreach_type type ) argument [all...] |
H A D | ia32_insn.c | 47 /* these are not used in stack insn */ 55 /* determine what this insn does to the stack */ 56 static void ia32_stack_mod(x86_insn_t *insn) { argument 59 if (! insn || ! insn->operands ) { 63 dest = &insn->operands->op; 65 src = &insn->operands->next->op; 68 insn->stack_mod = 0; 69 insn->stack_mod_val = 0; 71 switch ( insn 169 ia32_handle_cpu( x86_insn_t *insn, unsigned int cpu ) argument 176 ia32_handle_mnemtype(x86_insn_t *insn, unsigned int mnemtype) argument 184 ia32_handle_notes(x86_insn_t *insn, unsigned int notes) argument 189 ia32_handle_eflags( x86_insn_t *insn, unsigned int eflags) argument 216 ia32_handle_prefix( x86_insn_t *insn, unsigned int prefixes ) argument 242 reg_32_to_16( x86_op_t *op, x86_insn_t *insn, void *arg ) argument 253 handle_insn_metadata( x86_insn_t *insn, ia32_insn_t *raw_insn ) argument 261 ia32_decode_insn( unsigned char *buf, size_t buf_len, ia32_insn_t *raw_insn, x86_insn_t *insn, unsigned int prefixes ) argument [all...] |
H A D | x86_disasm.c | 18 x86_insn_t *insn ){ 22 if ( ! buf || ! insn || ! buf_len ) { 29 memset( insn, 0, sizeof(x86_insn_t) ); 30 insn->addr = buf_rva + offset; 31 insn->offset = offset; 32 /* default to invalid insn */ 33 insn->type = insn_invalid; 34 insn->group = insn_none; 52 size = ia32_disasm_addr( bytes, len, insn); 63 MAKE_INVALID( insn, byte 76 x86_insn_t insn; local 131 x86_insn_t insn; local [all...] |
H A D | ia32_operand.h | 8 x86_insn_t *insn, unsigned int raw_op,
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
H A D | nv50_ir_emit_gm107.cpp | 49 const Instruction *insn; member in class:nv50_ir::CodeEmitterGM107 106 emitRND(pos, insn->rnd, -1); 234 if (insn->predSrc >= 0) { 235 emitField(16, 3, insn->getSrc(insn->predSrc)->rep()->reg.data.id); 236 emitField(19, 1, insn->cc == CC_NOT_P); 316 if (isFloatType(insn->sType)) { 335 if (insn->sType == TYPE_F32 || insn->sType == TYPE_F16) { 338 } else if (insn 517 const FlowInstruction *insn = this->insn->asFlow(); local 554 const FlowInstruction *insn = this->insn->asFlow(); local 583 const FlowInstruction *insn = this->insn->asFlow(); local 605 const FlowInstruction *insn = this->insn->asFlow(); local 627 const FlowInstruction *insn = this->insn->asFlow(); local 649 const FlowInstruction *insn = this->insn->asFlow(); local 1120 const CmpInstruction *insn = this->insn->asCmp(); local 1168 const CmpInstruction *insn = this->insn->asCmp(); local 1444 const CmpInstruction *insn = this->insn->asCmp(); local 1490 const CmpInstruction *insn = this->insn->asCmp(); local 1539 const CmpInstruction *insn = this->insn->asCmp(); local 1879 const CmpInstruction *insn = this->insn->asCmp(); local 1925 const CmpInstruction *insn = this->insn->asCmp(); local 1971 const CmpInstruction *insn = this->insn->asCmp(); local 2571 const TexInstruction *insn = this->insn->asTex(); local 2613 const TexInstruction *insn = this->insn->asTex(); local 2638 const TexInstruction *insn = this->insn->asTex(); local 2668 const TexInstruction *insn = this->insn->asTex(); local 2691 const TexInstruction *insn = this->insn->asTex(); local 2714 const TexInstruction *insn = this->insn->asTex(); local 2885 const TexInstruction *insn = this->insn->asTex(); local 2912 const TexInstruction *insn = this->insn->asTex(); local 2929 const TexInstruction *insn = this->insn->asTex(); local 2947 const TexInstruction *insn = this->insn->asTex(); local 2977 const TexInstruction *insn = this->insn->asTex(); local 3503 LiveBarUse(Instruction *insn, Instruction *usei) argument 3505 Instruction *insn; member in struct:nv50_ir::SchedDataCalculatorGM107::LiveBarUse 3510 LiveBarDef(Instruction *insn, Instruction *defi) argument 3512 Instruction *insn; member in struct:nv50_ir::SchedDataCalculatorGM107::LiveBarDef 3526 emitStall(Instruction *insn, uint8_t cnt) argument [all...] |
H A D | nv50_ir_target_gm107.cpp | 77 TargetGM107::isReuseSupported(const Instruction *insn) const 79 const OpClass cl = getOpClass(insn->op); 90 if (insn->op == OP_INSBF || insn->op == OP_EXTBF) 104 TargetGM107::isBarrierRequired(const Instruction *insn) const 106 const OpClass cl = getOpClass(insn->op); 108 if (insn->dType == TYPE_F64 || insn->sType == TYPE_F64) 119 switch (insn->op) { 134 switch (insn [all...] |
/external/libchrome/sandbox/linux/bpf_dsl/ |
H A D | verifier.cc | 35 void Ld(State* state, const struct sock_filter& insn, const char** err) { argument 36 if (BPF_SIZE(insn.code) != BPF_W || BPF_MODE(insn.code) != BPF_ABS || 37 insn.jt != 0 || insn.jf != 0) { 41 if (insn.k < sizeof(struct arch_seccomp_data) && (insn.k & 3) == 0) { 44 reinterpret_cast<const char*>(&state->data) + insn.k, 4); 53 void Jmp(State* state, const struct sock_filter& insn, const char** err) { argument 54 if (BPF_OP(insn 103 Ret(State*, const struct sock_filter& insn, const char** err) argument 111 Alu(State* state, const struct sock_filter& insn, const char** err) argument 189 const struct sock_filter& insn = program[state.ip]; local [all...] |
H A D | dump_bpf.cc | 81 void AppendInstruction(std::string* dst, size_t pc, const sock_filter& insn) { argument 83 switch (BPF_CLASS(insn.code)) { 85 if (insn.code == BPF_LD + BPF_W + BPF_ABS) { 86 base::StringAppendF(dst, "LOAD %" PRIu32 " // ", insn.k); 88 (insn.k - offsetof(struct arch_seccomp_data, args)) / 90 if (maybe_argno < 6 && insn.k == SECCOMP_ARG_LSB_IDX(maybe_argno)) { 93 insn.k == SECCOMP_ARG_MSB_IDX(maybe_argno)) { 96 base::StringAppendF(dst, "%s\n", DataOffsetName(insn.k)); 103 if (BPF_OP(insn.code) == BPF_JA) { 104 base::StringAppendF(dst, "JMP %zu\n", pc + insn [all...] |
/external/mesa3d/src/intel/tools/ |
H A D | disasm.c | 57 brw_inst *insn = assembly + offset; local 59 bool compacted = brw_inst_cmpt_control(devinfo, insn); 64 brw_compact_inst *compacted = (void *)insn; 67 ((uint32_t *)insn)[1], 68 ((uint32_t *)insn)[0]); 72 insn = &uncompacted; 77 ((uint32_t *)insn)[3], 78 ((uint32_t *)insn)[2], 79 ((uint32_t *)insn)[1], 80 ((uint32_t *)insn)[ [all...] |
/external/valgrind/memcheck/tests/amd64/ |
H A D | insn-pcmpistri.stderr.exp | 2 at 0x........: aligned_strlen (insn-pcmpistri.c:21) 3 by 0x........: test_strlen (insn-pcmpistri.c:62) 4 by 0x........: doit (insn-pcmpistri.c:74) 5 by 0x........: main (insn-pcmpistri.c:79) 8 at 0x........: doit (insn-pcmpistri.c:73) 9 by 0x........: main (insn-pcmpistri.c:79) 13 at 0x........: aligned_strlen (insn-pcmpistri.c:21) 14 by 0x........: test_strlen (insn-pcmpistri.c:62) 15 by 0x........: doit (insn-pcmpistri.c:74) 16 by 0x........: main (insn [all...] |
H A D | insn-pmovmskb.stderr.exp | 2 at 0x........: use (insn-pmovmskb.c:48) 3 by 0x........: doit (insn-pmovmskb.c:69) 4 by 0x........: main (insn-pmovmskb.c:140) 8 at 0x........: use (insn-pmovmskb.c:48) 9 by 0x........: doit (insn-pmovmskb.c:73) 10 by 0x........: main (insn-pmovmskb.c:140) 14 at 0x........: use (insn-pmovmskb.c:48) 15 by 0x........: doit (insn-pmovmskb.c:77) 16 by 0x........: main (insn-pmovmskb.c:140) 20 at 0x........: use (insn [all...] |
/external/llvm/test/MC/Mips/ |
H A D | insn-directive.s | 11 .insn 17 .insn 23 .insn 29 .insn 37 .insn 43 .insn 49 .insn 55 .insn 58 # Verify that .insn causes the currently saved labels to be cleared by checking 62 .insn [all...] |