Searched refs:set_reg (Results 1 - 8 of 8) sorted by relevance

/external/libunwind/src/dwarf/
H A DGparser.c51 set_reg (dwarf_state_record_t *sr, unw_word_t regnum, dwarf_where_t where, function
154 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
163 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
172 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
219 set_reg (sr, regnum, DWARF_WHERE_UNDEF, 0);
226 set_reg (sr, regnum, DWARF_WHERE_SAME, 0);
234 set_reg (sr, regnum, DWARF_WHERE_REG, val);
271 set_reg (sr, DWARF_CFA_REG_COLUMN, DWARF_WHERE_REG, regnum);
272 set_reg (sr, DWARF_CFA_OFF_COLUMN, 0, val); /* NOT factored! */
280 set_reg (s
[all...]
/external/libunwind/src/ia64/
H A DGparser.c155 set_reg (struct ia64_reg_info *reg, enum ia64_where where, int when, function
299 set_reg (sr->curr.reg + unw.save_order[i], IA64_WHERE_GR,
328 set_reg (sr->curr.reg + IA64_REG_B1 + i, IA64_WHERE_GR,
343 set_reg (sr->curr.reg + IA64_REG_B1 + i, IA64_WHERE_SPILL_HOME,
361 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_SPILL_HOME,
372 set_reg (sr->curr.reg + base + i, IA64_WHERE_SPILL_HOME,
389 set_reg (sr->curr.reg + IA64_REG_F2 + i, IA64_WHERE_SPILL_HOME,
406 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_GR,
421 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_SPILL_HOME,
432 set_reg (s
[all...]
/external/v8/src/arm64/
H A Dsimulator-arm64.h355 void set_reg(unsigned code, T value,
361 // Common specialized accessors for the set_reg() template.
364 set_reg(code, value, r31mode);
369 set_reg(code, value, r31mode);
396 set_reg(kLinkRegCode, value);
402 set_reg(31, value, Reg31IsStackPointer);
H A Dsimulator-arm64.cc940 set_reg<T>(instr->Rd(), new_val);
1015 set_reg<T>(instr->Rd(), result);
1334 set_reg(instr->Rd(), instr->ImmPCOffsetTarget());
1446 set_reg<T>(instr->Rd(), new_val, instr->RdMode());
1546 set_reg<T>(instr->Rd(), result, instr->RdMode());
1905 set_reg(addr_reg, address + offset, Reg31IsStackPointer);
2099 set_reg<T>(instr->Rd(), result);
2221 set_reg<T>(instr->Rd(), result);
/external/libunwind/include/
H A Dlibunwind-common.h.in220 #define unw_set_reg UNW_OBJ(set_reg)
H A Dlibunwind-common.h253 #define unw_set_reg UNW_OBJ(set_reg)
/external/mesa3d/src/gallium/drivers/radeon/
H A Dradeon_uvd.c103 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val) function
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
124 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
127 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
128 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
130 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
1149 set_reg(dec, RUVD_ENGINE_CNTL, 1);
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.h970 void set_reg(unsigned code,
977 // Common specialized accessors for the set_reg() template.
1034 void set_reg(unsigned size,
1042 // Common specialized accessors for the set_reg() template.

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