1//===-- LiveRangeEdit.cpp - Basic tools for editing a register live range -===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// The LiveRangeEdit class represents changes done to a virtual register when it
11// is spilled or split.
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/LiveRangeEdit.h"
15#include "llvm/ADT/Statistic.h"
16#include "llvm/CodeGen/CalcSpillWeights.h"
17#include "llvm/CodeGen/LiveIntervalAnalysis.h"
18#include "llvm/CodeGen/MachineRegisterInfo.h"
19#include "llvm/CodeGen/VirtRegMap.h"
20#include "llvm/Support/Debug.h"
21#include "llvm/Support/raw_ostream.h"
22#include "llvm/Target/TargetInstrInfo.h"
23
24using namespace llvm;
25
26#define DEBUG_TYPE "regalloc"
27
28STATISTIC(NumDCEDeleted,     "Number of instructions deleted by DCE");
29STATISTIC(NumDCEFoldedLoads, "Number of single use loads folded after DCE");
30STATISTIC(NumFracRanges,     "Number of live ranges fractured by DCE");
31
32void LiveRangeEdit::Delegate::anchor() { }
33
34LiveInterval &LiveRangeEdit::createEmptyIntervalFrom(unsigned OldReg) {
35  unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
36  if (VRM) {
37    VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
38  }
39  LiveInterval &LI = LIS.createEmptyInterval(VReg);
40  return LI;
41}
42
43unsigned LiveRangeEdit::createFrom(unsigned OldReg) {
44  unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
45  if (VRM) {
46    VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
47  }
48  return VReg;
49}
50
51bool LiveRangeEdit::checkRematerializable(VNInfo *VNI,
52                                          const MachineInstr *DefMI,
53                                          AliasAnalysis *aa) {
54  assert(DefMI && "Missing instruction");
55  ScannedRemattable = true;
56  if (!TII.isTriviallyReMaterializable(*DefMI, aa))
57    return false;
58  Remattable.insert(VNI);
59  return true;
60}
61
62void LiveRangeEdit::scanRemattable(AliasAnalysis *aa) {
63  for (VNInfo *VNI : getParent().valnos) {
64    if (VNI->isUnused())
65      continue;
66    unsigned Original = VRM->getOriginal(getReg());
67    LiveInterval &OrigLI = LIS.getInterval(Original);
68    VNInfo *OrigVNI = OrigLI.getVNInfoAt(VNI->def);
69    MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def);
70    if (!DefMI)
71      continue;
72    checkRematerializable(OrigVNI, DefMI, aa);
73  }
74  ScannedRemattable = true;
75}
76
77bool LiveRangeEdit::anyRematerializable(AliasAnalysis *aa) {
78  if (!ScannedRemattable)
79    scanRemattable(aa);
80  return !Remattable.empty();
81}
82
83/// allUsesAvailableAt - Return true if all registers used by OrigMI at
84/// OrigIdx are also available with the same value at UseIdx.
85bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
86                                       SlotIndex OrigIdx,
87                                       SlotIndex UseIdx) const {
88  OrigIdx = OrigIdx.getRegSlot(true);
89  UseIdx = UseIdx.getRegSlot(true);
90  for (unsigned i = 0, e = OrigMI->getNumOperands(); i != e; ++i) {
91    const MachineOperand &MO = OrigMI->getOperand(i);
92    if (!MO.isReg() || !MO.getReg() || !MO.readsReg())
93      continue;
94
95    // We can't remat physreg uses, unless it is a constant.
96    if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
97      if (MRI.isConstantPhysReg(MO.getReg(), *OrigMI->getParent()->getParent()))
98        continue;
99      return false;
100    }
101
102    LiveInterval &li = LIS.getInterval(MO.getReg());
103    const VNInfo *OVNI = li.getVNInfoAt(OrigIdx);
104    if (!OVNI)
105      continue;
106
107    // Don't allow rematerialization immediately after the original def.
108    // It would be incorrect if OrigMI redefines the register.
109    // See PR14098.
110    if (SlotIndex::isSameInstr(OrigIdx, UseIdx))
111      return false;
112
113    if (OVNI != li.getVNInfoAt(UseIdx))
114      return false;
115  }
116  return true;
117}
118
119bool LiveRangeEdit::canRematerializeAt(Remat &RM, VNInfo *OrigVNI,
120                                       SlotIndex UseIdx, bool cheapAsAMove) {
121  assert(ScannedRemattable && "Call anyRematerializable first");
122
123  // Use scanRemattable info.
124  if (!Remattable.count(OrigVNI))
125    return false;
126
127  // No defining instruction provided.
128  SlotIndex DefIdx;
129  assert(RM.OrigMI && "No defining instruction for remattable value");
130  DefIdx = LIS.getInstructionIndex(*RM.OrigMI);
131
132  // If only cheap remats were requested, bail out early.
133  if (cheapAsAMove && !TII.isAsCheapAsAMove(*RM.OrigMI))
134    return false;
135
136  // Verify that all used registers are available with the same values.
137  if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx))
138    return false;
139
140  return true;
141}
142
143SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB,
144                                         MachineBasicBlock::iterator MI,
145                                         unsigned DestReg,
146                                         const Remat &RM,
147                                         const TargetRegisterInfo &tri,
148                                         bool Late) {
149  assert(RM.OrigMI && "Invalid remat");
150  TII.reMaterialize(MBB, MI, DestReg, 0, *RM.OrigMI, tri);
151  // DestReg of the cloned instruction cannot be Dead. Set isDead of DestReg
152  // to false anyway in case the isDead flag of RM.OrigMI's dest register
153  // is true.
154  (*--MI).getOperand(0).setIsDead(false);
155  Rematted.insert(RM.ParentVNI);
156  return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot();
157}
158
159void LiveRangeEdit::eraseVirtReg(unsigned Reg) {
160  if (TheDelegate && TheDelegate->LRE_CanEraseVirtReg(Reg))
161    LIS.removeInterval(Reg);
162}
163
164bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
165                               SmallVectorImpl<MachineInstr*> &Dead) {
166  MachineInstr *DefMI = nullptr, *UseMI = nullptr;
167
168  // Check that there is a single def and a single use.
169  for (MachineOperand &MO : MRI.reg_nodbg_operands(LI->reg)) {
170    MachineInstr *MI = MO.getParent();
171    if (MO.isDef()) {
172      if (DefMI && DefMI != MI)
173        return false;
174      if (!MI->canFoldAsLoad())
175        return false;
176      DefMI = MI;
177    } else if (!MO.isUndef()) {
178      if (UseMI && UseMI != MI)
179        return false;
180      // FIXME: Targets don't know how to fold subreg uses.
181      if (MO.getSubReg())
182        return false;
183      UseMI = MI;
184    }
185  }
186  if (!DefMI || !UseMI)
187    return false;
188
189  // Since we're moving the DefMI load, make sure we're not extending any live
190  // ranges.
191  if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI),
192                          LIS.getInstructionIndex(*UseMI)))
193    return false;
194
195  // We also need to make sure it is safe to move the load.
196  // Assume there are stores between DefMI and UseMI.
197  bool SawStore = true;
198  if (!DefMI->isSafeToMove(nullptr, SawStore))
199    return false;
200
201  DEBUG(dbgs() << "Try to fold single def: " << *DefMI
202               << "       into single use: " << *UseMI);
203
204  SmallVector<unsigned, 8> Ops;
205  if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
206    return false;
207
208  MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS);
209  if (!FoldMI)
210    return false;
211  DEBUG(dbgs() << "                folded: " << *FoldMI);
212  LIS.ReplaceMachineInstrInMaps(*UseMI, *FoldMI);
213  UseMI->eraseFromParent();
214  DefMI->addRegisterDead(LI->reg, nullptr);
215  Dead.push_back(DefMI);
216  ++NumDCEFoldedLoads;
217  return true;
218}
219
220bool LiveRangeEdit::useIsKill(const LiveInterval &LI,
221                              const MachineOperand &MO) const {
222  const MachineInstr &MI = *MO.getParent();
223  SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
224  if (LI.Query(Idx).isKill())
225    return true;
226  const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
227  unsigned SubReg = MO.getSubReg();
228  LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg);
229  for (const LiveInterval::SubRange &S : LI.subranges()) {
230    if ((S.LaneMask & LaneMask) != 0 && S.Query(Idx).isKill())
231      return true;
232  }
233  return false;
234}
235
236/// Find all live intervals that need to shrink, then remove the instruction.
237void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
238                                     AliasAnalysis *AA) {
239  assert(MI->allDefsAreDead() && "Def isn't really dead");
240  SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
241
242  // Never delete a bundled instruction.
243  if (MI->isBundled()) {
244    return;
245  }
246  // Never delete inline asm.
247  if (MI->isInlineAsm()) {
248    DEBUG(dbgs() << "Won't delete: " << Idx << '\t' << *MI);
249    return;
250  }
251
252  // Use the same criteria as DeadMachineInstructionElim.
253  bool SawStore = false;
254  if (!MI->isSafeToMove(nullptr, SawStore)) {
255    DEBUG(dbgs() << "Can't delete: " << Idx << '\t' << *MI);
256    return;
257  }
258
259  DEBUG(dbgs() << "Deleting dead def " << Idx << '\t' << *MI);
260
261  // Collect virtual registers to be erased after MI is gone.
262  SmallVector<unsigned, 8> RegsToErase;
263  bool ReadsPhysRegs = false;
264  bool isOrigDef = false;
265  unsigned Dest;
266  if (VRM && MI->getOperand(0).isReg()) {
267    Dest = MI->getOperand(0).getReg();
268    unsigned Original = VRM->getOriginal(Dest);
269    LiveInterval &OrigLI = LIS.getInterval(Original);
270    VNInfo *OrigVNI = OrigLI.getVNInfoAt(Idx);
271    // The original live-range may have been shrunk to
272    // an empty live-range. It happens when it is dead, but
273    // we still keep it around to be able to rematerialize
274    // other values that depend on it.
275    if (OrigVNI)
276      isOrigDef = SlotIndex::isSameInstr(OrigVNI->def, Idx);
277  }
278
279  // Check for live intervals that may shrink
280  for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
281         MOE = MI->operands_end(); MOI != MOE; ++MOI) {
282    if (!MOI->isReg())
283      continue;
284    unsigned Reg = MOI->getReg();
285    if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
286      // Check if MI reads any unreserved physregs.
287      if (Reg && MOI->readsReg() && !MRI.isReserved(Reg))
288        ReadsPhysRegs = true;
289      else if (MOI->isDef())
290        LIS.removePhysRegDefAt(Reg, Idx);
291      continue;
292    }
293    LiveInterval &LI = LIS.getInterval(Reg);
294
295    // Shrink read registers, unless it is likely to be expensive and
296    // unlikely to change anything. We typically don't want to shrink the
297    // PIC base register that has lots of uses everywhere.
298    // Always shrink COPY uses that probably come from live range splitting.
299    if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) ||
300        (MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI))))
301      ToShrink.insert(&LI);
302
303    // Remove defined value.
304    if (MOI->isDef()) {
305      if (TheDelegate && LI.getVNInfoAt(Idx) != nullptr)
306        TheDelegate->LRE_WillShrinkVirtReg(LI.reg);
307      LIS.removeVRegDefAt(LI, Idx);
308      if (LI.empty())
309        RegsToErase.push_back(Reg);
310    }
311  }
312
313  // Currently, we don't support DCE of physreg live ranges. If MI reads
314  // any unreserved physregs, don't erase the instruction, but turn it into
315  // a KILL instead. This way, the physreg live ranges don't end up
316  // dangling.
317  // FIXME: It would be better to have something like shrinkToUses() for
318  // physregs. That could potentially enable more DCE and it would free up
319  // the physreg. It would not happen often, though.
320  if (ReadsPhysRegs) {
321    MI->setDesc(TII.get(TargetOpcode::KILL));
322    // Remove all operands that aren't physregs.
323    for (unsigned i = MI->getNumOperands(); i; --i) {
324      const MachineOperand &MO = MI->getOperand(i-1);
325      if (MO.isReg() && TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
326        continue;
327      MI->RemoveOperand(i-1);
328    }
329    DEBUG(dbgs() << "Converted physregs to:\t" << *MI);
330  } else {
331    // If the dest of MI is an original reg and MI is reMaterializable,
332    // don't delete the inst. Replace the dest with a new reg, and keep
333    // the inst for remat of other siblings. The inst is saved in
334    // LiveRangeEdit::DeadRemats and will be deleted after all the
335    // allocations of the func are done.
336    if (isOrigDef && DeadRemats && TII.isTriviallyReMaterializable(*MI, AA)) {
337      LiveInterval &NewLI = createEmptyIntervalFrom(Dest);
338      VNInfo *VNI = NewLI.getNextValue(Idx, LIS.getVNInfoAllocator());
339      NewLI.addSegment(LiveInterval::Segment(Idx, Idx.getDeadSlot(), VNI));
340      pop_back();
341      markDeadRemat(MI);
342      const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
343      MI->substituteRegister(Dest, NewLI.reg, 0, TRI);
344      MI->getOperand(0).setIsDead(true);
345    } else {
346      if (TheDelegate)
347        TheDelegate->LRE_WillEraseInstruction(MI);
348      LIS.RemoveMachineInstrFromMaps(*MI);
349      MI->eraseFromParent();
350      ++NumDCEDeleted;
351    }
352  }
353
354  // Erase any virtregs that are now empty and unused. There may be <undef>
355  // uses around. Keep the empty live range in that case.
356  for (unsigned i = 0, e = RegsToErase.size(); i != e; ++i) {
357    unsigned Reg = RegsToErase[i];
358    if (LIS.hasInterval(Reg) && MRI.reg_nodbg_empty(Reg)) {
359      ToShrink.remove(&LIS.getInterval(Reg));
360      eraseVirtReg(Reg);
361    }
362  }
363}
364
365void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr *> &Dead,
366                                      ArrayRef<unsigned> RegsBeingSpilled,
367                                      AliasAnalysis *AA) {
368  ToShrinkSet ToShrink;
369
370  for (;;) {
371    // Erase all dead defs.
372    while (!Dead.empty())
373      eliminateDeadDef(Dead.pop_back_val(), ToShrink, AA);
374
375    if (ToShrink.empty())
376      break;
377
378    // Shrink just one live interval. Then delete new dead defs.
379    LiveInterval *LI = ToShrink.back();
380    ToShrink.pop_back();
381    if (foldAsLoad(LI, Dead))
382      continue;
383    unsigned VReg = LI->reg;
384    if (TheDelegate)
385      TheDelegate->LRE_WillShrinkVirtReg(VReg);
386    if (!LIS.shrinkToUses(LI, &Dead))
387      continue;
388
389    // Don't create new intervals for a register being spilled.
390    // The new intervals would have to be spilled anyway so its not worth it.
391    // Also they currently aren't spilled so creating them and not spilling
392    // them results in incorrect code.
393    bool BeingSpilled = false;
394    for (unsigned i = 0, e = RegsBeingSpilled.size(); i != e; ++i) {
395      if (VReg == RegsBeingSpilled[i]) {
396        BeingSpilled = true;
397        break;
398      }
399    }
400
401    if (BeingSpilled) continue;
402
403    // LI may have been separated, create new intervals.
404    LI->RenumberValues();
405    SmallVector<LiveInterval*, 8> SplitLIs;
406    LIS.splitSeparateComponents(*LI, SplitLIs);
407    if (!SplitLIs.empty())
408      ++NumFracRanges;
409
410    unsigned Original = VRM ? VRM->getOriginal(VReg) : 0;
411    for (const LiveInterval *SplitLI : SplitLIs) {
412      // If LI is an original interval that hasn't been split yet, make the new
413      // intervals their own originals instead of referring to LI. The original
414      // interval must contain all the split products, and LI doesn't.
415      if (Original != VReg && Original != 0)
416        VRM->setIsSplitFromReg(SplitLI->reg, Original);
417      if (TheDelegate)
418        TheDelegate->LRE_DidCloneVirtReg(SplitLI->reg, VReg);
419    }
420  }
421}
422
423// Keep track of new virtual registers created via
424// MachineRegisterInfo::createVirtualRegister.
425void
426LiveRangeEdit::MRI_NoteNewVirtualRegister(unsigned VReg)
427{
428  if (VRM)
429    VRM->grow();
430
431  NewRegs.push_back(VReg);
432}
433
434void
435LiveRangeEdit::calculateRegClassAndHint(MachineFunction &MF,
436                                        const MachineLoopInfo &Loops,
437                                        const MachineBlockFrequencyInfo &MBFI) {
438  VirtRegAuxInfo VRAI(MF, LIS, VRM, Loops, MBFI);
439  for (unsigned I = 0, Size = size(); I < Size; ++I) {
440    LiveInterval &LI = LIS.getInterval(get(I));
441    if (MRI.recomputeRegClass(LI.reg))
442      DEBUG({
443        const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
444        dbgs() << "Inflated " << PrintReg(LI.reg) << " to "
445               << TRI->getRegClassName(MRI.getRegClass(LI.reg)) << '\n';
446      });
447    VRAI.calculateSpillWeightAndHint(LI);
448  }
449}
450