1//===----------------------------------------------------------------------===//
2// MicroMIPS Base Classes
3//===----------------------------------------------------------------------===//
4
5//
6// Base class for MicroMips instructions.
7// This class does not depend on the instruction size.
8//
9class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10                        InstrItinClass itin, Format f> : Instruction
11{
12  let Namespace = "Mips";
13  let DecoderNamespace = "MicroMips";
14
15  let OutOperandList = outs;
16  let InOperandList  = ins;
17
18  let AsmString   = asmstr;
19  let Pattern     = pattern;
20  let Itinerary   = itin;
21
22  let Predicates = [InMicroMips];
23
24  Format Form = f;
25}
26
27//
28// Base class for MicroMIPS 16-bit instructions.
29//
30class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31               InstrItinClass itin, Format f> :
32  MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
33{
34  let Size = 2;
35  field bits<16> Inst;
36  field bits<16> SoftFail = 0;
37  bits<6> Opcode = 0x0;
38}
39
40//===----------------------------------------------------------------------===//
41// MicroMIPS 16-bit Instruction Formats
42//===----------------------------------------------------------------------===//
43
44class ARITH_FM_MM16<bit funct> {
45  bits<3> rd;
46  bits<3> rt;
47  bits<3> rs;
48
49  bits<16> Inst;
50
51  let Inst{15-10} = 0x01;
52  let Inst{9-7}   = rd;
53  let Inst{6-4}   = rt;
54  let Inst{3-1}   = rs;
55  let Inst{0}     = funct;
56}
57
58class ANDI_FM_MM16<bits<6> funct> {
59  bits<3> rd;
60  bits<3> rs;
61  bits<4> imm;
62
63  bits<16> Inst;
64
65  let Inst{15-10} = funct;
66  let Inst{9-7}   = rd;
67  let Inst{6-4}   = rs;
68  let Inst{3-0}   = imm;
69}
70
71class LOGIC_FM_MM16<bits<4> funct> {
72  bits<3> rt;
73  bits<3> rs;
74
75  bits<16> Inst;
76
77  let Inst{15-10} = 0x11;
78  let Inst{9-6}   = funct;
79  let Inst{5-3}   = rt;
80  let Inst{2-0}   = rs;
81}
82
83class SHIFT_FM_MM16<bits<1> funct> {
84  bits<3> rd;
85  bits<3> rt;
86  bits<3> shamt;
87
88  bits<16> Inst;
89
90  let Inst{15-10} = 0x09;
91  let Inst{9-7}   = rd;
92  let Inst{6-4}   = rt;
93  let Inst{3-1}   = shamt;
94  let Inst{0}     = funct;
95}
96
97class ADDIUR2_FM_MM16 {
98  bits<3> rd;
99  bits<3> rs;
100  bits<3> imm;
101
102  bits<16> Inst;
103
104  let Inst{15-10} = 0x1b;
105  let Inst{9-7}   = rd;
106  let Inst{6-4}   = rs;
107  let Inst{3-1}   = imm;
108  let Inst{0}     = 0;
109}
110
111class LOAD_STORE_FM_MM16<bits<6> op> {
112  bits<3> rt;
113  bits<7> addr;
114
115  bits<16> Inst;
116
117  let Inst{15-10} = op;
118  let Inst{9-7}   = rt;
119  let Inst{6-4}   = addr{6-4};
120  let Inst{3-0}   = addr{3-0};
121}
122
123class LOAD_STORE_SP_FM_MM16<bits<6> op> {
124  bits<5> rt;
125  bits<5> offset;
126
127  bits<16> Inst;
128
129  let Inst{15-10} = op;
130  let Inst{9-5}   = rt;
131  let Inst{4-0}   = offset;
132}
133
134class LOAD_GP_FM_MM16<bits<6> op> {
135  bits<3> rt;
136  bits<7> offset;
137
138  bits<16> Inst;
139
140  let Inst{15-10} = op;
141  let Inst{9-7} = rt;
142  let Inst{6-0} = offset;
143}
144
145class ADDIUS5_FM_MM16 {
146  bits<5> rd;
147  bits<4> imm;
148
149  bits<16> Inst;
150
151  let Inst{15-10} = 0x13;
152  let Inst{9-5}   = rd;
153  let Inst{4-1}   = imm;
154  let Inst{0}     = 0;
155}
156
157class ADDIUSP_FM_MM16 {
158  bits<9> imm;
159
160  bits<16> Inst;
161
162  let Inst{15-10} = 0x13;
163  let Inst{9-1}   = imm;
164  let Inst{0}     = 1;
165}
166
167class MOVE_FM_MM16<bits<6> funct> {
168  bits<5> rs;
169  bits<5> rd;
170
171  bits<16> Inst;
172
173  let Inst{15-10} = funct;
174  let Inst{9-5}   = rd;
175  let Inst{4-0}   = rs;
176}
177
178class LI_FM_MM16 {
179  bits<3> rd;
180  bits<7> imm;
181
182  bits<16> Inst;
183
184  let Inst{15-10} = 0x3b;
185  let Inst{9-7}   = rd;
186  let Inst{6-0}   = imm;
187}
188
189class JALR_FM_MM16<bits<5> op> {
190  bits<5> rs;
191
192  bits<16> Inst;
193
194  let Inst{15-10} = 0x11;
195  let Inst{9-5}   = op;
196  let Inst{4-0}   = rs;
197}
198
199class MFHILO_FM_MM16<bits<5> funct> {
200  bits<5> rd;
201
202  bits<16> Inst;
203
204  let Inst{15-10} = 0x11;
205  let Inst{9-5}   = funct;
206  let Inst{4-0}   = rd;
207}
208
209class JRADDIUSP_FM_MM16<bits<5> op> {
210  bits<5> rs;
211  bits<5> imm;
212
213  bits<16> Inst;
214
215  let Inst{15-10} = 0x11;
216  let Inst{9-5}   = op;
217  let Inst{4-0}   = imm;
218}
219
220class ADDIUR1SP_FM_MM16 {
221  bits<3> rd;
222  bits<6> imm;
223
224  bits<16> Inst;
225
226  let Inst{15-10} = 0x1b;
227  let Inst{9-7}   = rd;
228  let Inst{6-1}   = imm;
229  let Inst{0}     = 1;
230}
231
232class BRKSDBBP16_FM_MM<bits<6> op> {
233  bits<4> code_;
234  bits<16> Inst;
235
236  let Inst{15-10} = 0x11;
237  let Inst{9-4}   = op;
238  let Inst{3-0}   = code_;
239}
240
241class BEQNEZ_FM_MM16<bits<6> op> {
242  bits<3> rs;
243  bits<7> offset;
244
245  bits<16> Inst;
246
247  let Inst{15-10} = op;
248  let Inst{9-7}   = rs;
249  let Inst{6-0}   = offset;
250}
251
252class B16_FM {
253  bits<10> offset;
254
255  bits<16> Inst;
256
257  let Inst{15-10} = 0x33;
258  let Inst{9-0}   = offset;
259}
260
261class MOVEP_FM_MM16 {
262  bits<3> dst_regs;
263  bits<3> rt;
264  bits<3> rs;
265
266  bits<16> Inst;
267
268  let Inst{15-10} = 0x21;
269  let Inst{9-7}   = dst_regs;
270  let Inst{6-4}   = rt;
271  let Inst{3-1}   = rs;
272  let Inst{0}     = 0;
273}
274
275//===----------------------------------------------------------------------===//
276// MicroMIPS 32-bit Instruction Formats
277//===----------------------------------------------------------------------===//
278
279class MMArch {
280  string Arch = "micromips";
281}
282
283class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
284  bits<5> rt;
285  bits<5> rs;
286  bits<5> rd;
287
288  bits<32> Inst;
289
290  let Inst{31-26} = op;
291  let Inst{25-21} = rt;
292  let Inst{20-16} = rs;
293  let Inst{15-11} = rd;
294  let Inst{10}    = 0;
295  let Inst{9-0}   = funct;
296}
297
298class ADDI_FM_MM<bits<6> op> : MMArch {
299  bits<5>  rs;
300  bits<5>  rt;
301  bits<16> imm16;
302
303  bits<32> Inst;
304
305  let Inst{31-26} = op;
306  let Inst{25-21} = rt;
307  let Inst{20-16} = rs;
308  let Inst{15-0}  = imm16;
309}
310
311class SLTI_FM_MM<bits<6> op> : MMArch {
312  bits<5> rt;
313  bits<5> rs;
314  bits<16> imm16;
315
316  bits<32> Inst;
317
318  let Inst{31-26} = op;
319  let Inst{25-21} = rt;
320  let Inst{20-16} = rs;
321  let Inst{15-0}  = imm16;
322}
323
324class LUI_FM_MM : MMArch {
325  bits<5> rt;
326  bits<16> imm16;
327
328  bits<32> Inst;
329
330  let Inst{31-26} = 0x10;
331  let Inst{25-21} = 0xd;
332  let Inst{20-16} = rt;
333  let Inst{15-0}  = imm16;
334}
335
336class MULT_FM_MM<bits<10> funct> : MMArch {
337  bits<5>  rs;
338  bits<5>  rt;
339
340  bits<32> Inst;
341
342  let Inst{31-26} = 0x00;
343  let Inst{25-21} = rt;
344  let Inst{20-16} = rs;
345  let Inst{15-6}  = funct;
346  let Inst{5-0}   = 0x3c;
347}
348
349class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
350  bits<5> rd;
351  bits<5> rt;
352  bits<5> shamt;
353
354  bits<32> Inst;
355
356  let Inst{31-26} = 0;
357  let Inst{25-21} = rd;
358  let Inst{20-16} = rt;
359  let Inst{15-11} = shamt;
360  let Inst{10}    = rotate;
361  let Inst{9-0}   = funct;
362}
363
364class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
365  bits<5> rd;
366  bits<5> rt;
367  bits<5> rs;
368
369  bits<32> Inst;
370
371  let Inst{31-26} = 0;
372  let Inst{25-21} = rt;
373  let Inst{20-16} = rs;
374  let Inst{15-11} = rd;
375  let Inst{10}    = rotate;
376  let Inst{9-0}   = funct;
377}
378
379class LW_FM_MM<bits<6> op> : MMArch {
380  bits<5> rt;
381  bits<21> addr;
382  bits<5> base = addr{20-16};
383  bits<16> offset = addr{15-0};
384
385  bits<32> Inst;
386
387  let Inst{31-26} = op;
388  let Inst{25-21} = rt;
389  let Inst{20-16} = base;
390  let Inst{15-0}  = offset;
391}
392
393class POOL32C_LHUE_FM_MM<bits<6> op, bits<4> fmt, bits<3> funct> : MMArch {
394  bits<5> rt;
395  bits<21> addr;
396  bits<5> base = addr{20-16};
397  bits<9> offset = addr{8-0};
398
399  bits<32> Inst;
400
401  let Inst{31-26} = op;
402  let Inst{25-21} = rt;
403  let Inst{20-16} = base;
404  let Inst{15-12} = fmt;
405  let Inst{11-9} = funct;
406  let Inst{8-0}  = offset;
407}
408
409class LWL_FM_MM<bits<4> funct> {
410  bits<5> rt;
411  bits<21> addr;
412
413  bits<32> Inst;
414
415  let Inst{31-26} = 0x18;
416  let Inst{25-21} = rt;
417  let Inst{20-16} = addr{20-16};
418  let Inst{15-12} = funct;
419  let Inst{11-0}  = addr{11-0};
420}
421
422class POOL32C_STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> {
423  bits<5> rt;
424  bits<21> addr;
425  bits<5> base = addr{20-16};
426  bits<9> offset = addr{8-0};
427
428  bits<32> Inst;
429
430  let Inst{31-26} = 0x18;
431  let Inst{25-21} = rt;
432  let Inst{20-16} = base;
433  let Inst{15-12} = type;
434  let Inst{11-9} = funct;
435  let Inst{8-0}  = offset;
436}
437
438class CMov_F_I_FM_MM<bits<7> func> : MMArch {
439  bits<5> rd;
440  bits<5> rs;
441  bits<3> fcc;
442
443  bits<32> Inst;
444
445  let Inst{31-26} = 0x15;
446  let Inst{25-21} = rd;
447  let Inst{20-16} = rs;
448  let Inst{15-13} = fcc;
449  let Inst{12-6}  = func;
450  let Inst{5-0}   = 0x3b;
451}
452
453class MTLO_FM_MM<bits<10> funct> : MMArch {
454  bits<5> rs;
455
456  bits<32> Inst;
457
458  let Inst{31-26} = 0x00;
459  let Inst{25-21} = 0x00;
460  let Inst{20-16} = rs;
461  let Inst{15-6}  = funct;
462  let Inst{5-0}   = 0x3c;
463}
464
465class MFLO_FM_MM<bits<10> funct> : MMArch {
466  bits<5> rd;
467
468  bits<32> Inst;
469
470  let Inst{31-26} = 0x00;
471  let Inst{25-21} = 0x00;
472  let Inst{20-16} = rd;
473  let Inst{15-6}  = funct;
474  let Inst{5-0}   = 0x3c;
475}
476
477class CLO_FM_MM<bits<10> funct> : MMArch {
478  bits<5> rd;
479  bits<5> rs;
480
481  bits<32> Inst;
482
483  let Inst{31-26} = 0x00;
484  let Inst{25-21} = rd;
485  let Inst{20-16} = rs;
486  let Inst{15-6}  = funct;
487  let Inst{5-0}   = 0x3c;
488}
489
490class SEB_FM_MM<bits<10> funct> : MMArch {
491  bits<5> rd;
492  bits<5> rt;
493
494  bits<32> Inst;
495
496  let Inst{31-26} = 0x00;
497  let Inst{25-21} = rd;
498  let Inst{20-16} = rt;
499  let Inst{15-6}  = funct;
500  let Inst{5-0}   = 0x3c;
501}
502
503class EXT_FM_MM<bits<6> funct> : MMArch {
504  bits<5> rt;
505  bits<5> rs;
506  bits<5> pos;
507  bits<5> size;
508
509  bits<32> Inst;
510
511  let Inst{31-26} = 0x00;
512  let Inst{25-21} = rt;
513  let Inst{20-16} = rs;
514  let Inst{15-11} = size;
515  let Inst{10-6}  = pos;
516  let Inst{5-0}   = funct;
517}
518
519class J_FM_MM<bits<6> op> : MMArch {
520  bits<26> target;
521
522  bits<32> Inst;
523
524  let Inst{31-26} = op;
525  let Inst{25-0}  = target;
526}
527
528class JR_FM_MM<bits<8> funct> : MMArch {
529  bits<5> rs;
530
531  bits<32> Inst;
532
533  let Inst{31-21} = 0x00;
534  let Inst{20-16} = rs;
535  let Inst{15-14} = 0x0;
536  let Inst{13-6}  = funct;
537  let Inst{5-0}   = 0x3c;
538}
539
540class JALR_FM_MM<bits<10> funct> {
541  bits<5> rs;
542  bits<5> rd;
543
544  bits<32> Inst;
545
546  let Inst{31-26} = 0x00;
547  let Inst{25-21} = rd;
548  let Inst{20-16} = rs;
549  let Inst{15-6}  = funct;
550  let Inst{5-0}   = 0x3c;
551}
552
553class BEQ_FM_MM<bits<6> op> : MMArch {
554  bits<5>  rs;
555  bits<5>  rt;
556  bits<16> offset;
557
558  bits<32> Inst;
559
560  let Inst{31-26} = op;
561  let Inst{25-21} = rt;
562  let Inst{20-16} = rs;
563  let Inst{15-0}  = offset;
564}
565
566class BGEZ_FM_MM<bits<5> funct> : MMArch {
567  bits<5>  rs;
568  bits<16> offset;
569
570  bits<32> Inst;
571
572  let Inst{31-26} = 0x10;
573  let Inst{25-21} = funct;
574  let Inst{20-16} = rs;
575  let Inst{15-0}  = offset;
576}
577
578class BGEZAL_FM_MM<bits<5> funct> : MMArch {
579  bits<5>  rs;
580  bits<16> offset;
581
582  bits<32> Inst;
583
584  let Inst{31-26} = 0x10;
585  let Inst{25-21} = funct;
586  let Inst{20-16} = rs;
587  let Inst{15-0}  = offset;
588}
589
590class SYNC_FM_MM : MMArch {
591  bits<5> stype;
592
593  bits<32> Inst;
594
595  let Inst{31-26} = 0x00;
596  let Inst{25-21} = 0x0;
597  let Inst{20-16} = stype;
598  let Inst{15-6}  = 0x1ad;
599  let Inst{5-0}   = 0x3c;
600}
601
602class BRK_FM_MM : MMArch {
603  bits<10> code_1;
604  bits<10> code_2;
605  bits<32> Inst;
606  let Inst{31-26} = 0x0;
607  let Inst{25-16} = code_1;
608  let Inst{15-6}  = code_2;
609  let Inst{5-0}   = 0x07;
610}
611
612class SYS_FM_MM : MMArch {
613  bits<10> code_;
614  bits<32> Inst;
615  let Inst{31-26} = 0x0;
616  let Inst{25-16} = code_;
617  let Inst{15-6}  = 0x22d;
618  let Inst{5-0}   = 0x3c;
619}
620
621class WAIT_FM_MM {
622  bits<10> code_;
623  bits<32> Inst;
624
625  let Inst{31-26} = 0x00;
626  let Inst{25-16} = code_;
627  let Inst{15-6}  = 0x24d;
628  let Inst{5-0}   = 0x3c;
629}
630
631class ER_FM_MM<bits<10> funct> : MMArch {
632  bits<32> Inst;
633
634  let Inst{31-26} = 0x00;
635  let Inst{25-16} = 0x00;
636  let Inst{15-6}  = funct;
637  let Inst{5-0}   = 0x3c;
638}
639
640class EI_FM_MM<bits<10> funct> : MMArch {
641  bits<32> Inst;
642  bits<5> rt;
643
644  let Inst{31-26} = 0x00;
645  let Inst{25-21} = 0x00;
646  let Inst{20-16} = rt;
647  let Inst{15-6}  = funct;
648  let Inst{5-0}   = 0x3c;
649}
650
651class TEQ_FM_MM<bits<6> funct> : MMArch {
652  bits<5> rs;
653  bits<5> rt;
654  bits<4> code_;
655
656  bits<32> Inst;
657
658  let Inst{31-26} = 0x00;
659  let Inst{25-21} = rt;
660  let Inst{20-16} = rs;
661  let Inst{15-12} = code_;
662  let Inst{11-6}  = funct;
663  let Inst{5-0}   = 0x3c;
664}
665
666class TEQI_FM_MM<bits<5> funct> : MMArch {
667  bits<5> rs;
668  bits<16> imm16;
669
670  bits<32> Inst;
671
672  let Inst{31-26} = 0x10;
673  let Inst{25-21} = funct;
674  let Inst{20-16} = rs;
675  let Inst{15-0}  = imm16;
676}
677
678class LL_FM_MM<bits<4> funct> : MMArch {
679  bits<5> rt;
680  bits<21> addr;
681
682  bits<32> Inst;
683
684  let Inst{31-26} = 0x18;
685  let Inst{25-21} = rt;
686  let Inst{20-16} = addr{20-16};
687  let Inst{15-12} = funct;
688  let Inst{11-0}  = addr{11-0};
689}
690
691class LLE_FM_MM<bits<4> funct> {
692  bits<5> rt;
693  bits<21> addr;
694  bits<5> base = addr{20-16};
695  bits<9> offset = addr{8-0};
696
697  bits<32> Inst;
698
699  let Inst{31-26} = 0x18;
700  let Inst{25-21} = rt;
701  let Inst{20-16} = base;
702  let Inst{15-12} = funct;
703  let Inst{11-9} = 0x6;
704  let Inst{8-0} = offset;
705}
706
707class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
708  bits<5> ft;
709  bits<5> fs;
710  bits<5> fd;
711
712  bits<32> Inst;
713
714  let Inst{31-26} = 0x15;
715  let Inst{25-21} = ft;
716  let Inst{20-16} = fs;
717  let Inst{15-11} = fd;
718  let Inst{10}    = 0;
719  let Inst{9-8}   = fmt;
720  let Inst{7-0}   = funct;
721
722  list<dag> Pattern = [];
723}
724
725class LWXC1_FM_MM<bits<9> funct> : MMArch {
726  bits<5> fd;
727  bits<5> base;
728  bits<5> index;
729
730  bits<32> Inst;
731
732  let Inst{31-26} = 0x15;
733  let Inst{25-21} = index;
734  let Inst{20-16} = base;
735  let Inst{15-11} = fd;
736  let Inst{10-9}  = 0x0;
737  let Inst{8-0}   = funct;
738}
739
740class SWXC1_FM_MM<bits<9> funct> : MMArch {
741  bits<5> fs;
742  bits<5> base;
743  bits<5> index;
744
745  bits<32> Inst;
746
747  let Inst{31-26} = 0x15;
748  let Inst{25-21} = index;
749  let Inst{20-16} = base;
750  let Inst{15-11} = fs;
751  let Inst{10-9}  = 0x0;
752  let Inst{8-0}   = funct;
753}
754
755class CEQS_FM_MM<bits<2> fmt> : MMArch {
756  bits<5> fs;
757  bits<5> ft;
758  bits<4> cond;
759
760  bits<32> Inst;
761
762  let Inst{31-26} = 0x15;
763  let Inst{25-21} = ft;
764  let Inst{20-16} = fs;
765  let Inst{15-13} = 0x0;  // cc
766  let Inst{12}    = 0;
767  let Inst{11-10} = fmt;
768  let Inst{9-6}   = cond;
769  let Inst{5-0}   = 0x3c;
770}
771
772class BC1F_FM_MM<bits<5> tf> : MMArch {
773  bits<16> offset;
774
775  bits<32> Inst;
776
777  let Inst{31-26} = 0x10;
778  let Inst{25-21} = tf;
779  let Inst{20-18} = 0x0; // cc
780  let Inst{17-16} = 0x0;
781  let Inst{15-0}  = offset;
782}
783
784class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
785  bits<5> fd;
786  bits<5> fs;
787
788  bits<32> Inst;
789
790  let Inst{31-26} = 0x15;
791  let Inst{25-21} = fd;
792  let Inst{20-16} = fs;
793  let Inst{15}    = 0;
794  let Inst{14}    = fmt;
795  let Inst{13-6}  = funct;
796  let Inst{5-0}   = 0x3b;
797}
798
799class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
800  bits<5> fd;
801  bits<5> fs;
802
803  bits<32> Inst;
804
805  let Inst{31-26} = 0x15;
806  let Inst{25-21} = fd;
807  let Inst{20-16} = fs;
808  let Inst{15}    = 0;
809  let Inst{14-13} = fmt;
810  let Inst{12-6}  = funct;
811  let Inst{5-0}   = 0x3b;
812}
813
814class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
815  bits<5> fd;
816  bits<5> fs;
817
818  bits<32> Inst;
819
820  let Inst{31-26} = 0x15;
821  let Inst{25-21} = fd;
822  let Inst{20-16} = fs;
823  let Inst{15-13} = 0x0; //cc
824  let Inst{12-11} = 0x0;
825  let Inst{10-9}  = fmt;
826  let Inst{8-0}   = func;
827}
828
829class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
830  bits<5> fd;
831  bits<5> fs;
832  bits<5> rt;
833
834  bits<32> Inst;
835
836  let Inst{31-26} = 0x15;
837  let Inst{25-21} = rt;
838  let Inst{20-16} = fs;
839  let Inst{15-11} = fd;
840  let Inst{9-8}   = fmt;
841  let Inst{7-0}   = funct;
842}
843
844class MFC1_FM_MM<bits<8> funct> : MMArch {
845  bits<5> rt;
846  bits<5> fs;
847
848  bits<32> Inst;
849
850  let Inst{31-26} = 0x15;
851  let Inst{25-21} = rt;
852  let Inst{20-16} = fs;
853  let Inst{15-14} = 0x0;
854  let Inst{13-6}  = funct;
855  let Inst{5-0}   = 0x3b;
856}
857
858class MADDS_FM_MM<bits<6> funct>: MMArch {
859  bits<5> ft;
860  bits<5> fs;
861  bits<5> fd;
862  bits<5> fr;
863
864  bits<32> Inst;
865
866  let Inst{31-26} = 0x15;
867  let Inst{25-21} = ft;
868  let Inst{20-16} = fs;
869  let Inst{15-11} = fd;
870  let Inst{10-6}  = fr;
871  let Inst{5-0}   = funct;
872}
873
874class COMPACT_BRANCH_FM_MM<bits<5> funct> {
875  bits<5>  rs;
876  bits<16> offset;
877
878  bits<32> Inst;
879
880  let Inst{31-26} = 0x10;
881  let Inst{25-21} = funct;
882  let Inst{20-16} = rs;
883  let Inst{15-0}  = offset;
884}
885
886class COP0_TLB_FM_MM<bits<10> op> : MMArch {
887  bits<32> Inst;
888
889  let Inst{31-26} = 0x0;
890  let Inst{25-16} = 0x0;
891  let Inst{15-6}  = op;
892  let Inst{5-0}   = 0x3c;
893}
894
895class SDBBP_FM_MM : MMArch {
896  bits<10> code_;
897
898  bits<32> Inst;
899
900  let Inst{31-26} = 0x0;
901  let Inst{25-16} = code_;
902  let Inst{15-6}  = 0x36d;
903  let Inst{5-0}   = 0x3c;
904}
905
906class RDHWR_FM_MM : MMArch {
907  bits<5> rt;
908  bits<5> rd;
909
910  bits<32> Inst;
911
912  let Inst{31-26} = 0x0;
913  let Inst{25-21} = rt;
914  let Inst{20-16} = rd;
915  let Inst{15-6}  = 0x1ac;
916  let Inst{5-0}   = 0x3c;
917}
918
919class LWXS_FM_MM<bits<10> funct> {
920  bits<5> rd;
921  bits<5> base;
922  bits<5> index;
923
924  bits<32> Inst;
925
926  let Inst{31-26} = 0x0;
927  let Inst{25-21} = index;
928  let Inst{20-16} = base;
929  let Inst{15-11} = rd;
930  let Inst{10}    = 0;
931  let Inst{9-0}   = funct;
932}
933
934class LWM_FM_MM<bits<4> funct> : MMArch {
935  bits<5> rt;
936  bits<21> addr;
937
938  bits<32> Inst;
939
940  let Inst{31-26} = 0x8;
941  let Inst{25-21} = rt;
942  let Inst{20-16} = addr{20-16};
943  let Inst{15-12} = funct;
944  let Inst{11-0}  = addr{11-0};
945}
946
947class LWM_FM_MM16<bits<4> funct> : MMArch, PredicateControl {
948  bits<2> rt;
949  bits<4> addr;
950
951  bits<16> Inst;
952
953  let Inst{15-10} = 0x11;
954  let Inst{9-6}   = funct;
955  let Inst{5-4}   = rt;
956  let Inst{3-0}   = addr;
957}
958
959class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
960  bits<21> addr;
961  bits<5> hint;
962  bits<5> base = addr{20-16};
963  bits<12> offset = addr{11-0};
964
965  bits<32> Inst;
966
967  let Inst{31-26} = op;
968  let Inst{25-21} = hint;
969  let Inst{20-16} = base;
970  let Inst{15-12} = funct;
971  let Inst{11-0}  = offset;
972}
973
974class CACHE_PREFE_FM_MM<bits<6> op, bits<3> funct> : MMArch {
975  bits<21> addr;
976  bits<5> hint;
977  bits<5> base = addr{20-16};
978  bits<9> offset = addr{8-0};
979
980  bits<32> Inst;
981
982  let Inst{31-26} = op;
983  let Inst{25-21} = hint;
984  let Inst{20-16} = base;
985  let Inst{15-12} = 0xA;
986  let Inst{11-9} = funct;
987  let Inst{8-0}  = offset;
988}
989
990class POOL32F_PREFX_FM_MM<bits<6> op, bits<9> funct> : MMArch {
991  bits<5> index;
992  bits<5> base;
993  bits<5> hint;
994
995  bits<32> Inst;
996
997  let Inst{31-26} = op;
998  let Inst{25-21} = index;
999  let Inst{20-16} = base;
1000  let Inst{15-11} = hint;
1001  let Inst{10-9}  = 0x0;
1002  let Inst{8-0}   = funct;
1003}
1004
1005class BARRIER_FM_MM<bits<5> op> : MMArch {
1006  bits<32> Inst;
1007
1008  let Inst{31-26} = 0x0;
1009  let Inst{25-21} = 0x0;
1010  let Inst{20-16} = 0x0;
1011  let Inst{15-11} = op;
1012  let Inst{10-6}  = 0x0;
1013  let Inst{5-0}   = 0x0;
1014}
1015
1016class ADDIUPC_FM_MM {
1017  bits<3> rs;
1018  bits<23> imm;
1019
1020  bits<32> Inst;
1021
1022  let Inst{31-26} = 0x1e;
1023  let Inst{25-23} = rs;
1024  let Inst{22-0} = imm;
1025}
1026