1//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the Mips implementation of TargetFrameLowering class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "MipsFrameLowering.h" 15#include "MCTargetDesc/MipsBaseInfo.h" 16#include "MipsInstrInfo.h" 17#include "MipsMachineFunction.h" 18#include "MipsTargetMachine.h" 19#include "llvm/CodeGen/MachineFrameInfo.h" 20#include "llvm/CodeGen/MachineFunction.h" 21#include "llvm/CodeGen/MachineInstrBuilder.h" 22#include "llvm/CodeGen/MachineModuleInfo.h" 23#include "llvm/CodeGen/MachineRegisterInfo.h" 24#include "llvm/IR/DataLayout.h" 25#include "llvm/IR/Function.h" 26#include "llvm/Target/TargetOptions.h" 27 28using namespace llvm; 29 30 31//===----------------------------------------------------------------------===// 32// 33// Stack Frame Processing methods 34// +----------------------------+ 35// 36// The stack is allocated decrementing the stack pointer on 37// the first instruction of a function prologue. Once decremented, 38// all stack references are done thought a positive offset 39// from the stack/frame pointer, so the stack is considering 40// to grow up! Otherwise terrible hacks would have to be made 41// to get this stack ABI compliant :) 42// 43// The stack frame required by the ABI (after call): 44// Offset 45// 46// 0 ---------- 47// 4 Args to pass 48// . saved $GP (used in PIC) 49// . Alloca allocations 50// . Local Area 51// . CPU "Callee Saved" Registers 52// . saved FP 53// . saved RA 54// . FPU "Callee Saved" Registers 55// StackSize ----------- 56// 57// Offset - offset from sp after stack allocation on function prologue 58// 59// The sp is the stack pointer subtracted/added from the stack size 60// at the Prologue/Epilogue 61// 62// References to the previous stack (to obtain arguments) are done 63// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1)) 64// 65// Examples: 66// - reference to the actual stack frame 67// for any local area var there is smt like : FI >= 0, StackOffset: 4 68// sw REGX, 4(SP) 69// 70// - reference to previous stack frame 71// suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16. 72// The emitted instruction will be something like: 73// lw REGX, 16+StackSize(SP) 74// 75// Since the total stack size is unknown on LowerFormalArguments, all 76// stack references (ObjectOffset) created to reference the function 77// arguments, are negative numbers. This way, on eliminateFrameIndex it's 78// possible to detect those references and the offsets are adjusted to 79// their real location. 80// 81//===----------------------------------------------------------------------===// 82 83const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { 84 if (ST.inMips16Mode()) 85 return llvm::createMips16FrameLowering(ST); 86 87 return llvm::createMipsSEFrameLowering(ST); 88} 89 90// hasFP - Return true if the specified function should have a dedicated frame 91// pointer register. This is true if the function has variable sized allocas, 92// if it needs dynamic stack realignment, if frame pointer elimination is 93// disabled, or if the frame address is taken. 94bool MipsFrameLowering::hasFP(const MachineFunction &MF) const { 95 const MachineFrameInfo *MFI = MF.getFrameInfo(); 96 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 97 98 return MF.getTarget().Options.DisableFramePointerElim(MF) || 99 MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken() || 100 TRI->needsStackRealignment(MF); 101} 102 103bool MipsFrameLowering::hasBP(const MachineFunction &MF) const { 104 const MachineFrameInfo *MFI = MF.getFrameInfo(); 105 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 106 107 return MFI->hasVarSizedObjects() && TRI->needsStackRealignment(MF); 108} 109 110uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { 111 const MachineFrameInfo *MFI = MF.getFrameInfo(); 112 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); 113 114 int64_t Offset = 0; 115 116 // Iterate over fixed sized objects. 117 for (int I = MFI->getObjectIndexBegin(); I != 0; ++I) 118 Offset = std::max(Offset, -MFI->getObjectOffset(I)); 119 120 // Conservatively assume all callee-saved registers will be saved. 121 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { 122 unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize(); 123 Offset = alignTo(Offset + Size, Size); 124 } 125 126 unsigned MaxAlign = MFI->getMaxAlignment(); 127 128 // Check that MaxAlign is not zero if there is a stack object that is not a 129 // callee-saved spill. 130 assert(!MFI->getObjectIndexEnd() || MaxAlign); 131 132 // Iterate over other objects. 133 for (unsigned I = 0, E = MFI->getObjectIndexEnd(); I != E; ++I) 134 Offset = alignTo(Offset + MFI->getObjectSize(I), MaxAlign); 135 136 // Call frame. 137 if (MFI->adjustsStack() && hasReservedCallFrame(MF)) 138 Offset = alignTo(Offset + MFI->getMaxCallFrameSize(), 139 std::max(MaxAlign, getStackAlignment())); 140 141 return alignTo(Offset, getStackAlignment()); 142} 143 144// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions 145MachineBasicBlock::iterator MipsFrameLowering:: 146eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 147 MachineBasicBlock::iterator I) const { 148 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP; 149 150 if (!hasReservedCallFrame(MF)) { 151 int64_t Amount = I->getOperand(0).getImm(); 152 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) 153 Amount = -Amount; 154 155 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); 156 } 157 158 return MBB.erase(I); 159} 160