1//===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the X86 subclass for SelectionDAGTargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
15#define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
16
17#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
18#include "llvm/MC/MCRegisterInfo.h"
19
20namespace llvm {
21
22class X86TargetLowering;
23class X86TargetMachine;
24class X86Subtarget;
25
26class X86SelectionDAGInfo : public SelectionDAGTargetInfo {
27  /// Returns true if it is possible for the base register to conflict with the
28  /// given set of clobbers for a memory intrinsic.
29  bool isBaseRegConflictPossible(SelectionDAG &DAG,
30                                 ArrayRef<MCPhysReg> ClobberSet) const;
31
32public:
33  explicit X86SelectionDAGInfo() = default;
34
35  SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
36                                  SDValue Chain, SDValue Dst, SDValue Src,
37                                  SDValue Size, unsigned Align, bool isVolatile,
38                                  MachinePointerInfo DstPtrInfo) const override;
39
40  SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
41                                  SDValue Chain, SDValue Dst, SDValue Src,
42                                  SDValue Size, unsigned Align, bool isVolatile,
43                                  bool AlwaysInline,
44                                  MachinePointerInfo DstPtrInfo,
45                                  MachinePointerInfo SrcPtrInfo) const override;
46};
47
48}
49
50#endif
51