1/* 2 * Southern Islands Register documentation 3 * 4 * Copyright (C) 2011 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24#ifndef SID_H 25#define SID_H 26 27/* si values */ 28#define SI_CONFIG_REG_OFFSET 0x00008000 29#define SI_CONFIG_REG_END 0x0000B000 30#define SI_SH_REG_OFFSET 0x0000B000 31#define SI_SH_REG_END 0x0000C000 32#define SI_CONTEXT_REG_OFFSET 0x00028000 33#define SI_CONTEXT_REG_END 0x00029000 34#define CIK_UCONFIG_REG_OFFSET 0x00030000 35#define CIK_UCONFIG_REG_END 0x00038000 36 37#define EVENT_TYPE_CACHE_FLUSH 0x6 38#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 39#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 40#define EVENT_TYPE_ZPASS_DONE 0x15 41#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 42#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f 43#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 44#define EVENT_TYPE(x) ((x) << 0) 45#define EVENT_INDEX(x) ((x) << 8) 46 /* 0 - any non-TS event 47 * 1 - ZPASS_DONE 48 * 2 - SAMPLE_PIPELINESTAT 49 * 3 - SAMPLE_STREAMOUTSTAT* 50 * 4 - *S_PARTIAL_FLUSH 51 * 5 - TS events 52 */ 53#define EVENT_WRITE_INV_L2 0x100000 54 55 56#define PREDICATION_OP_CLEAR 0x0 57#define PREDICATION_OP_ZPASS 0x1 58#define PREDICATION_OP_PRIMCOUNT 0x2 59 60#define PRED_OP(x) ((x) << 16) 61 62#define PREDICATION_CONTINUE (1 << 31) 63 64#define PREDICATION_HINT_WAIT (0 << 12) 65#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) 66 67#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) 68#define PREDICATION_DRAW_VISIBLE (1 << 8) 69 70#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 71 72/* All registers defined in this packet section don't exist and the only 73 * purpose of these definitions is to define packet encoding that 74 * the IB parser understands, and also to have an accurate documentation. 75 */ 76#define PKT3_NOP 0x10 77#define PKT3_SET_BASE 0x11 78#define PKT3_CLEAR_STATE 0x12 79#define PKT3_INDEX_BUFFER_SIZE 0x13 80#define PKT3_DISPATCH_DIRECT 0x15 81#define PKT3_DISPATCH_INDIRECT 0x16 82#define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */ 83#define PKT3_SET_PREDICATION 0x20 84#define PKT3_COND_EXEC 0x22 85#define PKT3_PRED_EXEC 0x23 86#define PKT3_DRAW_INDIRECT 0x24 87#define PKT3_DRAW_INDEX_INDIRECT 0x25 88#define PKT3_INDEX_BASE 0x26 89#define PKT3_DRAW_INDEX_2 0x27 90#define PKT3_CONTEXT_CONTROL 0x28 91#define CONTEXT_CONTROL_LOAD_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 92#define CONTEXT_CONTROL_LOAD_CE_RAM(x) (((unsigned)(x) & 0x1) << 28) 93#define CONTEXT_CONTROL_SHADOW_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 94#define PKT3_INDEX_TYPE 0x2A 95#define PKT3_DRAW_INDIRECT_MULTI 0x2C 96#define R_2C3_DRAW_INDEX_LOC 0x2C3 97#define S_2C3_COUNT_INDIRECT_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 98#define S_2C3_DRAW_INDEX_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 99#define PKT3_DRAW_INDEX_AUTO 0x2D 100#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */ 101#define PKT3_NUM_INSTANCES 0x2F 102#define PKT3_DRAW_INDEX_MULTI_AUTO 0x30 103#define PKT3_INDIRECT_BUFFER_SI 0x32 /* not on CIK */ 104#define PKT3_INDIRECT_BUFFER_CONST 0x33 105#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 106#define PKT3_DRAW_INDEX_OFFSET_2 0x35 107#define PKT3_WRITE_DATA 0x37 108#define R_370_CONTROL 0x370 /* 0x[packet number][word index] */ 109#define S_370_ENGINE_SEL(x) (((unsigned)(x) & 0x3) << 30) 110#define V_370_ME 0 111#define V_370_PFP 1 112#define V_370_CE 2 113#define V_370_DE 3 114#define S_370_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 20) 115#define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) 116#define S_370_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) 117#define V_370_MEM_MAPPED_REGISTER 0 118#define V_370_MEMORY_SYNC 1 119#define V_370_TC_L2 2 120#define V_370_GDS 3 121#define V_370_RESERVED 4 122#define V_370_MEM_ASYNC 5 123#define R_371_DST_ADDR_LO 0x371 124#define R_372_DST_ADDR_HI 0x372 125#define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38 126#define PKT3_MEM_SEMAPHORE 0x39 127#define PKT3_MPEG_INDEX 0x3A /* not on CIK */ 128#define PKT3_WAIT_REG_MEM 0x3C 129#define WAIT_REG_MEM_EQUAL 3 130#define PKT3_MEM_WRITE 0x3D /* not on CIK */ 131#define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */ 132#define R_3F0_IB_BASE_LO 0x3F0 133#define R_3F1_IB_BASE_HI 0x3F1 134#define R_3F2_CONTROL 0x3F2 135#define S_3F2_IB_SIZE(x) (((unsigned)(x) & 0xfffff) << 0) 136#define G_3F2_IB_SIZE(x) (((unsigned)(x) >> 0) & 0xfffff) 137#define S_3F2_CHAIN(x) (((unsigned)(x) & 0x1) << 20) 138#define G_3F2_CHAIN(x) (((unsigned)(x) >> 20) & 0x1) 139#define S_3F2_VALID(x) (((unsigned)(x) & 0x1) << 23) 140 141#define PKT3_COPY_DATA 0x40 142#define COPY_DATA_SRC_SEL(x) ((x) & 0xf) 143#define COPY_DATA_REG 0 144#define COPY_DATA_MEM 1 145#define COPY_DATA_PERF 4 146#define COPY_DATA_IMM 5 147#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) 148#define COPY_DATA_COUNT_SEL (1 << 16) 149#define COPY_DATA_WR_CONFIRM (1 << 20) 150#define PKT3_PFP_SYNC_ME 0x42 151#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */ 152#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */ 153#define PKT3_COND_WRITE 0x45 154#define PKT3_EVENT_WRITE 0x46 155#define PKT3_EVENT_WRITE_EOP 0x47 156/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets 157 * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and 158 * DST_SEL=MC. Only CIK chips are affected. 159 */ 160/*#define PKT3_EVENT_WRITE_EOS 0x48*/ /* fix CP DMA before uncommenting */ 161#define PKT3_RELEASE_MEM 0x49 162#define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */ 163#define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */ 164#define PKT3_SET_CONFIG_REG 0x68 165#define PKT3_SET_CONTEXT_REG 0x69 166#define PKT3_SET_SH_REG 0x76 167#define PKT3_SET_SH_REG_OFFSET 0x77 168#define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ 169#define PKT3_LOAD_CONST_RAM 0x80 170#define PKT3_WRITE_CONST_RAM 0x81 171#define PKT3_DUMP_CONST_RAM 0x83 172#define PKT3_INCREMENT_CE_COUNTER 0x84 173#define PKT3_INCREMENT_DE_COUNTER 0x85 174#define PKT3_WAIT_ON_CE_COUNTER 0x86 175 176#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) 177#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) 178#define PKT_TYPE_C 0x3FFFFFFF 179#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) 180#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 181#define PKT_COUNT_C 0xC000FFFF 182#define PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) 183#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 184#define PKT0_BASE_INDEX_C 0xFFFF0000 185#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) 186#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) 187#define PKT3_IT_OPCODE_C 0xFFFF00FF 188#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) 189#define PKT3_SHADER_TYPE_S(x) (((unsigned)(x) & 0x1) << 1) 190#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) 191#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) 192 193#define PKT3_CP_DMA 0x41 194/* 1. header 195 * 2. SRC_ADDR_LO [31:0] or DATA [31:0] 196 * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [15:0] 197 * 4. DST_ADDR_LO [31:0] 198 * 5. DST_ADDR_HI [15:0] 199 * 6. COMMAND [29:22] | BYTE_COUNT [20:0] 200 */ 201#define R_410_CP_DMA_WORD0 0x410 /* 0x[packet number][word index] */ 202#define S_410_SRC_ADDR_LO(x) ((x) & 0xffffffff) 203#define R_411_CP_DMA_WORD1 0x411 204#define S_411_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 205#define S_411_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 206#define V_411_SRC_ADDR 0 207#define V_411_GDS 1 /* program SAS to 1 as well */ 208#define V_411_DATA 2 209#define V_411_SRC_ADDR_TC_L2 3 /* new for CIK */ 210#define S_411_ENGINE(x) (((unsigned)(x) & 0x1) << 27) 211#define V_411_ME 0 212#define V_411_PFP 1 213#define S_411_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) 214#define V_411_DST_ADDR 0 215#define V_411_GDS 1 /* program DAS to 1 as well */ 216#define V_411_DST_ADDR_TC_L2 3 /* new for CIK */ 217#define S_411_SRC_ADDR_HI(x) ((x) & 0xffff) 218#define R_412_CP_DMA_WORD2 0x412 /* 0x[packet number][word index] */ 219#define S_412_DST_ADDR_LO(x) ((x) & 0xffffffff) 220#define R_413_CP_DMA_WORD3 0x413 /* 0x[packet number][word index] */ 221#define S_413_DST_ADDR_HI(x) ((x) & 0xffff) 222#define R_414_COMMAND 0x414 223#define S_414_BYTE_COUNT(x) ((x) & 0x1fffff) 224#define S_414_DISABLE_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 21) 225#define S_414_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) 226#define V_414_NONE 0 227#define V_414_8_IN_16 1 228#define V_414_8_IN_32 2 229#define V_414_8_IN_64 3 230#define S_414_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) 231#define V_414_NONE 0 232#define V_414_8_IN_16 1 233#define V_414_8_IN_32 2 234#define V_414_8_IN_64 3 235#define S_414_SAS(x) (((unsigned)(x) & 0x1) << 26) 236#define V_414_MEMORY 0 237#define V_414_REGISTER 1 238#define S_414_DAS(x) (((unsigned)(x) & 0x1) << 27) 239#define V_414_MEMORY 0 240#define V_414_REGISTER 1 241#define S_414_SAIC(x) (((unsigned)(x) & 0x1) << 28) 242#define V_414_INCREMENT 0 243#define V_414_NO_INCREMENT 1 244#define S_414_DAIC(x) (((unsigned)(x) & 0x1) << 29) 245#define V_414_INCREMENT 0 246#define V_414_NO_INCREMENT 1 247#define S_414_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 248 249#define PKT3_DMA_DATA 0x50 /* new for CIK */ 250/* 1. header 251 * 2. CP_SYNC [31] | SRC_SEL [30:29] | DST_SEL [21:20] | ENGINE [0] 252 * 2. SRC_ADDR_LO [31:0] or DATA [31:0] 253 * 3. SRC_ADDR_HI [31:0] 254 * 4. DST_ADDR_LO [31:0] 255 * 5. DST_ADDR_HI [31:0] 256 * 6. COMMAND [29:22] | BYTE_COUNT [20:0] 257 */ 258#define R_500_DMA_DATA_WORD0 0x500 /* 0x[packet number][word index] */ 259#define S_500_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 260#define S_500_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 261#define V_500_SRC_ADDR 0 262#define V_500_GDS 1 /* program SAS to 1 as well */ 263#define V_500_DATA 2 264#define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */ 265#define S_500_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) 266#define V_500_DST_ADDR 0 267#define V_500_GDS 1 /* program DAS to 1 as well */ 268#define V_500_DST_ADDR_TC_L2 3 /* new for CIK */ 269#define S_500_ENGINE(x) ((x) & 0x1) 270#define V_500_ME 0 271#define V_500_PFP 1 272#define R_501_SRC_ADDR_LO 0x501 273#define R_502_SRC_ADDR_HI 0x502 274#define R_503_DST_ADDR_LO 0x503 275#define R_504_DST_ADDR_HI 0x504 276 277#define R_000E4C_SRBM_STATUS2 0x000E4C 278#define S_000E4C_SDMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 0) 279#define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1) 280#define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE 281#define S_000E4C_TST_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 282#define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1) 283#define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD 284#define S_000E4C_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 285#define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1) 286#define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB 287#define S_000E4C_VCE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 288#define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1) 289#define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7 290#define S_000E4C_VP8_BUSY(x) (((unsigned)(x) & 0x1) << 4) 291#define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1) 292#define C_000E4C_VP8_BUSY 0xFFFFFFEF 293#define S_000E4C_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 5) 294#define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1) 295#define C_000E4C_SDMA_BUSY 0xFFFFFFDF 296#define S_000E4C_SDMA1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 297#define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1) 298#define C_000E4C_SDMA1_BUSY 0xFFFFFFBF 299#define S_000E4C_VCE0_BUSY(x) (((unsigned)(x) & 0x1) << 7) 300#define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1) 301#define C_000E4C_VCE0_BUSY 0xFFFFFF7F 302#define S_000E4C_XDMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 303#define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1) 304#define C_000E4C_XDMA_BUSY 0xFFFFFEFF 305#define S_000E4C_CHUB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 306#define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1) 307#define C_000E4C_CHUB_BUSY 0xFFFFFDFF 308#define S_000E4C_SDMA2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 309#define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1) 310#define C_000E4C_SDMA2_BUSY 0xFFFFFBFF 311#define S_000E4C_SDMA3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 312#define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1) 313#define C_000E4C_SDMA3_BUSY 0xFFFFF7FF 314#define S_000E4C_SAMSCP_BUSY(x) (((unsigned)(x) & 0x1) << 12) 315#define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1) 316#define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF 317#define S_000E4C_ISP_BUSY(x) (((unsigned)(x) & 0x1) << 13) 318#define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1) 319#define C_000E4C_ISP_BUSY 0xFFFFDFFF 320#define S_000E4C_VCE1_BUSY(x) (((unsigned)(x) & 0x1) << 14) 321#define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1) 322#define C_000E4C_VCE1_BUSY 0xFFFFBFFF 323#define S_000E4C_ODE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 324#define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1) 325#define C_000E4C_ODE_BUSY 0xFFFF7FFF 326#define S_000E4C_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 16) 327#define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1) 328#define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF 329#define S_000E4C_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 17) 330#define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1) 331#define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF 332#define S_000E4C_SAMSCP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) 333#define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1) 334#define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF 335#define S_000E4C_ISP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) 336#define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1) 337#define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF 338#define S_000E4C_VCE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 20) 339#define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1) 340#define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF 341#define R_000E50_SRBM_STATUS 0x000E50 342#define S_000E50_UVD_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 343#define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1) 344#define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD 345#define S_000E50_SAMMSP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 346#define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1) 347#define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB 348#define S_000E50_ACP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 349#define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1) 350#define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7 351#define S_000E50_SMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 352#define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1) 353#define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF 354#define S_000E50_GRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 355#define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 356#define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF 357#define S_000E50_HI_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 358#define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1) 359#define C_000E50_HI_RQ_PENDING 0xFFFFFFBF 360#define S_000E50_VMC_BUSY(x) (((unsigned)(x) & 0x1) << 8) 361#define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1) 362#define C_000E50_VMC_BUSY 0xFFFFFEFF 363#define S_000E50_MCB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 364#define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1) 365#define C_000E50_MCB_BUSY 0xFFFFFDFF 366#define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((unsigned)(x) & 0x1) << 10) 367#define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1) 368#define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF 369#define S_000E50_MCC_BUSY(x) (((unsigned)(x) & 0x1) << 11) 370#define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1) 371#define C_000E50_MCC_BUSY 0xFFFFF7FF 372#define S_000E50_MCD_BUSY(x) (((unsigned)(x) & 0x1) << 12) 373#define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1) 374#define C_000E50_MCD_BUSY 0xFFFFEFFF 375#define S_000E50_VMC1_BUSY(x) (((unsigned)(x) & 0x1) << 13) 376#define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1) 377#define C_000E50_VMC1_BUSY 0xFFFFDFFF 378#define S_000E50_SEM_BUSY(x) (((unsigned)(x) & 0x1) << 14) 379#define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1) 380#define C_000E50_SEM_BUSY 0xFFFFBFFF 381#define S_000E50_ACP_BUSY(x) (((unsigned)(x) & 0x1) << 16) 382#define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1) 383#define C_000E50_ACP_BUSY 0xFFFEFFFF 384#define S_000E50_IH_BUSY(x) (((unsigned)(x) & 0x1) << 17) 385#define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1) 386#define C_000E50_IH_BUSY 0xFFFDFFFF 387#define S_000E50_UVD_BUSY(x) (((unsigned)(x) & 0x1) << 19) 388#define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1) 389#define C_000E50_UVD_BUSY 0xFFF7FFFF 390#define S_000E50_SAMMSP_BUSY(x) (((unsigned)(x) & 0x1) << 20) 391#define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1) 392#define C_000E50_SAMMSP_BUSY 0xFFEFFFFF 393#define S_000E50_GCATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 21) 394#define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1) 395#define C_000E50_GCATCL2_BUSY 0xFFDFFFFF 396#define S_000E50_OSATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 22) 397#define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1) 398#define C_000E50_OSATCL2_BUSY 0xFFBFFFFF 399#define S_000E50_BIF_BUSY(x) (((unsigned)(x) & 0x1) << 29) 400#define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1) 401#define C_000E50_BIF_BUSY 0xDFFFFFFF 402#define R_000E54_SRBM_STATUS3 0x000E54 403#define S_000E54_MCC0_BUSY(x) (((unsigned)(x) & 0x1) << 0) 404#define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1) 405#define C_000E54_MCC0_BUSY 0xFFFFFFFE 406#define S_000E54_MCC1_BUSY(x) (((unsigned)(x) & 0x1) << 1) 407#define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1) 408#define C_000E54_MCC1_BUSY 0xFFFFFFFD 409#define S_000E54_MCC2_BUSY(x) (((unsigned)(x) & 0x1) << 2) 410#define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1) 411#define C_000E54_MCC2_BUSY 0xFFFFFFFB 412#define S_000E54_MCC3_BUSY(x) (((unsigned)(x) & 0x1) << 3) 413#define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1) 414#define C_000E54_MCC3_BUSY 0xFFFFFFF7 415#define S_000E54_MCC4_BUSY(x) (((unsigned)(x) & 0x1) << 4) 416#define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1) 417#define C_000E54_MCC4_BUSY 0xFFFFFFEF 418#define S_000E54_MCC5_BUSY(x) (((unsigned)(x) & 0x1) << 5) 419#define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1) 420#define C_000E54_MCC5_BUSY 0xFFFFFFDF 421#define S_000E54_MCC6_BUSY(x) (((unsigned)(x) & 0x1) << 6) 422#define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1) 423#define C_000E54_MCC6_BUSY 0xFFFFFFBF 424#define S_000E54_MCC7_BUSY(x) (((unsigned)(x) & 0x1) << 7) 425#define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1) 426#define C_000E54_MCC7_BUSY 0xFFFFFF7F 427#define S_000E54_MCD0_BUSY(x) (((unsigned)(x) & 0x1) << 8) 428#define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1) 429#define C_000E54_MCD0_BUSY 0xFFFFFEFF 430#define S_000E54_MCD1_BUSY(x) (((unsigned)(x) & 0x1) << 9) 431#define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1) 432#define C_000E54_MCD1_BUSY 0xFFFFFDFF 433#define S_000E54_MCD2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 434#define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1) 435#define C_000E54_MCD2_BUSY 0xFFFFFBFF 436#define S_000E54_MCD3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 437#define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1) 438#define C_000E54_MCD3_BUSY 0xFFFFF7FF 439#define S_000E54_MCD4_BUSY(x) (((unsigned)(x) & 0x1) << 12) 440#define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1) 441#define C_000E54_MCD4_BUSY 0xFFFFEFFF 442#define S_000E54_MCD5_BUSY(x) (((unsigned)(x) & 0x1) << 13) 443#define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1) 444#define C_000E54_MCD5_BUSY 0xFFFFDFFF 445#define S_000E54_MCD6_BUSY(x) (((unsigned)(x) & 0x1) << 14) 446#define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1) 447#define C_000E54_MCD6_BUSY 0xFFFFBFFF 448#define S_000E54_MCD7_BUSY(x) (((unsigned)(x) & 0x1) << 15) 449#define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1) 450#define C_000E54_MCD7_BUSY 0xFFFF7FFF 451#define R_00D034_SDMA0_STATUS_REG 0x00D034 452#define S_00D034_IDLE(x) (((unsigned)(x) & 0x1) << 0) 453#define G_00D034_IDLE(x) (((x) >> 0) & 0x1) 454#define C_00D034_IDLE 0xFFFFFFFE 455#define S_00D034_REG_IDLE(x) (((unsigned)(x) & 0x1) << 1) 456#define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1) 457#define C_00D034_REG_IDLE 0xFFFFFFFD 458#define S_00D034_RB_EMPTY(x) (((unsigned)(x) & 0x1) << 2) 459#define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1) 460#define C_00D034_RB_EMPTY 0xFFFFFFFB 461#define S_00D034_RB_FULL(x) (((unsigned)(x) & 0x1) << 3) 462#define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1) 463#define C_00D034_RB_FULL 0xFFFFFFF7 464#define S_00D034_RB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 4) 465#define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1) 466#define C_00D034_RB_CMD_IDLE 0xFFFFFFEF 467#define S_00D034_RB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 5) 468#define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1) 469#define C_00D034_RB_CMD_FULL 0xFFFFFFDF 470#define S_00D034_IB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 6) 471#define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1) 472#define C_00D034_IB_CMD_IDLE 0xFFFFFFBF 473#define S_00D034_IB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 7) 474#define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1) 475#define C_00D034_IB_CMD_FULL 0xFFFFFF7F 476#define S_00D034_BLOCK_IDLE(x) (((unsigned)(x) & 0x1) << 8) 477#define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1) 478#define C_00D034_BLOCK_IDLE 0xFFFFFEFF 479#define S_00D034_INSIDE_IB(x) (((unsigned)(x) & 0x1) << 9) 480#define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1) 481#define C_00D034_INSIDE_IB 0xFFFFFDFF 482#define S_00D034_EX_IDLE(x) (((unsigned)(x) & 0x1) << 10) 483#define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1) 484#define C_00D034_EX_IDLE 0xFFFFFBFF 485#define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((unsigned)(x) & 0x1) << 11) 486#define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1) 487#define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF 488#define S_00D034_PACKET_READY(x) (((unsigned)(x) & 0x1) << 12) 489#define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1) 490#define C_00D034_PACKET_READY 0xFFFFEFFF 491#define S_00D034_MC_WR_IDLE(x) (((unsigned)(x) & 0x1) << 13) 492#define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1) 493#define C_00D034_MC_WR_IDLE 0xFFFFDFFF 494#define S_00D034_SRBM_IDLE(x) (((unsigned)(x) & 0x1) << 14) 495#define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1) 496#define C_00D034_SRBM_IDLE 0xFFFFBFFF 497#define S_00D034_CONTEXT_EMPTY(x) (((unsigned)(x) & 0x1) << 15) 498#define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1) 499#define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF 500#define S_00D034_DELTA_RPTR_FULL(x) (((unsigned)(x) & 0x1) << 16) 501#define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1) 502#define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF 503#define S_00D034_RB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 17) 504#define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1) 505#define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF 506#define S_00D034_IB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 18) 507#define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1) 508#define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF 509#define S_00D034_MC_RD_IDLE(x) (((unsigned)(x) & 0x1) << 19) 510#define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1) 511#define C_00D034_MC_RD_IDLE 0xFFF7FFFF 512#define S_00D034_DELTA_RPTR_EMPTY(x) (((unsigned)(x) & 0x1) << 20) 513#define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1) 514#define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF 515#define S_00D034_MC_RD_RET_STALL(x) (((unsigned)(x) & 0x1) << 21) 516#define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1) 517#define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF 518#define S_00D034_MC_RD_NO_POLL_IDLE(x) (((unsigned)(x) & 0x1) << 22) 519#define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1) 520#define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF 521#define S_00D034_PREV_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 25) 522#define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1) 523#define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF 524#define S_00D034_SEM_IDLE(x) (((unsigned)(x) & 0x1) << 26) 525#define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1) 526#define C_00D034_SEM_IDLE 0xFBFFFFFF 527#define S_00D034_SEM_REQ_STALL(x) (((unsigned)(x) & 0x1) << 27) 528#define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1) 529#define C_00D034_SEM_REQ_STALL 0xF7FFFFFF 530#define S_00D034_SEM_RESP_STATE(x) (((unsigned)(x) & 0x03) << 28) 531#define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x03) 532#define C_00D034_SEM_RESP_STATE 0xCFFFFFFF 533#define S_00D034_INT_IDLE(x) (((unsigned)(x) & 0x1) << 30) 534#define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1) 535#define C_00D034_INT_IDLE 0xBFFFFFFF 536#define S_00D034_INT_REQ_STALL(x) (((unsigned)(x) & 0x1) << 31) 537#define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1) 538#define C_00D034_INT_REQ_STALL 0x7FFFFFFF 539#define R_00D834_SDMA1_STATUS_REG 0x00D834 540#define R_008008_GRBM_STATUS2 0x008008 541#define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) 542#define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) 543#define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0 544#define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 545#define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1) 546#define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF 547#define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 548#define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1) 549#define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF 550#define S_008008_ME1PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 551#define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1) 552#define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF 553#define S_008008_ME1PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 554#define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1) 555#define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F 556#define S_008008_ME1PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 557#define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1) 558#define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF 559#define S_008008_ME1PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 560#define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1) 561#define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF 562#define S_008008_ME2PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) 563#define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1) 564#define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF 565#define S_008008_ME2PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) 566#define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1) 567#define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF 568#define S_008008_ME2PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 12) 569#define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1) 570#define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF 571#define S_008008_ME2PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 13) 572#define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1) 573#define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF 574#define S_008008_RLC_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 14) 575#define G_008008_RLC_RQ_PENDING(x) (((x) >> 14) & 0x1) 576#define C_008008_RLC_RQ_PENDING 0xFFFFBFFF 577#define S_008008_RLC_BUSY(x) (((unsigned)(x) & 0x1) << 24) 578#define G_008008_RLC_BUSY(x) (((x) >> 24) & 0x1) 579#define C_008008_RLC_BUSY 0xFEFFFFFF 580#define S_008008_TC_BUSY(x) (((unsigned)(x) & 0x1) << 25) 581#define G_008008_TC_BUSY(x) (((x) >> 25) & 0x1) 582#define C_008008_TC_BUSY 0xFDFFFFFF 583#define S_008008_TCC_CC_RESIDENT(x) (((unsigned)(x) & 0x1) << 26) 584#define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1) 585#define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF 586#define S_008008_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 28) 587#define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1) 588#define C_008008_CPF_BUSY 0xEFFFFFFF 589#define S_008008_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 590#define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1) 591#define C_008008_CPC_BUSY 0xDFFFFFFF 592#define S_008008_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 30) 593#define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1) 594#define C_008008_CPG_BUSY 0xBFFFFFFF 595#define R_008010_GRBM_STATUS 0x008010 596#define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) 597#define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) 598#define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0 599#define S_008010_SRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 600#define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 601#define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF 602#define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 603#define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1) 604#define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F 605#define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 606#define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1) 607#define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF 608#define S_008010_GDS_DMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 609#define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1) 610#define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF 611#define S_008010_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 12) 612#define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1) 613#define C_008010_DB_CLEAN 0xFFFFEFFF 614#define S_008010_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 13) 615#define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1) 616#define C_008010_CB_CLEAN 0xFFFFDFFF 617#define S_008010_TA_BUSY(x) (((unsigned)(x) & 0x1) << 14) 618#define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1) 619#define C_008010_TA_BUSY 0xFFFFBFFF 620#define S_008010_GDS_BUSY(x) (((unsigned)(x) & 0x1) << 15) 621#define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1) 622#define C_008010_GDS_BUSY 0xFFFF7FFF 623#define S_008010_WD_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) 624#define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) 625#define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF 626#define S_008010_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 17) 627#define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1) 628#define C_008010_VGT_BUSY 0xFFFDFFFF 629#define S_008010_IA_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 18) 630#define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1) 631#define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF 632#define S_008010_IA_BUSY(x) (((unsigned)(x) & 0x1) << 19) 633#define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1) 634#define C_008010_IA_BUSY 0xFFF7FFFF 635#define S_008010_SX_BUSY(x) (((unsigned)(x) & 0x1) << 20) 636#define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1) 637#define C_008010_SX_BUSY 0xFFEFFFFF 638#define S_008010_WD_BUSY(x) (((unsigned)(x) & 0x1) << 21) 639#define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1) 640#define C_008010_WD_BUSY 0xFFDFFFFF 641#define S_008010_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 642#define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1) 643#define C_008010_SPI_BUSY 0xFFBFFFFF 644#define S_008010_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 23) 645#define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1) 646#define C_008010_BCI_BUSY 0xFF7FFFFF 647#define S_008010_SC_BUSY(x) (((unsigned)(x) & 0x1) << 24) 648#define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1) 649#define C_008010_SC_BUSY 0xFEFFFFFF 650#define S_008010_PA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 651#define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1) 652#define C_008010_PA_BUSY 0xFDFFFFFF 653#define S_008010_DB_BUSY(x) (((unsigned)(x) & 0x1) << 26) 654#define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1) 655#define C_008010_DB_BUSY 0xFBFFFFFF 656#define S_008010_CP_COHERENCY_BUSY(x) (((unsigned)(x) & 0x1) << 28) 657#define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1) 658#define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF 659#define S_008010_CP_BUSY(x) (((unsigned)(x) & 0x1) << 29) 660#define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1) 661#define C_008010_CP_BUSY 0xDFFFFFFF 662#define S_008010_CB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 663#define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1) 664#define C_008010_CB_BUSY 0xBFFFFFFF 665#define S_008010_GUI_ACTIVE(x) (((unsigned)(x) & 0x1) << 31) 666#define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 667#define C_008010_GUI_ACTIVE 0x7FFFFFFF 668#define GRBM_GFX_INDEX 0x802C 669#define INSTANCE_INDEX(x) ((x) << 0) 670#define SH_INDEX(x) ((x) << 8) 671#define SE_INDEX(x) ((x) << 16) 672#define SH_BROADCAST_WRITES (1 << 29) 673#define INSTANCE_BROADCAST_WRITES (1 << 30) 674#define SE_BROADCAST_WRITES (1 << 31) 675#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC 676#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 677#define R_0085F0_CP_COHER_CNTL 0x0085F0 678#define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 679#define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 680#define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE 681#define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 682#define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 683#define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD 684#define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 685#define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 686#define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 687#define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 688#define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 689#define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 690#define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 691#define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 692#define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 693#define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 694#define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 695#define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 696#define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 697#define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 698#define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 699#define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 700#define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 701#define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 702#define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 703#define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 704#define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 705#define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 706#define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 707#define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 708#define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 709#define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 710#define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF 711#define S_0085F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 712#define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 713#define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF 714#define S_0085F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 715#define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 716#define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF 717#define S_0085F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 718#define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 719#define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF 720#define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 721#define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 722#define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF 723#define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 724#define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 725#define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF 726#define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 727#define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 728#define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF 729#define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 730#define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 731#define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 732#define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 733#define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 734#define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 735#define R_0085F4_CP_COHER_SIZE 0x0085F4 736#define R_0085F8_CP_COHER_BASE 0x0085F8 737#define R_008014_GRBM_STATUS_SE0 0x008014 738#define S_008014_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 739#define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1) 740#define C_008014_DB_CLEAN 0xFFFFFFFD 741#define S_008014_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 742#define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1) 743#define C_008014_CB_CLEAN 0xFFFFFFFB 744#define S_008014_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 745#define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1) 746#define C_008014_BCI_BUSY 0xFFBFFFFF 747#define S_008014_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 748#define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1) 749#define C_008014_VGT_BUSY 0xFF7FFFFF 750#define S_008014_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 751#define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1) 752#define C_008014_PA_BUSY 0xFEFFFFFF 753#define S_008014_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 754#define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1) 755#define C_008014_TA_BUSY 0xFDFFFFFF 756#define S_008014_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 757#define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1) 758#define C_008014_SX_BUSY 0xFBFFFFFF 759#define S_008014_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 760#define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1) 761#define C_008014_SPI_BUSY 0xF7FFFFFF 762#define S_008014_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 763#define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1) 764#define C_008014_SC_BUSY 0xDFFFFFFF 765#define S_008014_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 766#define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1) 767#define C_008014_DB_BUSY 0xBFFFFFFF 768#define S_008014_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 769#define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1) 770#define C_008014_CB_BUSY 0x7FFFFFFF 771#define R_008018_GRBM_STATUS_SE1 0x008018 772#define S_008018_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 773#define G_008018_DB_CLEAN(x) (((x) >> 1) & 0x1) 774#define C_008018_DB_CLEAN 0xFFFFFFFD 775#define S_008018_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 776#define G_008018_CB_CLEAN(x) (((x) >> 2) & 0x1) 777#define C_008018_CB_CLEAN 0xFFFFFFFB 778#define S_008018_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 779#define G_008018_BCI_BUSY(x) (((x) >> 22) & 0x1) 780#define C_008018_BCI_BUSY 0xFFBFFFFF 781#define S_008018_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 782#define G_008018_VGT_BUSY(x) (((x) >> 23) & 0x1) 783#define C_008018_VGT_BUSY 0xFF7FFFFF 784#define S_008018_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 785#define G_008018_PA_BUSY(x) (((x) >> 24) & 0x1) 786#define C_008018_PA_BUSY 0xFEFFFFFF 787#define S_008018_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 788#define G_008018_TA_BUSY(x) (((x) >> 25) & 0x1) 789#define C_008018_TA_BUSY 0xFDFFFFFF 790#define S_008018_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 791#define G_008018_SX_BUSY(x) (((x) >> 26) & 0x1) 792#define C_008018_SX_BUSY 0xFBFFFFFF 793#define S_008018_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 794#define G_008018_SPI_BUSY(x) (((x) >> 27) & 0x1) 795#define C_008018_SPI_BUSY 0xF7FFFFFF 796#define S_008018_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 797#define G_008018_SC_BUSY(x) (((x) >> 29) & 0x1) 798#define C_008018_SC_BUSY 0xDFFFFFFF 799#define S_008018_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 800#define G_008018_DB_BUSY(x) (((x) >> 30) & 0x1) 801#define C_008018_DB_BUSY 0xBFFFFFFF 802#define S_008018_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 803#define G_008018_CB_BUSY(x) (((x) >> 31) & 0x1) 804#define C_008018_CB_BUSY 0x7FFFFFFF 805#define R_008038_GRBM_STATUS_SE2 0x008038 806#define S_008038_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 807#define G_008038_DB_CLEAN(x) (((x) >> 1) & 0x1) 808#define C_008038_DB_CLEAN 0xFFFFFFFD 809#define S_008038_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 810#define G_008038_CB_CLEAN(x) (((x) >> 2) & 0x1) 811#define C_008038_CB_CLEAN 0xFFFFFFFB 812#define S_008038_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 813#define G_008038_BCI_BUSY(x) (((x) >> 22) & 0x1) 814#define C_008038_BCI_BUSY 0xFFBFFFFF 815#define S_008038_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 816#define G_008038_VGT_BUSY(x) (((x) >> 23) & 0x1) 817#define C_008038_VGT_BUSY 0xFF7FFFFF 818#define S_008038_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 819#define G_008038_PA_BUSY(x) (((x) >> 24) & 0x1) 820#define C_008038_PA_BUSY 0xFEFFFFFF 821#define S_008038_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 822#define G_008038_TA_BUSY(x) (((x) >> 25) & 0x1) 823#define C_008038_TA_BUSY 0xFDFFFFFF 824#define S_008038_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 825#define G_008038_SX_BUSY(x) (((x) >> 26) & 0x1) 826#define C_008038_SX_BUSY 0xFBFFFFFF 827#define S_008038_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 828#define G_008038_SPI_BUSY(x) (((x) >> 27) & 0x1) 829#define C_008038_SPI_BUSY 0xF7FFFFFF 830#define S_008038_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 831#define G_008038_SC_BUSY(x) (((x) >> 29) & 0x1) 832#define C_008038_SC_BUSY 0xDFFFFFFF 833#define S_008038_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 834#define G_008038_DB_BUSY(x) (((x) >> 30) & 0x1) 835#define C_008038_DB_BUSY 0xBFFFFFFF 836#define S_008038_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 837#define G_008038_CB_BUSY(x) (((x) >> 31) & 0x1) 838#define C_008038_CB_BUSY 0x7FFFFFFF 839#define R_00803C_GRBM_STATUS_SE3 0x00803C 840#define S_00803C_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 841#define G_00803C_DB_CLEAN(x) (((x) >> 1) & 0x1) 842#define C_00803C_DB_CLEAN 0xFFFFFFFD 843#define S_00803C_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 844#define G_00803C_CB_CLEAN(x) (((x) >> 2) & 0x1) 845#define C_00803C_CB_CLEAN 0xFFFFFFFB 846#define S_00803C_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 847#define G_00803C_BCI_BUSY(x) (((x) >> 22) & 0x1) 848#define C_00803C_BCI_BUSY 0xFFBFFFFF 849#define S_00803C_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 850#define G_00803C_VGT_BUSY(x) (((x) >> 23) & 0x1) 851#define C_00803C_VGT_BUSY 0xFF7FFFFF 852#define S_00803C_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 853#define G_00803C_PA_BUSY(x) (((x) >> 24) & 0x1) 854#define C_00803C_PA_BUSY 0xFEFFFFFF 855#define S_00803C_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 856#define G_00803C_TA_BUSY(x) (((x) >> 25) & 0x1) 857#define C_00803C_TA_BUSY 0xFDFFFFFF 858#define S_00803C_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 859#define G_00803C_SX_BUSY(x) (((x) >> 26) & 0x1) 860#define C_00803C_SX_BUSY 0xFBFFFFFF 861#define S_00803C_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 862#define G_00803C_SPI_BUSY(x) (((x) >> 27) & 0x1) 863#define C_00803C_SPI_BUSY 0xF7FFFFFF 864#define S_00803C_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 865#define G_00803C_SC_BUSY(x) (((x) >> 29) & 0x1) 866#define C_00803C_SC_BUSY 0xDFFFFFFF 867#define S_00803C_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 868#define G_00803C_DB_BUSY(x) (((x) >> 30) & 0x1) 869#define C_00803C_DB_BUSY 0xBFFFFFFF 870#define S_00803C_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 871#define G_00803C_CB_BUSY(x) (((x) >> 31) & 0x1) 872#define C_00803C_CB_BUSY 0x7FFFFFFF 873/* CIK */ 874#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC 875#define S_0300FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 876#define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) 877#define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE 878#define R_0301E4_CP_COHER_BASE_HI 0x0301E4 879#define S_0301E4_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 880#define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) 881#define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00 882#define R_0301EC_CP_COHER_START_DELAY 0x0301EC 883#define S_0301EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 884#define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) 885#define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0 886#define R_0301F0_CP_COHER_CNTL 0x0301F0 887#define S_0301F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 888#define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 889#define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE 890#define S_0301F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 891#define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 892#define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD 893/* VI */ 894#define S_0301F0_TC_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 2) 895#define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1) 896#define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB 897#define S_0301F0_TC_NC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 3) 898#define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1) 899#define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7 900/* */ 901#define S_0301F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 902#define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 903#define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 904#define S_0301F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 905#define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 906#define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 907#define S_0301F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 908#define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 909#define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 910#define S_0301F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 911#define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 912#define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 913#define S_0301F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 914#define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 915#define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 916#define S_0301F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 917#define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 918#define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 919#define S_0301F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 920#define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 921#define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 922#define S_0301F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 923#define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 924#define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 925#define S_0301F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 926#define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 927#define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF 928#define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) 929#define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) 930#define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF 931#define S_0301F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) /* not on VI */ 932#define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) 933#define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF 934#define S_0301F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) 935#define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) 936#define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF 937#define S_0301F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 938#define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 939#define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF 940#define S_0301F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 941#define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 942#define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF 943#define S_0301F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 944#define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 945#define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF 946#define S_0301F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 947#define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 948#define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF 949#define S_0301F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 950#define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 951#define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF 952#define S_0301F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 953#define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 954#define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF 955#define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 956#define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 957#define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 958#define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) 959#define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) 960#define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF 961#define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 962#define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 963#define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 964/* VI */ 965#define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) 966#define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1) 967#define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF 968#define S_0301F0_SH_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) 969#define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1) 970#define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF 971/* */ 972#define R_0301F4_CP_COHER_SIZE 0x0301F4 973#define R_0301F8_CP_COHER_BASE 0x0301F8 974#define R_0301FC_CP_COHER_STATUS 0x0301FC 975#define S_0301FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) 976#define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) 977#define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00 978#define S_0301FC_MEID(x) (((unsigned)(x) & 0x03) << 24) 979#define G_0301FC_MEID(x) (((x) >> 24) & 0x03) 980#define C_0301FC_MEID 0xFCFFFFFF 981#define S_0301FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) 982#define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) 983#define C_0301FC_PHASE1_STATUS 0xBFFFFFFF 984#define S_0301FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) 985#define G_0301FC_STATUS(x) (((x) >> 31) & 0x1) 986#define C_0301FC_STATUS 0x7FFFFFFF 987#define R_008210_CP_CPC_STATUS 0x008210 988#define S_008210_MEC1_BUSY(x) (((unsigned)(x) & 0x1) << 0) 989#define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1) 990#define C_008210_MEC1_BUSY 0xFFFFFFFE 991#define S_008210_MEC2_BUSY(x) (((unsigned)(x) & 0x1) << 1) 992#define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1) 993#define C_008210_MEC2_BUSY 0xFFFFFFFD 994#define S_008210_DC0_BUSY(x) (((unsigned)(x) & 0x1) << 2) 995#define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1) 996#define C_008210_DC0_BUSY 0xFFFFFFFB 997#define S_008210_DC1_BUSY(x) (((unsigned)(x) & 0x1) << 3) 998#define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1) 999#define C_008210_DC1_BUSY 0xFFFFFFF7 1000#define S_008210_RCIU1_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1001#define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1) 1002#define C_008210_RCIU1_BUSY 0xFFFFFFEF 1003#define S_008210_RCIU2_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1004#define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1) 1005#define C_008210_RCIU2_BUSY 0xFFFFFFDF 1006#define S_008210_ROQ1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1007#define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1) 1008#define C_008210_ROQ1_BUSY 0xFFFFFFBF 1009#define S_008210_ROQ2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1010#define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1) 1011#define C_008210_ROQ2_BUSY 0xFFFFFF7F 1012#define S_008210_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1013#define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1) 1014#define C_008210_TCIU_BUSY 0xFFFFFBFF 1015#define S_008210_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1016#define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1) 1017#define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF 1018#define S_008210_QU_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1019#define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1) 1020#define C_008210_QU_BUSY 0xFFFFEFFF 1021#define S_008210_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1022#define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1) 1023#define C_008210_ATCL2IU_BUSY 0xFFFFDFFF 1024#define S_008210_CPG_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1025#define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1) 1026#define C_008210_CPG_CPC_BUSY 0xDFFFFFFF 1027#define S_008210_CPF_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1028#define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1) 1029#define C_008210_CPF_CPC_BUSY 0xBFFFFFFF 1030#define S_008210_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1031#define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1) 1032#define C_008210_CPC_BUSY 0x7FFFFFFF 1033#define R_008214_CP_CPC_BUSY_STAT 0x008214 1034#define S_008214_MEC1_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1035#define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1) 1036#define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE 1037#define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1038#define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1) 1039#define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD 1040#define S_008214_MEC1_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1041#define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1) 1042#define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB 1043#define S_008214_MEC1_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1044#define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) 1045#define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7 1046#define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1047#define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1) 1048#define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF 1049#define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1050#define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1) 1051#define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF 1052#define S_008214_MEC1_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1053#define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1) 1054#define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF 1055#define S_008214_MEC1_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1056#define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1) 1057#define C_008214_MEC1_TC_BUSY 0xFFFFFF7F 1058#define S_008214_MEC1_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1059#define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1) 1060#define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF 1061#define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1062#define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1) 1063#define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF 1064#define S_008214_MEC1_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1065#define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1) 1066#define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF 1067#define S_008214_MEC1_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1068#define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1) 1069#define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF 1070#define S_008214_MEC1_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1071#define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1) 1072#define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF 1073#define S_008214_MEC1_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1074#define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1) 1075#define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF 1076#define S_008214_MEC2_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1077#define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1) 1078#define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF 1079#define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1080#define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1) 1081#define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF 1082#define S_008214_MEC2_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1083#define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1) 1084#define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF 1085#define S_008214_MEC2_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1086#define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1) 1087#define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF 1088#define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1089#define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1) 1090#define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF 1091#define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1092#define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1) 1093#define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF 1094#define S_008214_MEC2_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1095#define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1) 1096#define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF 1097#define S_008214_MEC2_TC_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1098#define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1) 1099#define C_008214_MEC2_TC_BUSY 0xFF7FFFFF 1100#define S_008214_MEC2_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1101#define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1) 1102#define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF 1103#define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1104#define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1) 1105#define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF 1106#define S_008214_MEC2_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1107#define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1) 1108#define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF 1109#define S_008214_MEC2_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1110#define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1) 1111#define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF 1112#define S_008214_MEC2_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1113#define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1) 1114#define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF 1115#define S_008214_MEC2_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1116#define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1) 1117#define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF 1118#define R_008218_CP_CPC_STALLED_STAT1 0x008218 1119#define S_008218_RCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 3) 1120#define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1) 1121#define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7 1122#define S_008218_RCIU_PRIV_VIOLATION(x) (((unsigned)(x) & 0x1) << 4) 1123#define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1) 1124#define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF 1125#define S_008218_TCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 6) 1126#define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1) 1127#define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF 1128#define S_008218_MEC1_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 8) 1129#define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1) 1130#define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF 1131#define S_008218_MEC1_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 9) 1132#define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1) 1133#define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF 1134#define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 10) 1135#define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1) 1136#define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF 1137#define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 13) 1138#define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1) 1139#define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF 1140#define S_008218_MEC2_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 16) 1141#define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1) 1142#define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF 1143#define S_008218_MEC2_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 17) 1144#define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1) 1145#define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF 1146#define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 18) 1147#define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1) 1148#define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF 1149#define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 21) 1150#define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1) 1151#define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF 1152#define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) 1153#define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) 1154#define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF 1155#define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) 1156#define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) 1157#define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF 1158#define S_008218_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) 1159#define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) 1160#define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF 1161#define R_00821C_CP_CPF_STATUS 0x00821C 1162#define S_00821C_POST_WPTR_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1163#define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1) 1164#define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE 1165#define S_00821C_CSF_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1166#define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1) 1167#define C_00821C_CSF_BUSY 0xFFFFFFFD 1168#define S_00821C_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1169#define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1) 1170#define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF 1171#define S_00821C_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1172#define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1) 1173#define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF 1174#define S_00821C_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1175#define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1) 1176#define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF 1177#define S_00821C_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1178#define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1) 1179#define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F 1180#define S_00821C_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1181#define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1) 1182#define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF 1183#define S_00821C_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1184#define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1) 1185#define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF 1186#define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1187#define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 1188#define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF 1189#define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1190#define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 1191#define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF 1192#define S_00821C_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1193#define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1) 1194#define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF 1195#define S_00821C_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1196#define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1) 1197#define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF 1198#define S_00821C_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1199#define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1) 1200#define C_00821C_TCIU_BUSY 0xFFFFBFFF 1201#define S_00821C_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1202#define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1) 1203#define C_00821C_HQD_BUSY 0xFFFF7FFF 1204#define S_00821C_PRT_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1205#define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1) 1206#define C_00821C_PRT_BUSY 0xFFFEFFFF 1207#define S_00821C_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1208#define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1) 1209#define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF 1210#define S_00821C_CPF_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1211#define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1) 1212#define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF 1213#define S_00821C_CPF_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1214#define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1) 1215#define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF 1216#define S_00821C_GRBM_CPF_STAT_BUSY(x) (((unsigned)(x) & 0x03) << 28) 1217#define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x03) 1218#define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF 1219#define S_00821C_CPC_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1220#define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1) 1221#define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF 1222#define S_00821C_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1223#define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1) 1224#define C_00821C_CPF_BUSY 0x7FFFFFFF 1225#define R_008220_CP_CPF_BUSY_STAT 0x008220 1226#define S_008220_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1227#define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) 1228#define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE 1229#define S_008220_CSF_RING_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1230#define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1) 1231#define C_008220_CSF_RING_BUSY 0xFFFFFFFD 1232#define S_008220_CSF_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1233#define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1) 1234#define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB 1235#define S_008220_CSF_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1236#define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1) 1237#define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7 1238#define S_008220_CSF_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1239#define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1) 1240#define C_008220_CSF_STATE_BUSY 0xFFFFFFEF 1241#define S_008220_CSF_CE_INDR1_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1242#define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1) 1243#define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF 1244#define S_008220_CSF_CE_INDR2_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1245#define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1) 1246#define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF 1247#define S_008220_CSF_ARBITER_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1248#define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1) 1249#define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F 1250#define S_008220_CSF_INPUT_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1251#define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1) 1252#define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF 1253#define S_008220_OUTSTANDING_READ_TAGS(x) (((unsigned)(x) & 0x1) << 9) 1254#define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1) 1255#define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF 1256#define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1257#define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1) 1258#define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF 1259#define S_008220_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1260#define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) 1261#define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF 1262#define S_008220_HQD_IQ_TIMER_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1263#define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1) 1264#define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF 1265#define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1266#define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) 1267#define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF 1268#define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1269#define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1) 1270#define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF 1271#define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1272#define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1) 1273#define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF 1274#define S_008220_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1275#define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) 1276#define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF 1277#define S_008220_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1278#define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) 1279#define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF 1280#define S_008220_HQD_IB_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1281#define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1) 1282#define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF 1283#define S_008220_HQD_IQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1284#define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1) 1285#define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF 1286#define S_008220_HQD_EOP_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1287#define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1) 1288#define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF 1289#define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1290#define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) 1291#define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF 1292#define S_008220_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1293#define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) 1294#define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF 1295#define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1296#define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) 1297#define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF 1298#define S_008220_HQD_ROQ_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1299#define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1) 1300#define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF 1301#define S_008220_HQD_ROQ_IQ_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1302#define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1) 1303#define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF 1304#define S_008220_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1305#define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) 1306#define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF 1307#define S_008220_HQD_ROQ_IB_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1308#define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1) 1309#define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF 1310#define S_008220_HQD_WPTR_POLL_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1311#define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1) 1312#define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF 1313#define S_008220_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1314#define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) 1315#define C_008220_HQD_PQ_BUSY 0xBFFFFFFF 1316#define S_008220_HQD_IB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1317#define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1) 1318#define C_008220_HQD_IB_BUSY 0x7FFFFFFF 1319#define R_008224_CP_CPF_STALLED_STAT1 0x008224 1320#define S_008224_RING_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 0) 1321#define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1) 1322#define C_008224_RING_FETCHING_DATA 0xFFFFFFFE 1323#define S_008224_INDR1_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 1) 1324#define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1) 1325#define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD 1326#define S_008224_INDR2_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 2) 1327#define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1) 1328#define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB 1329#define S_008224_STATE_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 3) 1330#define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1) 1331#define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7 1332#define S_008224_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 5) 1333#define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1) 1334#define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF 1335#define S_008224_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 6) 1336#define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1) 1337#define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF 1338#define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) 1339#define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) 1340#define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F 1341#define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) 1342#define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) 1343#define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF 1344#define S_008224_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) 1345#define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) 1346#define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF 1347#define R_030230_CP_COHER_SIZE_HI 0x030230 1348#define S_030230_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 1349#define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) 1350#define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00 1351/* */ 1352#define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0 1353#define S_0088B0_PRIM_COUNT(x) (((unsigned)(x) & 0x3FF) << 0) 1354#define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF) 1355#define C_0088B0_PRIM_COUNT 0xFFFFFC00 1356#define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4 1357#define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((unsigned)(x) & 0x1) << 5) 1358#define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1) 1359#define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF 1360#define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 1361#define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1) 1362#define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF 1363#define S_0088C4_ES_LIMIT(x) (((unsigned)(x) & 0x1F) << 16) 1364#define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F) 1365#define C_0088C4_ES_LIMIT 0xFFE0FFFF 1366#define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8 1367#define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC 1368#define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4 1369#define S_0088D4_VERT_REUSE(x) (((unsigned)(x) & 0x1F) << 0) 1370#define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F) 1371#define C_0088D4_VERT_REUSE 0xFFFFFFE0 1372#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 1373#define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1374#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 1375#define C_008958_PRIM_TYPE 0xFFFFFFC0 1376#define V_008958_DI_PT_NONE 0x00 1377#define V_008958_DI_PT_POINTLIST 0x01 1378#define V_008958_DI_PT_LINELIST 0x02 1379#define V_008958_DI_PT_LINESTRIP 0x03 1380#define V_008958_DI_PT_TRILIST 0x04 1381#define V_008958_DI_PT_TRIFAN 0x05 1382#define V_008958_DI_PT_TRISTRIP 0x06 1383#define V_008958_DI_PT_UNUSED_0 0x07 1384#define V_008958_DI_PT_UNUSED_1 0x08 1385#define V_008958_DI_PT_PATCH 0x09 1386#define V_008958_DI_PT_LINELIST_ADJ 0x0A 1387#define V_008958_DI_PT_LINESTRIP_ADJ 0x0B 1388#define V_008958_DI_PT_TRILIST_ADJ 0x0C 1389#define V_008958_DI_PT_TRISTRIP_ADJ 0x0D 1390#define V_008958_DI_PT_UNUSED_3 0x0E 1391#define V_008958_DI_PT_UNUSED_4 0x0F 1392#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x10 1393#define V_008958_DI_PT_RECTLIST 0x11 1394#define V_008958_DI_PT_LINELOOP 0x12 1395#define V_008958_DI_PT_QUADLIST 0x13 1396#define V_008958_DI_PT_QUADSTRIP 0x14 1397#define V_008958_DI_PT_POLYGON 0x15 1398#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x16 1399#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x17 1400#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x18 1401#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x19 1402#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x1A 1403#define V_008958_DI_PT_2D_LINE_STRIP 0x1B 1404#define V_008958_DI_PT_2D_TRI_STRIP 0x1C 1405#define R_00895C_VGT_INDEX_TYPE 0x00895C 1406#define S_00895C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 1407#define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 1408#define C_00895C_INDEX_TYPE 0xFFFFFFFC 1409#define V_00895C_DI_INDEX_SIZE_16_BIT 0x00 1410#define V_00895C_DI_INDEX_SIZE_32_BIT 0x01 1411#define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 1412#define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 1413#define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 1414#define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C 1415#define R_008970_VGT_NUM_INDICES 0x008970 1416#define R_008974_VGT_NUM_INSTANCES 0x008974 1417#define R_008988_VGT_TF_RING_SIZE 0x008988 1418#define S_008988_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 1419#define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF) 1420#define C_008988_SIZE 0xFFFF0000 1421#define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0 1422#define S_0089B0_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x7F) << 0) 1423#define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F) 1424#define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80 1425#define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8 1426#define R_008A14_PA_CL_ENHANCE 0x008A14 1427#define S_008A14_CLIP_VTX_REORDER_ENA(x) (((unsigned)(x) & 0x1) << 0) 1428#define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1) 1429#define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE 1430#define S_008A14_NUM_CLIP_SEQ(x) (((unsigned)(x) & 0x03) << 1) 1431#define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x03) 1432#define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9 1433#define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((unsigned)(x) & 0x1) << 3) 1434#define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1) 1435#define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7 1436#define S_008A14_VE_NAN_PROC_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 1437#define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1) 1438#define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF 1439#define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60 1440#define S_008A60_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 1441#define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 1442#define C_008A60_LINE_STIPPLE_VALUE 0xFF000000 1443#define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10 1444#define S_008B10_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) 1445#define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0x0F) 1446#define C_008B10_CURRENT_PTR 0xFFFFFFF0 1447#define S_008B10_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 1448#define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 1449#define C_008B10_CURRENT_COUNT 0xFFFF00FF 1450#define R_008670_CP_STALLED_STAT3 0x008670 1451#define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1452#define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1453#define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 1454#define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 1455#define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 1456#define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD 1457#define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((unsigned)(x) & 0x1) << 2) 1458#define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1) 1459#define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB 1460#define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((unsigned)(x) & 0x1) << 3) 1461#define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1) 1462#define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7 1463#define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((unsigned)(x) & 0x1) << 4) 1464#define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1) 1465#define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF 1466#define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((unsigned)(x) & 0x1) << 5) 1467#define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1) 1468#define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF 1469#define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 6) 1470#define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1) 1471#define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF 1472#define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) 1473#define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) 1474#define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F 1475#define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 10) 1476#define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1) 1477#define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF 1478#define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 1479#define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 1480#define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF 1481#define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((unsigned)(x) & 0x1) << 12) 1482#define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1) 1483#define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF 1484#define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((unsigned)(x) & 0x1) << 13) 1485#define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1) 1486#define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF 1487#define S_008670_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 14) 1488#define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1) 1489#define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF 1490#define S_008670_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 15) 1491#define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1) 1492#define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF 1493#define S_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 16) 1494#define G_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 16) & 0x1) 1495#define C_008670_CE_STALLED_ON_TC_WR_CONFIRM 0xFFFEFFFF 1496#define S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 17) 1497#define G_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 17) & 0x1) 1498#define C_008670_CE_STALLED_ON_ATOMIC_RTN_DATA 0xFFFDFFFF 1499#define S_008670_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 18) 1500#define G_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 18) & 0x1) 1501#define C_008670_ATCL2IU_WAITING_ON_FREE 0xFFFBFFFF 1502#define S_008670_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 19) 1503#define G_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 19) & 0x1) 1504#define C_008670_ATCL2IU_WAITING_ON_TAGS 0xFFF7FFFF 1505#define S_008670_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 20) 1506#define G_008670_ATCL1_WAITING_ON_TRANS(x) (((x) >> 20) & 0x1) 1507#define C_008670_ATCL1_WAITING_ON_TRANS 0xFFEFFFFF 1508#define R_008674_CP_STALLED_STAT1 0x008674 1509#define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1510#define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1511#define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE 1512#define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 1513#define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 1514#define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB 1515#define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 4) 1516#define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1) 1517#define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF 1518#define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 10) 1519#define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1) 1520#define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF 1521#define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 1522#define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 1523#define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF 1524#define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 12) 1525#define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1) 1526#define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF 1527#define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 13) 1528#define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1) 1529#define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF 1530#define S_008674_ME_WAITING_ON_TC_READ_DATA(x) (((unsigned)(x) & 0x1) << 14) 1531#define G_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) >> 14) & 0x1) 1532#define C_008674_ME_WAITING_ON_TC_READ_DATA 0xFFFFBFFF 1533#define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((unsigned)(x) & 0x1) << 15) 1534#define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1) 1535#define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF 1536#define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((unsigned)(x) & 0x1) << 23) 1537#define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1) 1538#define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF 1539#define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((unsigned)(x) & 0x1) << 24) 1540#define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1) 1541#define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF 1542#define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((unsigned)(x) & 0x1) << 25) 1543#define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1) 1544#define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF 1545#define S_008674_RCIU_STALLED_ON_ME_READ(x) (((unsigned)(x) & 0x1) << 26) 1546#define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1) 1547#define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF 1548#define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((unsigned)(x) & 0x1) << 27) 1549#define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1) 1550#define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF 1551#define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((unsigned)(x) & 0x1) << 28) 1552#define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1) 1553#define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF 1554#define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((unsigned)(x) & 0x1) << 29) 1555#define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 29) & 0x1) 1556#define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xDFFFFFFF 1557#define R_008678_CP_STALLED_STAT2 0x008678 1558#define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1559#define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1560#define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 1561#define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 1562#define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 1563#define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD 1564#define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 1565#define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 1566#define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB 1567#define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((unsigned)(x) & 0x1) << 4) 1568#define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1) 1569#define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF 1570#define S_008678_PFP_RCIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 1571#define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1) 1572#define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF 1573#define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 8) 1574#define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1) 1575#define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF 1576#define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((unsigned)(x) & 0x1) << 9) 1577#define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1) 1578#define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF 1579#define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((unsigned)(x) & 0x1) << 10) 1580#define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1) 1581#define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF 1582#define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((unsigned)(x) & 0x1) << 11) 1583#define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1) 1584#define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF 1585#define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 12) 1586#define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1) 1587#define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF 1588#define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 13) 1589#define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1) 1590#define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF 1591#define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((unsigned)(x) & 0x1) << 14) 1592#define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1) 1593#define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF 1594#define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((unsigned)(x) & 0x1) << 15) 1595#define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1) 1596#define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF 1597#define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 16) 1598#define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1) 1599#define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF 1600#define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 17) 1601#define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1) 1602#define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF 1603#define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((unsigned)(x) & 0x1) << 18) 1604#define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1) 1605#define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF 1606#define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 19) 1607#define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1) 1608#define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF 1609#define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 20) 1610#define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1) 1611#define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF 1612#define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((unsigned)(x) & 0x1) << 21) 1613#define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1) 1614#define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF 1615#define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 22) 1616#define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1) 1617#define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF 1618#define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 23) 1619#define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1) 1620#define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF 1621#define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 24) 1622#define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1) 1623#define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF 1624#define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((unsigned)(x) & 0x1) << 25) 1625#define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1) 1626#define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF 1627#define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((unsigned)(x) & 0x1) << 26) 1628#define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1) 1629#define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF 1630#define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 27) 1631#define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1) 1632#define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF 1633#define S_008678_APPEND_ACTIVE_PARTITION(x) (((unsigned)(x) & 0x1) << 28) 1634#define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1) 1635#define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF 1636#define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((unsigned)(x) & 0x1) << 29) 1637#define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1) 1638#define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF 1639#define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((unsigned)(x) & 0x1) << 30) 1640#define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1) 1641#define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF 1642#define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((unsigned)(x) & 0x1) << 31) 1643#define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1) 1644#define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF 1645#define R_008680_CP_STAT 0x008680 1646#define S_008680_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1647#define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1) 1648#define C_008680_ROQ_RING_BUSY 0xFFFFFDFF 1649#define S_008680_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1650#define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 1651#define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF 1652#define S_008680_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1653#define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 1654#define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF 1655#define S_008680_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1656#define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1) 1657#define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF 1658#define S_008680_DC_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1659#define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1) 1660#define C_008680_DC_BUSY 0xFFFFDFFF 1661#define S_008680_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1662#define G_008680_ATCL2IU_BUSY(x) (((x) >> 14) & 0x1) 1663#define C_008680_ATCL2IU_BUSY 0xFFFFBFFF 1664#define S_008680_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1665#define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1) 1666#define C_008680_PFP_BUSY 0xFFFF7FFF 1667#define S_008680_MEQ_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1668#define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1) 1669#define C_008680_MEQ_BUSY 0xFFFEFFFF 1670#define S_008680_ME_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1671#define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1) 1672#define C_008680_ME_BUSY 0xFFFDFFFF 1673#define S_008680_QUERY_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1674#define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1) 1675#define C_008680_QUERY_BUSY 0xFFFBFFFF 1676#define S_008680_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1677#define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1) 1678#define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF 1679#define S_008680_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1680#define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1) 1681#define C_008680_INTERRUPT_BUSY 0xFFEFFFFF 1682#define S_008680_SURFACE_SYNC_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1683#define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) 1684#define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF 1685#define S_008680_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1686#define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1) 1687#define C_008680_DMA_BUSY 0xFFBFFFFF 1688#define S_008680_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1689#define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1) 1690#define C_008680_RCIU_BUSY 0xFF7FFFFF 1691#define S_008680_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1692#define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) 1693#define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF 1694#define S_008680_CPC_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1695#define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1) 1696#define C_008680_CPC_CPG_BUSY 0xFDFFFFFF 1697#define S_008680_CE_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1698#define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1) 1699#define C_008680_CE_BUSY 0xFBFFFFFF 1700#define S_008680_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1701#define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1) 1702#define C_008680_TCIU_BUSY 0xF7FFFFFF 1703#define S_008680_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1704#define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1) 1705#define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF 1706#define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1707#define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1) 1708#define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF 1709#define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1710#define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1) 1711#define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF 1712#define S_008680_CP_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1713#define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1) 1714#define C_008680_CP_BUSY 0x7FFFFFFF 1715/* CIK */ 1716#define R_030800_GRBM_GFX_INDEX 0x030800 1717#define S_030800_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 1718#define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) 1719#define C_030800_INSTANCE_INDEX 0xFFFFFF00 1720#define S_030800_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) 1721#define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF) 1722#define C_030800_SH_INDEX 0xFFFF00FF 1723#define S_030800_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) 1724#define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF) 1725#define C_030800_SE_INDEX 0xFF00FFFF 1726#define S_030800_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) 1727#define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) 1728#define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF 1729#define S_030800_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) 1730#define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) 1731#define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF 1732#define S_030800_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) 1733#define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) 1734#define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF 1735#define R_030900_VGT_ESGS_RING_SIZE 0x030900 1736#define R_030904_VGT_GSVS_RING_SIZE 0x030904 1737#define R_030908_VGT_PRIMITIVE_TYPE 0x030908 1738#define S_030908_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1739#define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 1740#define C_030908_PRIM_TYPE 0xFFFFFFC0 1741#define V_030908_DI_PT_NONE 0x00 1742#define V_030908_DI_PT_POINTLIST 0x01 1743#define V_030908_DI_PT_LINELIST 0x02 1744#define V_030908_DI_PT_LINESTRIP 0x03 1745#define V_030908_DI_PT_TRILIST 0x04 1746#define V_030908_DI_PT_TRIFAN 0x05 1747#define V_030908_DI_PT_TRISTRIP 0x06 1748#define V_030908_DI_PT_PATCH 0x09 1749#define V_030908_DI_PT_LINELIST_ADJ 0x0A 1750#define V_030908_DI_PT_LINESTRIP_ADJ 0x0B 1751#define V_030908_DI_PT_TRILIST_ADJ 0x0C 1752#define V_030908_DI_PT_TRISTRIP_ADJ 0x0D 1753#define V_030908_DI_PT_TRI_WITH_WFLAGS 0x10 1754#define V_030908_DI_PT_RECTLIST 0x11 1755#define V_030908_DI_PT_LINELOOP 0x12 1756#define V_030908_DI_PT_QUADLIST 0x13 1757#define V_030908_DI_PT_QUADSTRIP 0x14 1758#define V_030908_DI_PT_POLYGON 0x15 1759#define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 0x16 1760#define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 0x17 1761#define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 0x18 1762#define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 0x19 1763#define V_030908_DI_PT_2D_FILL_RECT_LIST 0x1A 1764#define V_030908_DI_PT_2D_LINE_STRIP 0x1B 1765#define V_030908_DI_PT_2D_TRI_STRIP 0x1C 1766#define R_03090C_VGT_INDEX_TYPE 0x03090C 1767#define S_03090C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 1768#define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 1769#define C_03090C_INDEX_TYPE 0xFFFFFFFC 1770#define V_03090C_DI_INDEX_SIZE_16_BIT 0x00 1771#define V_03090C_DI_INDEX_SIZE_32_BIT 0x01 1772#define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910 1773#define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914 1774#define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918 1775#define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C 1776#define R_030930_VGT_NUM_INDICES 0x030930 1777#define R_030934_VGT_NUM_INSTANCES 0x030934 1778#define R_030938_VGT_TF_RING_SIZE 0x030938 1779#define S_030938_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 1780#define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF) 1781#define C_030938_SIZE 0xFFFF0000 1782#define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C 1783#define S_03093C_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x1FF) << 0) 1784#define G_03093C_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x1FF) 1785#define C_03093C_OFFCHIP_BUFFERING 0xFFFFFE00 1786#define S_03093C_OFFCHIP_GRANULARITY(x) (((unsigned)(x) & 0x03) << 9) 1787#define G_03093C_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x03) 1788#define C_03093C_OFFCHIP_GRANULARITY 0xFFFFF9FF 1789#define V_03093C_X_8K_DWORDS 0x00 1790#define V_03093C_X_4K_DWORDS 0x01 1791#define V_03093C_X_2K_DWORDS 0x02 1792#define V_03093C_X_1K_DWORDS 0x03 1793#define R_030940_VGT_TF_MEMORY_BASE 0x030940 1794#define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00 1795#define S_030A00_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 1796#define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 1797#define C_030A00_LINE_STIPPLE_VALUE 0xFF000000 1798#define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04 1799#define S_030A04_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) 1800#define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0x0F) 1801#define C_030A04_CURRENT_PTR 0xFFFFFFF0 1802#define S_030A04_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 1803#define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 1804#define C_030A04_CURRENT_COUNT 0xFFFF00FF 1805#define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10 1806#define S_030A10_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1807#define G_030A10_X(x) (((x) >> 0) & 0xFFFF) 1808#define C_030A10_X 0xFFFF0000 1809#define S_030A10_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1810#define G_030A10_Y(x) (((x) >> 16) & 0xFFFF) 1811#define C_030A10_Y 0x0000FFFF 1812#define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14 1813#define S_030A14_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1814#define G_030A14_X(x) (((x) >> 0) & 0xFFFF) 1815#define C_030A14_X 0xFFFF0000 1816#define S_030A14_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1817#define G_030A14_Y(x) (((x) >> 16) & 0xFFFF) 1818#define C_030A14_Y 0x0000FFFF 1819#define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18 1820#define S_030A18_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1821#define G_030A18_X(x) (((x) >> 0) & 0xFFFF) 1822#define C_030A18_X 0xFFFF0000 1823#define S_030A18_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1824#define G_030A18_Y(x) (((x) >> 16) & 0xFFFF) 1825#define C_030A18_Y 0x0000FFFF 1826#define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C 1827#define S_030A2C_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1828#define G_030A2C_X(x) (((x) >> 0) & 0xFFFF) 1829#define C_030A2C_X 0xFFFF0000 1830#define S_030A2C_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1831#define G_030A2C_Y(x) (((x) >> 16) & 0xFFFF) 1832#define C_030A2C_Y 0x0000FFFF 1833/* */ 1834#define R_008BF0_PA_SC_ENHANCE 0x008BF0 1835#define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((unsigned)(x) & 0x1) << 0) 1836#define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1) 1837#define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE 1838#define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((unsigned)(x) & 0x1) << 1) 1839#define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1) 1840#define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD 1841#define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((unsigned)(x) & 0x1) << 2) 1842#define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1) 1843#define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB 1844#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((unsigned)(x) & 0x1) << 3) 1845#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1) 1846#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7 1847#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((unsigned)(x) & 0x1) << 4) 1848#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1) 1849#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF 1850#define S_008BF0_DISABLE_SCISSOR_FIX(x) (((unsigned)(x) & 0x1) << 5) 1851#define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1) 1852#define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF 1853#define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((unsigned)(x) & 0x03) << 6) 1854#define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x03) 1855#define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F 1856#define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((unsigned)(x) & 0x1) << 8) 1857#define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1) 1858#define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF 1859#define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 9) 1860#define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1) 1861#define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF 1862#define R_008C08_SQC_CACHES 0x008C08 1863#define S_008C08_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) 1864#define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 1865#define C_008C08_INST_INVALIDATE 0xFFFFFFFE 1866#define S_008C08_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) 1867#define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 1868#define C_008C08_DATA_INVALIDATE 0xFFFFFFFD 1869/* CIK */ 1870#define R_030D20_SQC_CACHES 0x030D20 1871#define S_030D20_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) 1872#define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 1873#define C_030D20_INST_INVALIDATE 0xFFFFFFFE 1874#define S_030D20_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) 1875#define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 1876#define C_030D20_DATA_INVALIDATE 0xFFFFFFFD 1877#define S_030D20_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) 1878#define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) 1879#define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB 1880/* */ 1881#define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C 1882#define S_008C0C_RET(x) (((unsigned)(x) & 0x7F) << 0) 1883#define G_008C0C_RET(x) (((x) >> 0) & 0x7F) 1884#define C_008C0C_RET 0xFFFFFF80 1885#define S_008C0C_RUI(x) (((unsigned)(x) & 0x07) << 7) 1886#define G_008C0C_RUI(x) (((x) >> 7) & 0x07) 1887#define C_008C0C_RUI 0xFFFFFC7F 1888#define S_008C0C_RNG(x) (((unsigned)(x) & 0x7FF) << 10) 1889#define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF) 1890#define C_008C0C_RNG 0xFFE003FF 1891#define R_008DFC_SQ_EXP_0 0x008DFC 1892#define S_008DFC_EN(x) (((unsigned)(x) & 0x0F) << 0) 1893#define G_008DFC_EN(x) (((x) >> 0) & 0x0F) 1894#define C_008DFC_EN 0xFFFFFFF0 1895#define S_008DFC_TGT(x) (((unsigned)(x) & 0x3F) << 4) 1896#define G_008DFC_TGT(x) (((x) >> 4) & 0x3F) 1897#define C_008DFC_TGT 0xFFFFFC0F 1898#define V_008DFC_SQ_EXP_MRT 0x00 1899#define V_008DFC_SQ_EXP_MRTZ 0x08 1900#define V_008DFC_SQ_EXP_NULL 0x09 1901#define V_008DFC_SQ_EXP_POS 0x0C 1902#define V_008DFC_SQ_EXP_PARAM 0x20 1903#define S_008DFC_COMPR(x) (((unsigned)(x) & 0x1) << 10) 1904#define G_008DFC_COMPR(x) (((x) >> 10) & 0x1) 1905#define C_008DFC_COMPR 0xFFFFFBFF 1906#define S_008DFC_DONE(x) (((unsigned)(x) & 0x1) << 11) 1907#define G_008DFC_DONE(x) (((x) >> 11) & 0x1) 1908#define C_008DFC_DONE 0xFFFFF7FF 1909#define S_008DFC_VM(x) (((unsigned)(x) & 0x1) << 12) 1910#define G_008DFC_VM(x) (((x) >> 12) & 0x1) 1911#define C_008DFC_VM 0xFFFFEFFF 1912#define S_008DFC_ENCODING(x) (((unsigned)(x) & 0x3F) << 26) 1913#define G_008DFC_ENCODING(x) (((x) >> 26) & 0x3F) 1914#define C_008DFC_ENCODING 0x03FFFFFF 1915#define V_008DFC_SQ_ENC_EXP_FIELD 0x3E 1916#define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00 1917#define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04 1918#define S_030E04_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 1919#define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF) 1920#define C_030E04_ADDRESS 0xFFFFFF00 1921#define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00 1922#define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00 1923#define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04 1924#define S_030F04_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 1925#define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 1926#define C_030F04_COUNT_HI 0x80000000 1927#define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04 1928#define S_008F04_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 1929#define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF) 1930#define C_008F04_BASE_ADDRESS_HI 0xFFFF0000 1931#define S_008F04_STRIDE(x) (((unsigned)(x) & 0x3FFF) << 16) 1932#define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF) 1933#define C_008F04_STRIDE 0xC000FFFF 1934#define S_008F04_CACHE_SWIZZLE(x) (((unsigned)(x) & 0x1) << 30) 1935#define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1) 1936#define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF 1937#define S_008F04_SWIZZLE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 1938#define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1) 1939#define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF 1940#define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08 1941#define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08 1942#define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C 1943#define S_030F0C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 1944#define G_030F0C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 1945#define C_030F0C_COUNT_HI 0x80000000 1946#define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C 1947#define S_008F0C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) 1948#define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x07) 1949#define C_008F0C_DST_SEL_X 0xFFFFFFF8 1950#define V_008F0C_SQ_SEL_0 0x00 1951#define V_008F0C_SQ_SEL_1 0x01 1952#define V_008F0C_SQ_SEL_RESERVED_0 0x02 1953#define V_008F0C_SQ_SEL_RESERVED_1 0x03 1954#define V_008F0C_SQ_SEL_X 0x04 1955#define V_008F0C_SQ_SEL_Y 0x05 1956#define V_008F0C_SQ_SEL_Z 0x06 1957#define V_008F0C_SQ_SEL_W 0x07 1958#define S_008F0C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) 1959#define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x07) 1960#define C_008F0C_DST_SEL_Y 0xFFFFFFC7 1961#define V_008F0C_SQ_SEL_0 0x00 1962#define V_008F0C_SQ_SEL_1 0x01 1963#define V_008F0C_SQ_SEL_RESERVED_0 0x02 1964#define V_008F0C_SQ_SEL_RESERVED_1 0x03 1965#define V_008F0C_SQ_SEL_X 0x04 1966#define V_008F0C_SQ_SEL_Y 0x05 1967#define V_008F0C_SQ_SEL_Z 0x06 1968#define V_008F0C_SQ_SEL_W 0x07 1969#define S_008F0C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) 1970#define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x07) 1971#define C_008F0C_DST_SEL_Z 0xFFFFFE3F 1972#define V_008F0C_SQ_SEL_0 0x00 1973#define V_008F0C_SQ_SEL_1 0x01 1974#define V_008F0C_SQ_SEL_RESERVED_0 0x02 1975#define V_008F0C_SQ_SEL_RESERVED_1 0x03 1976#define V_008F0C_SQ_SEL_X 0x04 1977#define V_008F0C_SQ_SEL_Y 0x05 1978#define V_008F0C_SQ_SEL_Z 0x06 1979#define V_008F0C_SQ_SEL_W 0x07 1980#define S_008F0C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) 1981#define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x07) 1982#define C_008F0C_DST_SEL_W 0xFFFFF1FF 1983#define V_008F0C_SQ_SEL_0 0x00 1984#define V_008F0C_SQ_SEL_1 0x01 1985#define V_008F0C_SQ_SEL_RESERVED_0 0x02 1986#define V_008F0C_SQ_SEL_RESERVED_1 0x03 1987#define V_008F0C_SQ_SEL_X 0x04 1988#define V_008F0C_SQ_SEL_Y 0x05 1989#define V_008F0C_SQ_SEL_Z 0x06 1990#define V_008F0C_SQ_SEL_W 0x07 1991#define S_008F0C_NUM_FORMAT(x) (((unsigned)(x) & 0x07) << 12) 1992#define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x07) 1993#define C_008F0C_NUM_FORMAT 0xFFFF8FFF 1994#define V_008F0C_BUF_NUM_FORMAT_UNORM 0x00 1995#define V_008F0C_BUF_NUM_FORMAT_SNORM 0x01 1996#define V_008F0C_BUF_NUM_FORMAT_USCALED 0x02 1997#define V_008F0C_BUF_NUM_FORMAT_SSCALED 0x03 1998#define V_008F0C_BUF_NUM_FORMAT_UINT 0x04 1999#define V_008F0C_BUF_NUM_FORMAT_SINT 0x05 2000#define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 0x06 2001#define V_008F0C_BUF_NUM_FORMAT_FLOAT 0x07 2002#define S_008F0C_DATA_FORMAT(x) (((unsigned)(x) & 0x0F) << 15) 2003#define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0x0F) 2004#define C_008F0C_DATA_FORMAT 0xFFF87FFF 2005#define V_008F0C_BUF_DATA_FORMAT_INVALID 0x00 2006#define V_008F0C_BUF_DATA_FORMAT_8 0x01 2007#define V_008F0C_BUF_DATA_FORMAT_16 0x02 2008#define V_008F0C_BUF_DATA_FORMAT_8_8 0x03 2009#define V_008F0C_BUF_DATA_FORMAT_32 0x04 2010#define V_008F0C_BUF_DATA_FORMAT_16_16 0x05 2011#define V_008F0C_BUF_DATA_FORMAT_10_11_11 0x06 2012#define V_008F0C_BUF_DATA_FORMAT_11_11_10 0x07 2013#define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 0x08 2014#define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 0x09 2015#define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 0x0A 2016#define V_008F0C_BUF_DATA_FORMAT_32_32 0x0B 2017#define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 0x0C 2018#define V_008F0C_BUF_DATA_FORMAT_32_32_32 0x0D 2019#define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 0x0E 2020#define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 0x0F 2021#define S_008F0C_ELEMENT_SIZE(x) (((unsigned)(x) & 0x03) << 19) 2022#define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x03) 2023#define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF 2024#define S_008F0C_INDEX_STRIDE(x) (((unsigned)(x) & 0x03) << 21) 2025#define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x03) 2026#define C_008F0C_INDEX_STRIDE 0xFF9FFFFF 2027#define S_008F0C_ADD_TID_ENABLE(x) (((unsigned)(x) & 0x1) << 23) 2028#define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1) 2029#define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF 2030/* CIK */ 2031#define S_008F0C_ATC(x) (((unsigned)(x) & 0x1) << 24) 2032#define G_008F0C_ATC(x) (((x) >> 24) & 0x1) 2033#define C_008F0C_ATC 0xFEFFFFFF 2034/* */ 2035#define S_008F0C_HASH_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 2036#define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1) 2037#define C_008F0C_HASH_ENABLE 0xFDFFFFFF 2038#define S_008F0C_HEAP(x) (((unsigned)(x) & 0x1) << 26) 2039#define G_008F0C_HEAP(x) (((x) >> 26) & 0x1) 2040#define C_008F0C_HEAP 0xFBFFFFFF 2041/* CIK */ 2042#define S_008F0C_MTYPE(x) (((unsigned)(x) & 0x07) << 27) 2043#define G_008F0C_MTYPE(x) (((x) >> 27) & 0x07) 2044#define C_008F0C_MTYPE 0xC7FFFFFF 2045/* */ 2046#define S_008F0C_TYPE(x) (((unsigned)(x) & 0x03) << 30) 2047#define G_008F0C_TYPE(x) (((x) >> 30) & 0x03) 2048#define C_008F0C_TYPE 0x3FFFFFFF 2049#define V_008F0C_SQ_RSRC_BUF 0x00 2050#define V_008F0C_SQ_RSRC_BUF_RSVD_1 0x01 2051#define V_008F0C_SQ_RSRC_BUF_RSVD_2 0x02 2052#define V_008F0C_SQ_RSRC_BUF_RSVD_3 0x03 2053#define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10 2054#define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10 2055#define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14 2056#define S_030F14_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2057#define G_030F14_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2058#define C_030F14_COUNT_HI 0x80000000 2059#define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14 2060#define S_008F14_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) 2061#define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) 2062#define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00 2063#define S_008F14_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) 2064#define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF) 2065#define C_008F14_MIN_LOD 0xFFF000FF 2066#define S_008F14_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 20) 2067#define G_008F14_DATA_FORMAT(x) (((x) >> 20) & 0x3F) 2068#define C_008F14_DATA_FORMAT 0xFC0FFFFF 2069#define V_008F14_IMG_DATA_FORMAT_INVALID 0x00 2070#define V_008F14_IMG_DATA_FORMAT_8 0x01 2071#define V_008F14_IMG_DATA_FORMAT_16 0x02 2072#define V_008F14_IMG_DATA_FORMAT_8_8 0x03 2073#define V_008F14_IMG_DATA_FORMAT_32 0x04 2074#define V_008F14_IMG_DATA_FORMAT_16_16 0x05 2075#define V_008F14_IMG_DATA_FORMAT_10_11_11 0x06 2076#define V_008F14_IMG_DATA_FORMAT_11_11_10 0x07 2077#define V_008F14_IMG_DATA_FORMAT_10_10_10_2 0x08 2078#define V_008F14_IMG_DATA_FORMAT_2_10_10_10 0x09 2079#define V_008F14_IMG_DATA_FORMAT_8_8_8_8 0x0A 2080#define V_008F14_IMG_DATA_FORMAT_32_32 0x0B 2081#define V_008F14_IMG_DATA_FORMAT_16_16_16_16 0x0C 2082#define V_008F14_IMG_DATA_FORMAT_32_32_32 0x0D 2083#define V_008F14_IMG_DATA_FORMAT_32_32_32_32 0x0E 2084#define V_008F14_IMG_DATA_FORMAT_RESERVED_15 0x0F 2085#define V_008F14_IMG_DATA_FORMAT_5_6_5 0x10 2086#define V_008F14_IMG_DATA_FORMAT_1_5_5_5 0x11 2087#define V_008F14_IMG_DATA_FORMAT_5_5_5_1 0x12 2088#define V_008F14_IMG_DATA_FORMAT_4_4_4_4 0x13 2089#define V_008F14_IMG_DATA_FORMAT_8_24 0x14 2090#define V_008F14_IMG_DATA_FORMAT_24_8 0x15 2091#define V_008F14_IMG_DATA_FORMAT_X24_8_32 0x16 2092#define V_008F14_IMG_DATA_FORMAT_8_AS_8_8_8_8 0x17 /* stoney+ */ 2093#define V_008F14_IMG_DATA_FORMAT_ETC2_RGB 0x18 /* stoney+ */ 2094#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA 0x19 /* stoney+ */ 2095#define V_008F14_IMG_DATA_FORMAT_ETC2_R 0x1A /* stoney+ */ 2096#define V_008F14_IMG_DATA_FORMAT_ETC2_RG 0x1B /* stoney+ */ 2097#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1 0x1C /* stoney+ */ 2098#define V_008F14_IMG_DATA_FORMAT_RESERVED_29 0x1D 2099#define V_008F14_IMG_DATA_FORMAT_RESERVED_30 0x1E 2100#define V_008F14_IMG_DATA_FORMAT_RESERVED_31 0x1F 2101#define V_008F14_IMG_DATA_FORMAT_GB_GR 0x20 2102#define V_008F14_IMG_DATA_FORMAT_BG_RG 0x21 2103#define V_008F14_IMG_DATA_FORMAT_5_9_9_9 0x22 2104#define V_008F14_IMG_DATA_FORMAT_BC1 0x23 2105#define V_008F14_IMG_DATA_FORMAT_BC2 0x24 2106#define V_008F14_IMG_DATA_FORMAT_BC3 0x25 2107#define V_008F14_IMG_DATA_FORMAT_BC4 0x26 2108#define V_008F14_IMG_DATA_FORMAT_BC5 0x27 2109#define V_008F14_IMG_DATA_FORMAT_BC6 0x28 2110#define V_008F14_IMG_DATA_FORMAT_BC7 0x29 2111#define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16 0x2A /* stoney+ */ 2112#define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32 0x2B /* stoney+ */ 2113#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 0x2C 2114#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 0x2D 2115#define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 0x2E 2116#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 0x2F 2117#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 0x30 2118#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 0x31 2119#define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 0x32 2120#define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 0x33 2121#define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 0x34 2122#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 0x35 2123#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 0x36 2124#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 0x37 2125#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 0x38 2126#define V_008F14_IMG_DATA_FORMAT_4_4 0x39 2127#define V_008F14_IMG_DATA_FORMAT_6_5_5 0x3A 2128#define V_008F14_IMG_DATA_FORMAT_1 0x3B 2129#define V_008F14_IMG_DATA_FORMAT_1_REVERSED 0x3C 2130#define V_008F14_IMG_DATA_FORMAT_32_AS_8 0x3D /* not on stoney */ 2131#define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 0x3E /* not on stoney */ 2132#define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 0x3F 2133#define S_008F14_NUM_FORMAT(x) (((unsigned)(x) & 0x0F) << 26) 2134#define G_008F14_NUM_FORMAT(x) (((x) >> 26) & 0x0F) 2135#define C_008F14_NUM_FORMAT 0xC3FFFFFF 2136#define V_008F14_IMG_NUM_FORMAT_UNORM 0x00 2137#define V_008F14_IMG_NUM_FORMAT_SNORM 0x01 2138#define V_008F14_IMG_NUM_FORMAT_USCALED 0x02 2139#define V_008F14_IMG_NUM_FORMAT_SSCALED 0x03 2140#define V_008F14_IMG_NUM_FORMAT_UINT 0x04 2141#define V_008F14_IMG_NUM_FORMAT_SINT 0x05 2142#define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 0x06 2143#define V_008F14_IMG_NUM_FORMAT_FLOAT 0x07 2144#define V_008F14_IMG_NUM_FORMAT_RESERVED_8 0x08 2145#define V_008F14_IMG_NUM_FORMAT_SRGB 0x09 2146#define V_008F14_IMG_NUM_FORMAT_UBNORM 0x0A 2147#define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 0x0B 2148#define V_008F14_IMG_NUM_FORMAT_UBINT 0x0C 2149#define V_008F14_IMG_NUM_FORMAT_UBSCALED 0x0D 2150#define V_008F14_IMG_NUM_FORMAT_RESERVED_14 0x0E 2151#define V_008F14_IMG_NUM_FORMAT_RESERVED_15 0x0F 2152/* CIK */ 2153#define S_008F14_MTYPE(x) (((unsigned)(x) & 0x03) << 30) 2154#define G_008F14_MTYPE(x) (((x) >> 30) & 0x03) 2155#define C_008F14_MTYPE 0x3FFFFFFF 2156/* */ 2157#define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18 2158#define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18 2159#define S_008F18_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 0) 2160#define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF) 2161#define C_008F18_WIDTH 0xFFFFC000 2162#define S_008F18_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) 2163#define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF) 2164#define C_008F18_HEIGHT 0xF0003FFF 2165#define S_008F18_PERF_MOD(x) (((unsigned)(x) & 0x07) << 28) 2166#define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x07) 2167#define C_008F18_PERF_MOD 0x8FFFFFFF 2168#define S_008F18_INTERLACED(x) (((unsigned)(x) & 0x1) << 31) 2169#define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1) 2170#define C_008F18_INTERLACED 0x7FFFFFFF 2171#define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C 2172#define S_030F1C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2173#define G_030F1C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2174#define C_030F1C_COUNT_HI 0x80000000 2175#define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C 2176#define S_008F1C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) 2177#define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x07) 2178#define C_008F1C_DST_SEL_X 0xFFFFFFF8 2179#define V_008F1C_SQ_SEL_0 0x00 2180#define V_008F1C_SQ_SEL_1 0x01 2181#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2182#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2183#define V_008F1C_SQ_SEL_X 0x04 2184#define V_008F1C_SQ_SEL_Y 0x05 2185#define V_008F1C_SQ_SEL_Z 0x06 2186#define V_008F1C_SQ_SEL_W 0x07 2187#define S_008F1C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) 2188#define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x07) 2189#define C_008F1C_DST_SEL_Y 0xFFFFFFC7 2190#define V_008F1C_SQ_SEL_0 0x00 2191#define V_008F1C_SQ_SEL_1 0x01 2192#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2193#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2194#define V_008F1C_SQ_SEL_X 0x04 2195#define V_008F1C_SQ_SEL_Y 0x05 2196#define V_008F1C_SQ_SEL_Z 0x06 2197#define V_008F1C_SQ_SEL_W 0x07 2198#define S_008F1C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) 2199#define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x07) 2200#define C_008F1C_DST_SEL_Z 0xFFFFFE3F 2201#define V_008F1C_SQ_SEL_0 0x00 2202#define V_008F1C_SQ_SEL_1 0x01 2203#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2204#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2205#define V_008F1C_SQ_SEL_X 0x04 2206#define V_008F1C_SQ_SEL_Y 0x05 2207#define V_008F1C_SQ_SEL_Z 0x06 2208#define V_008F1C_SQ_SEL_W 0x07 2209#define S_008F1C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) 2210#define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x07) 2211#define C_008F1C_DST_SEL_W 0xFFFFF1FF 2212#define V_008F1C_SQ_SEL_0 0x00 2213#define V_008F1C_SQ_SEL_1 0x01 2214#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2215#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2216#define V_008F1C_SQ_SEL_X 0x04 2217#define V_008F1C_SQ_SEL_Y 0x05 2218#define V_008F1C_SQ_SEL_Z 0x06 2219#define V_008F1C_SQ_SEL_W 0x07 2220#define S_008F1C_BASE_LEVEL(x) (((unsigned)(x) & 0x0F) << 12) 2221#define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0x0F) 2222#define C_008F1C_BASE_LEVEL 0xFFFF0FFF 2223#define S_008F1C_LAST_LEVEL(x) (((unsigned)(x) & 0x0F) << 16) 2224#define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0x0F) 2225#define C_008F1C_LAST_LEVEL 0xFFF0FFFF 2226#define S_008F1C_TILING_INDEX(x) (((unsigned)(x) & 0x1F) << 20) 2227#define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F) 2228#define C_008F1C_TILING_INDEX 0xFE0FFFFF 2229#define S_008F1C_POW2_PAD(x) (((unsigned)(x) & 0x1) << 25) 2230#define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1) 2231#define C_008F1C_POW2_PAD 0xFDFFFFFF 2232/* CIK */ 2233#define S_008F1C_MTYPE(x) (((unsigned)(x) & 0x1) << 26) 2234#define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1) 2235#define C_008F1C_MTYPE 0xFBFFFFFF 2236#define S_008F1C_ATC(x) (((unsigned)(x) & 0x1) << 27) 2237#define G_008F1C_ATC(x) (((x) >> 27) & 0x1) 2238#define C_008F1C_ATC 0xF7FFFFFF 2239/* */ 2240#define S_008F1C_TYPE(x) (((unsigned)(x) & 0x0F) << 28) 2241#define G_008F1C_TYPE(x) (((x) >> 28) & 0x0F) 2242#define C_008F1C_TYPE 0x0FFFFFFF 2243#define V_008F1C_SQ_RSRC_IMG_RSVD_0 0x00 2244#define V_008F1C_SQ_RSRC_IMG_RSVD_1 0x01 2245#define V_008F1C_SQ_RSRC_IMG_RSVD_2 0x02 2246#define V_008F1C_SQ_RSRC_IMG_RSVD_3 0x03 2247#define V_008F1C_SQ_RSRC_IMG_RSVD_4 0x04 2248#define V_008F1C_SQ_RSRC_IMG_RSVD_5 0x05 2249#define V_008F1C_SQ_RSRC_IMG_RSVD_6 0x06 2250#define V_008F1C_SQ_RSRC_IMG_RSVD_7 0x07 2251#define V_008F1C_SQ_RSRC_IMG_1D 0x08 2252#define V_008F1C_SQ_RSRC_IMG_2D 0x09 2253#define V_008F1C_SQ_RSRC_IMG_3D 0x0A 2254#define V_008F1C_SQ_RSRC_IMG_CUBE 0x0B 2255#define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 0x0C 2256#define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 0x0D 2257#define V_008F1C_SQ_RSRC_IMG_2D_MSAA 0x0E 2258#define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 0x0F 2259#define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20 2260#define S_008F20_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) 2261#define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF) 2262#define C_008F20_DEPTH 0xFFFFE000 2263#define S_008F20_PITCH(x) (((unsigned)(x) & 0x3FFF) << 13) 2264#define G_008F20_PITCH(x) (((x) >> 13) & 0x3FFF) 2265#define C_008F20_PITCH 0xF8001FFF 2266#define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24 2267#define S_008F24_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 0) 2268#define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF) 2269#define C_008F24_BASE_ARRAY 0xFFFFE000 2270#define S_008F24_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 13) 2271#define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF) 2272#define C_008F24_LAST_ARRAY 0xFC001FFF 2273#define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28 2274#define S_008F28_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 0) 2275#define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF) 2276#define C_008F28_MIN_LOD_WARN 0xFFFFF000 2277/* CIK */ 2278#define S_008F28_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 12) 2279#define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF) 2280#define C_008F28_COUNTER_BANK_ID 0xFFF00FFF 2281#define S_008F28_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 20) 2282#define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1) 2283#define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF 2284/* */ 2285/* VI */ 2286#define S_008F28_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) 2287#define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1) 2288#define C_008F28_COMPRESSION_EN 0xFFDFFFFF 2289#define S_008F28_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) 2290#define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) 2291#define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF 2292#define S_008F28_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) 2293#define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) 2294#define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF 2295#define S_008F28_LOST_ALPHA_BITS(x) (((unsigned)(x) & 0x0F) << 24) 2296#define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0x0F) 2297#define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF 2298#define S_008F28_LOST_COLOR_BITS(x) (((unsigned)(x) & 0x0F) << 28) 2299#define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0x0F) 2300#define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF 2301/* */ 2302#define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C 2303#define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30 2304#define S_008F30_CLAMP_X(x) (((unsigned)(x) & 0x07) << 0) 2305#define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x07) 2306#define C_008F30_CLAMP_X 0xFFFFFFF8 2307#define V_008F30_SQ_TEX_WRAP 0x00 2308#define V_008F30_SQ_TEX_MIRROR 0x01 2309#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2310#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2311#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2312#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2313#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2314#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2315#define S_008F30_CLAMP_Y(x) (((unsigned)(x) & 0x07) << 3) 2316#define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x07) 2317#define C_008F30_CLAMP_Y 0xFFFFFFC7 2318#define V_008F30_SQ_TEX_WRAP 0x00 2319#define V_008F30_SQ_TEX_MIRROR 0x01 2320#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2321#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2322#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2323#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2324#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2325#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2326#define S_008F30_CLAMP_Z(x) (((unsigned)(x) & 0x07) << 6) 2327#define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x07) 2328#define C_008F30_CLAMP_Z 0xFFFFFE3F 2329#define V_008F30_SQ_TEX_WRAP 0x00 2330#define V_008F30_SQ_TEX_MIRROR 0x01 2331#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2332#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2333#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2334#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2335#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2336#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2337#define S_008F30_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x07) << 9) 2338#define G_008F30_MAX_ANISO_RATIO(x) (((x) >> 9) & 0x07) 2339#define C_008F30_MAX_ANISO_RATIO 0xFFFFF1FF 2340#define S_008F30_DEPTH_COMPARE_FUNC(x) (((unsigned)(x) & 0x07) << 12) 2341#define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x07) 2342#define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF 2343#define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0x00 2344#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 0x01 2345#define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 0x02 2346#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x03 2347#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 0x04 2348#define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x05 2349#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x06 2350#define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x07 2351#define S_008F30_FORCE_UNNORMALIZED(x) (((unsigned)(x) & 0x1) << 15) 2352#define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1) 2353#define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF 2354#define S_008F30_ANISO_THRESHOLD(x) (((unsigned)(x) & 0x07) << 16) 2355#define G_008F30_ANISO_THRESHOLD(x) (((x) >> 16) & 0x07) 2356#define C_008F30_ANISO_THRESHOLD 0xFFF8FFFF 2357#define S_008F30_MC_COORD_TRUNC(x) (((unsigned)(x) & 0x1) << 19) 2358#define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1) 2359#define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF 2360#define S_008F30_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 20) 2361#define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1) 2362#define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF 2363#define S_008F30_ANISO_BIAS(x) (((unsigned)(x) & 0x3F) << 21) 2364#define G_008F30_ANISO_BIAS(x) (((x) >> 21) & 0x3F) 2365#define C_008F30_ANISO_BIAS 0xF81FFFFF 2366#define S_008F30_TRUNC_COORD(x) (((unsigned)(x) & 0x1) << 27) 2367#define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1) 2368#define C_008F30_TRUNC_COORD 0xF7FFFFFF 2369#define S_008F30_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 28) 2370#define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1) 2371#define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF 2372#define S_008F30_FILTER_MODE(x) (((unsigned)(x) & 0x03) << 29) 2373#define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x03) 2374#define C_008F30_FILTER_MODE 0x9FFFFFFF 2375/* VI */ 2376#define S_008F30_COMPAT_MODE(x) (((unsigned)(x) & 0x1) << 31) 2377#define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1) 2378#define C_008F30_COMPAT_MODE 0x7FFFFFFF 2379/* */ 2380#define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34 2381#define S_008F34_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) 2382#define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF) 2383#define C_008F34_MIN_LOD 0xFFFFF000 2384#define S_008F34_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) 2385#define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF) 2386#define C_008F34_MAX_LOD 0xFF000FFF 2387#define S_008F34_PERF_MIP(x) (((unsigned)(x) & 0x0F) << 24) 2388#define G_008F34_PERF_MIP(x) (((x) >> 24) & 0x0F) 2389#define C_008F34_PERF_MIP 0xF0FFFFFF 2390#define S_008F34_PERF_Z(x) (((unsigned)(x) & 0x0F) << 28) 2391#define G_008F34_PERF_Z(x) (((x) >> 28) & 0x0F) 2392#define C_008F34_PERF_Z 0x0FFFFFFF 2393#define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38 2394#define S_008F38_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) 2395#define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) 2396#define C_008F38_LOD_BIAS 0xFFFFC000 2397#define S_008F38_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) 2398#define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) 2399#define C_008F38_LOD_BIAS_SEC 0xFFF03FFF 2400#define S_008F38_XY_MAG_FILTER(x) (((unsigned)(x) & 0x03) << 20) 2401#define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x03) 2402#define C_008F38_XY_MAG_FILTER 0xFFCFFFFF 2403#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 2404#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 2405#define S_008F38_XY_MIN_FILTER(x) (((unsigned)(x) & 0x03) << 22) 2406#define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x03) 2407#define C_008F38_XY_MIN_FILTER 0xFF3FFFFF 2408#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 2409#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 2410#define V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT 0x02 2411#define V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR 0x03 2412#define S_008F38_Z_FILTER(x) (((unsigned)(x) & 0x03) << 24) 2413#define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x03) 2414#define C_008F38_Z_FILTER 0xFCFFFFFF 2415#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 2416#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 2417#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 2418#define S_008F38_MIP_FILTER(x) (((unsigned)(x) & 0x03) << 26) 2419#define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x03) 2420#define C_008F38_MIP_FILTER 0xF3FFFFFF 2421#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 2422#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 2423#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 2424#define S_008F38_MIP_POINT_PRECLAMP(x) (((unsigned)(x) & 0x1) << 28) 2425#define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1) 2426#define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF 2427#define S_008F38_DISABLE_LSB_CEIL(x) (((unsigned)(x) & 0x1) << 29) 2428#define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1) 2429#define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF 2430#define S_008F38_FILTER_PREC_FIX(x) (((unsigned)(x) & 0x1) << 30) 2431#define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1) 2432#define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF 2433#define S_008F38_ANISO_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 2434#define G_008F38_ANISO_OVERRIDE(x) (((x) >> 31) & 0x1) 2435#define C_008F38_ANISO_OVERRIDE 0x7FFFFFFF 2436#define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C 2437#define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) 2438#define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) 2439#define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 2440#define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x03) << 30) 2441#define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03) 2442#define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF 2443#define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00 2444#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x01 2445#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x02 2446#define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 0x03 2447#define R_0090DC_SPI_DYN_GPR_LOCK_EN 0x0090DC /* not on CIK */ 2448#define S_0090DC_VS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 0) 2449#define G_0090DC_VS_LOW_THRESHOLD(x) (((x) >> 0) & 0x0F) 2450#define C_0090DC_VS_LOW_THRESHOLD 0xFFFFFFF0 2451#define S_0090DC_GS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 4) 2452#define G_0090DC_GS_LOW_THRESHOLD(x) (((x) >> 4) & 0x0F) 2453#define C_0090DC_GS_LOW_THRESHOLD 0xFFFFFF0F 2454#define S_0090DC_ES_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 8) 2455#define G_0090DC_ES_LOW_THRESHOLD(x) (((x) >> 8) & 0x0F) 2456#define C_0090DC_ES_LOW_THRESHOLD 0xFFFFF0FF 2457#define S_0090DC_HS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 12) 2458#define G_0090DC_HS_LOW_THRESHOLD(x) (((x) >> 12) & 0x0F) 2459#define C_0090DC_HS_LOW_THRESHOLD 0xFFFF0FFF 2460#define S_0090DC_LS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 16) 2461#define G_0090DC_LS_LOW_THRESHOLD(x) (((x) >> 16) & 0x0F) 2462#define C_0090DC_LS_LOW_THRESHOLD 0xFFF0FFFF 2463#define R_0090E0_SPI_STATIC_THREAD_MGMT_1 0x0090E0 /* not on CIK */ 2464#define S_0090E0_PS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2465#define G_0090E0_PS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2466#define C_0090E0_PS_CU_EN 0xFFFF0000 2467#define S_0090E0_VS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 2468#define G_0090E0_VS_CU_EN(x) (((x) >> 16) & 0xFFFF) 2469#define C_0090E0_VS_CU_EN 0x0000FFFF 2470#define R_0090E4_SPI_STATIC_THREAD_MGMT_2 0x0090E4 /* not on CIK */ 2471#define S_0090E4_GS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2472#define G_0090E4_GS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2473#define C_0090E4_GS_CU_EN 0xFFFF0000 2474#define S_0090E4_ES_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 2475#define G_0090E4_ES_CU_EN(x) (((x) >> 16) & 0xFFFF) 2476#define C_0090E4_ES_CU_EN 0x0000FFFF 2477#define R_0090E8_SPI_STATIC_THREAD_MGMT_3 0x0090E8 /* not on CIK */ 2478#define S_0090E8_LSHS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2479#define G_0090E8_LSHS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2480#define C_0090E8_LSHS_CU_EN 0xFFFF0000 2481#define R_0090EC_SPI_PS_MAX_WAVE_ID 0x0090EC 2482#define S_0090EC_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 2483#define G_0090EC_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 2484#define C_0090EC_MAX_WAVE_ID 0xFFFFF000 2485/* CIK */ 2486#define R_0090E8_SPI_PS_MAX_WAVE_ID 0x0090E8 2487#define S_0090E8_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 2488#define G_0090E8_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 2489#define C_0090E8_MAX_WAVE_ID 0xFFFFF000 2490/* */ 2491#define R_0090F0_SPI_ARB_PRIORITY 0x0090F0 2492#define S_0090F0_RING_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) 2493#define G_0090F0_RING_ORDER_TS0(x) (((x) >> 0) & 0x07) 2494#define C_0090F0_RING_ORDER_TS0 0xFFFFFFF8 2495#define V_0090F0_X_R0 0x00 2496#define S_0090F0_RING_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) 2497#define G_0090F0_RING_ORDER_TS1(x) (((x) >> 3) & 0x07) 2498#define C_0090F0_RING_ORDER_TS1 0xFFFFFFC7 2499#define S_0090F0_RING_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) 2500#define G_0090F0_RING_ORDER_TS2(x) (((x) >> 6) & 0x07) 2501#define C_0090F0_RING_ORDER_TS2 0xFFFFFE3F 2502/* CIK */ 2503#define R_00C700_SPI_ARB_PRIORITY 0x00C700 2504#define S_00C700_PIPE_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) 2505#define G_00C700_PIPE_ORDER_TS0(x) (((x) >> 0) & 0x07) 2506#define C_00C700_PIPE_ORDER_TS0 0xFFFFFFF8 2507#define S_00C700_PIPE_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) 2508#define G_00C700_PIPE_ORDER_TS1(x) (((x) >> 3) & 0x07) 2509#define C_00C700_PIPE_ORDER_TS1 0xFFFFFFC7 2510#define S_00C700_PIPE_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) 2511#define G_00C700_PIPE_ORDER_TS2(x) (((x) >> 6) & 0x07) 2512#define C_00C700_PIPE_ORDER_TS2 0xFFFFFE3F 2513#define S_00C700_PIPE_ORDER_TS3(x) (((unsigned)(x) & 0x07) << 9) 2514#define G_00C700_PIPE_ORDER_TS3(x) (((x) >> 9) & 0x07) 2515#define C_00C700_PIPE_ORDER_TS3 0xFFFFF1FF 2516#define S_00C700_TS0_DUR_MULT(x) (((unsigned)(x) & 0x03) << 12) 2517#define G_00C700_TS0_DUR_MULT(x) (((x) >> 12) & 0x03) 2518#define C_00C700_TS0_DUR_MULT 0xFFFFCFFF 2519#define S_00C700_TS1_DUR_MULT(x) (((unsigned)(x) & 0x03) << 14) 2520#define G_00C700_TS1_DUR_MULT(x) (((x) >> 14) & 0x03) 2521#define C_00C700_TS1_DUR_MULT 0xFFFF3FFF 2522#define S_00C700_TS2_DUR_MULT(x) (((unsigned)(x) & 0x03) << 16) 2523#define G_00C700_TS2_DUR_MULT(x) (((x) >> 16) & 0x03) 2524#define C_00C700_TS2_DUR_MULT 0xFFFCFFFF 2525#define S_00C700_TS3_DUR_MULT(x) (((unsigned)(x) & 0x03) << 18) 2526#define G_00C700_TS3_DUR_MULT(x) (((x) >> 18) & 0x03) 2527#define C_00C700_TS3_DUR_MULT 0xFFF3FFFF 2528/* */ 2529#define R_0090F4_SPI_ARB_CYCLES_0 0x0090F4 /* moved to 0xC704 on CIK */ 2530#define S_0090F4_TS0_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) 2531#define G_0090F4_TS0_DURATION(x) (((x) >> 0) & 0xFFFF) 2532#define C_0090F4_TS0_DURATION 0xFFFF0000 2533#define S_0090F4_TS1_DURATION(x) (((unsigned)(x) & 0xFFFF) << 16) 2534#define G_0090F4_TS1_DURATION(x) (((x) >> 16) & 0xFFFF) 2535#define C_0090F4_TS1_DURATION 0x0000FFFF 2536#define R_0090F8_SPI_ARB_CYCLES_1 0x0090F8 /* moved to 0xC708 on CIK */ 2537#define S_0090F8_TS2_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) 2538#define G_0090F8_TS2_DURATION(x) (((x) >> 0) & 0xFFFF) 2539#define C_0090F8_TS2_DURATION 0xFFFF0000 2540/* CIK */ 2541#define R_008F40_SQ_FLAT_SCRATCH_WORD0 0x008F40 2542#define S_008F40_SIZE(x) (((unsigned)(x) & 0x7FFFF) << 0) 2543#define G_008F40_SIZE(x) (((x) >> 0) & 0x7FFFF) 2544#define C_008F40_SIZE 0xFFF80000 2545#define R_008F44_SQ_FLAT_SCRATCH_WORD1 0x008F44 2546#define S_008F44_OFFSET(x) (((unsigned)(x) & 0xFFFFFF) << 0) 2547#define G_008F44_OFFSET(x) (((x) >> 0) & 0xFFFFFF) 2548#define C_008F44_OFFSET 0xFF000000 2549/* */ 2550#define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8 2551#define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC 2552#define S_030FFC_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2553#define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2554#define C_030FFC_COUNT_HI 0x80000000 2555#define R_009100_SPI_CONFIG_CNTL 0x009100 2556#define S_009100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) 2557#define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) 2558#define C_009100_GPR_WRITE_PRIORITY 0xFFE00000 2559#define S_009100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x07) << 21) 2560#define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x07) 2561#define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF 2562#define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) 2563#define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) 2564#define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF 2565#define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) 2566#define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) 2567#define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF 2568#define S_009100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) 2569#define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) 2570#define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF 2571#define R_00913C_SPI_CONFIG_CNTL_1 0x00913C 2572#define S_00913C_VTX_DONE_DELAY(x) (((unsigned)(x) & 0x0F) << 0) 2573#define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0x0F) 2574#define C_00913C_VTX_DONE_DELAY 0xFFFFFFF0 2575#define V_00913C_X_DELAY_14_CLKS 0x00 2576#define V_00913C_X_DELAY_16_CLKS 0x01 2577#define V_00913C_X_DELAY_18_CLKS 0x02 2578#define V_00913C_X_DELAY_20_CLKS 0x03 2579#define V_00913C_X_DELAY_22_CLKS 0x04 2580#define V_00913C_X_DELAY_24_CLKS 0x05 2581#define V_00913C_X_DELAY_26_CLKS 0x06 2582#define V_00913C_X_DELAY_28_CLKS 0x07 2583#define V_00913C_X_DELAY_30_CLKS 0x08 2584#define V_00913C_X_DELAY_32_CLKS 0x09 2585#define V_00913C_X_DELAY_34_CLKS 0x0A 2586#define V_00913C_X_DELAY_4_CLKS 0x0B 2587#define V_00913C_X_DELAY_6_CLKS 0x0C 2588#define V_00913C_X_DELAY_8_CLKS 0x0D 2589#define V_00913C_X_DELAY_10_CLKS 0x0E 2590#define V_00913C_X_DELAY_12_CLKS 0x0F 2591#define S_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((unsigned)(x) & 0x1) << 4) 2592#define G_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1) 2593#define C_00913C_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF 2594#define S_00913C_PC_LIMIT_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 2595#define G_00913C_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1) 2596#define C_00913C_PC_LIMIT_ENABLE 0xFFFFFFBF 2597#define S_00913C_PC_LIMIT_STRICT(x) (((unsigned)(x) & 0x1) << 7) 2598#define G_00913C_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1) 2599#define C_00913C_PC_LIMIT_STRICT 0xFFFFFF7F 2600#define S_00913C_PC_LIMIT_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 2601#define G_00913C_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF) 2602#define C_00913C_PC_LIMIT_SIZE 0x0000FFFF 2603#define R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0 0x00936C 2604#define S_00936C_TYPE_A(x) (((unsigned)(x) & 0x0F) << 0) 2605#define G_00936C_TYPE_A(x) (((x) >> 0) & 0x0F) 2606#define C_00936C_TYPE_A 0xFFFFFFF0 2607#define S_00936C_VGPR_A(x) (((unsigned)(x) & 0x07) << 4) 2608#define G_00936C_VGPR_A(x) (((x) >> 4) & 0x07) 2609#define C_00936C_VGPR_A 0xFFFFFF8F 2610#define S_00936C_SGPR_A(x) (((unsigned)(x) & 0x07) << 7) 2611#define G_00936C_SGPR_A(x) (((x) >> 7) & 0x07) 2612#define C_00936C_SGPR_A 0xFFFFFC7F 2613#define S_00936C_LDS_A(x) (((unsigned)(x) & 0x07) << 10) 2614#define G_00936C_LDS_A(x) (((x) >> 10) & 0x07) 2615#define C_00936C_LDS_A 0xFFFFE3FF 2616#define S_00936C_WAVES_A(x) (((unsigned)(x) & 0x03) << 13) 2617#define G_00936C_WAVES_A(x) (((x) >> 13) & 0x03) 2618#define C_00936C_WAVES_A 0xFFFF9FFF 2619#define S_00936C_EN_A(x) (((unsigned)(x) & 0x1) << 15) 2620#define G_00936C_EN_A(x) (((x) >> 15) & 0x1) 2621#define C_00936C_EN_A 0xFFFF7FFF 2622#define S_00936C_TYPE_B(x) (((unsigned)(x) & 0x0F) << 16) 2623#define G_00936C_TYPE_B(x) (((x) >> 16) & 0x0F) 2624#define C_00936C_TYPE_B 0xFFF0FFFF 2625#define S_00936C_VGPR_B(x) (((unsigned)(x) & 0x07) << 20) 2626#define G_00936C_VGPR_B(x) (((x) >> 20) & 0x07) 2627#define C_00936C_VGPR_B 0xFF8FFFFF 2628#define S_00936C_SGPR_B(x) (((unsigned)(x) & 0x07) << 23) 2629#define G_00936C_SGPR_B(x) (((x) >> 23) & 0x07) 2630#define C_00936C_SGPR_B 0xFC7FFFFF 2631#define S_00936C_LDS_B(x) (((unsigned)(x) & 0x07) << 26) 2632#define G_00936C_LDS_B(x) (((x) >> 26) & 0x07) 2633#define C_00936C_LDS_B 0xE3FFFFFF 2634#define S_00936C_WAVES_B(x) (((unsigned)(x) & 0x03) << 29) 2635#define G_00936C_WAVES_B(x) (((x) >> 29) & 0x03) 2636#define C_00936C_WAVES_B 0x9FFFFFFF 2637#define S_00936C_EN_B(x) (((unsigned)(x) & 0x1) << 31) 2638#define G_00936C_EN_B(x) (((x) >> 31) & 0x1) 2639#define C_00936C_EN_B 0x7FFFFFFF 2640#define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C 2641#define R_009858_DB_SUBTILE_CONTROL 0x009858 2642#define S_009858_MSAA1_X(x) (((unsigned)(x) & 0x03) << 0) 2643#define G_009858_MSAA1_X(x) (((x) >> 0) & 0x03) 2644#define C_009858_MSAA1_X 0xFFFFFFFC 2645#define S_009858_MSAA1_Y(x) (((unsigned)(x) & 0x03) << 2) 2646#define G_009858_MSAA1_Y(x) (((x) >> 2) & 0x03) 2647#define C_009858_MSAA1_Y 0xFFFFFFF3 2648#define S_009858_MSAA2_X(x) (((unsigned)(x) & 0x03) << 4) 2649#define G_009858_MSAA2_X(x) (((x) >> 4) & 0x03) 2650#define C_009858_MSAA2_X 0xFFFFFFCF 2651#define S_009858_MSAA2_Y(x) (((unsigned)(x) & 0x03) << 6) 2652#define G_009858_MSAA2_Y(x) (((x) >> 6) & 0x03) 2653#define C_009858_MSAA2_Y 0xFFFFFF3F 2654#define S_009858_MSAA4_X(x) (((unsigned)(x) & 0x03) << 8) 2655#define G_009858_MSAA4_X(x) (((x) >> 8) & 0x03) 2656#define C_009858_MSAA4_X 0xFFFFFCFF 2657#define S_009858_MSAA4_Y(x) (((unsigned)(x) & 0x03) << 10) 2658#define G_009858_MSAA4_Y(x) (((x) >> 10) & 0x03) 2659#define C_009858_MSAA4_Y 0xFFFFF3FF 2660#define S_009858_MSAA8_X(x) (((unsigned)(x) & 0x03) << 12) 2661#define G_009858_MSAA8_X(x) (((x) >> 12) & 0x03) 2662#define C_009858_MSAA8_X 0xFFFFCFFF 2663#define S_009858_MSAA8_Y(x) (((unsigned)(x) & 0x03) << 14) 2664#define G_009858_MSAA8_Y(x) (((x) >> 14) & 0x03) 2665#define C_009858_MSAA8_Y 0xFFFF3FFF 2666#define S_009858_MSAA16_X(x) (((unsigned)(x) & 0x03) << 16) 2667#define G_009858_MSAA16_X(x) (((x) >> 16) & 0x03) 2668#define C_009858_MSAA16_X 0xFFFCFFFF 2669#define S_009858_MSAA16_Y(x) (((unsigned)(x) & 0x03) << 18) 2670#define G_009858_MSAA16_Y(x) (((x) >> 18) & 0x03) 2671#define C_009858_MSAA16_Y 0xFFF3FFFF 2672#define R_0098F8_GB_ADDR_CONFIG 0x0098F8 2673#define S_0098F8_NUM_PIPES(x) (((unsigned)(x) & 0x07) << 0) 2674#define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x07) 2675#define C_0098F8_NUM_PIPES 0xFFFFFFF8 2676#define S_0098F8_PIPE_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 4) 2677#define G_0098F8_PIPE_INTERLEAVE_SIZE(x) (((x) >> 4) & 0x07) 2678#define C_0098F8_PIPE_INTERLEAVE_SIZE 0xFFFFFF8F 2679#define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 8) 2680#define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x07) 2681#define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF 2682#define S_0098F8_NUM_SHADER_ENGINES(x) (((unsigned)(x) & 0x03) << 12) 2683#define G_0098F8_NUM_SHADER_ENGINES(x) (((x) >> 12) & 0x03) 2684#define C_0098F8_NUM_SHADER_ENGINES 0xFFFFCFFF 2685#define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((unsigned)(x) & 0x07) << 16) 2686#define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x07) 2687#define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF 2688#define S_0098F8_NUM_GPUS(x) (((unsigned)(x) & 0x07) << 20) 2689#define G_0098F8_NUM_GPUS(x) (((x) >> 20) & 0x07) 2690#define C_0098F8_NUM_GPUS 0xFF8FFFFF 2691#define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((unsigned)(x) & 0x03) << 24) 2692#define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x03) 2693#define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF 2694#define S_0098F8_ROW_SIZE(x) (((unsigned)(x) & 0x03) << 28) 2695#define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x03) 2696#define C_0098F8_ROW_SIZE 0xCFFFFFFF 2697#define S_0098F8_NUM_LOWER_PIPES(x) (((unsigned)(x) & 0x1) << 30) 2698#define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1) 2699#define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF 2700#define R_009910_GB_TILE_MODE0 0x009910 2701#define S_009910_MICRO_TILE_MODE(x) (((unsigned)(x) & 0x03) << 0) 2702#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) 2703#define C_009910_MICRO_TILE_MODE 0xFFFFFFFC 2704#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 2705#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 2706#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 2707#define V_009910_ADDR_SURF_THICK_MICRO_TILING 0x03 2708#define S_009910_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 2) 2709#define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0x0F) 2710#define C_009910_ARRAY_MODE 0xFFFFFFC3 2711#define V_009910_ARRAY_LINEAR_GENERAL 0x00 2712#define V_009910_ARRAY_LINEAR_ALIGNED 0x01 2713#define V_009910_ARRAY_1D_TILED_THIN1 0x02 2714#define V_009910_ARRAY_1D_TILED_THICK 0x03 2715#define V_009910_ARRAY_2D_TILED_THIN1 0x04 2716#define V_009910_ARRAY_2D_TILED_THICK 0x07 2717#define V_009910_ARRAY_2D_TILED_XTHICK 0x08 2718#define V_009910_ARRAY_3D_TILED_THIN1 0x0C 2719#define V_009910_ARRAY_3D_TILED_THICK 0x0D 2720#define V_009910_ARRAY_3D_TILED_XTHICK 0x0E 2721#define V_009910_ARRAY_POWER_SAVE 0x0F 2722#define S_009910_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 6) 2723#define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F) 2724#define C_009910_PIPE_CONFIG 0xFFFFF83F 2725#define V_009910_ADDR_SURF_P2 0x00 2726#define V_009910_ADDR_SURF_P2_RESERVED0 0x01 2727#define V_009910_ADDR_SURF_P2_RESERVED1 0x02 2728#define V_009910_ADDR_SURF_P2_RESERVED2 0x03 2729#define V_009910_X_ADDR_SURF_P4_8X16 0x04 2730#define V_009910_X_ADDR_SURF_P4_16X16 0x05 2731#define V_009910_X_ADDR_SURF_P4_16X32 0x06 2732#define V_009910_X_ADDR_SURF_P4_32X32 0x07 2733#define V_009910_X_ADDR_SURF_P8_16X16_8X16 0x08 2734#define V_009910_X_ADDR_SURF_P8_16X32_8X16 0x09 2735#define V_009910_X_ADDR_SURF_P8_32X32_8X16 0x0A 2736#define V_009910_X_ADDR_SURF_P8_16X32_16X16 0x0B 2737#define V_009910_X_ADDR_SURF_P8_32X32_16X16 0x0C 2738#define V_009910_X_ADDR_SURF_P8_32X32_16X32 0x0D 2739#define V_009910_X_ADDR_SURF_P8_32X64_32X32 0x0E 2740#define S_009910_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 11) 2741#define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x07) 2742#define C_009910_TILE_SPLIT 0xFFFFC7FF 2743#define V_009910_ADDR_SURF_TILE_SPLIT_64B 0x00 2744#define V_009910_ADDR_SURF_TILE_SPLIT_128B 0x01 2745#define V_009910_ADDR_SURF_TILE_SPLIT_256B 0x02 2746#define V_009910_ADDR_SURF_TILE_SPLIT_512B 0x03 2747#define V_009910_ADDR_SURF_TILE_SPLIT_1KB 0x04 2748#define V_009910_ADDR_SURF_TILE_SPLIT_2KB 0x05 2749#define V_009910_ADDR_SURF_TILE_SPLIT_4KB 0x06 2750#define S_009910_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 14) 2751#define G_009910_BANK_WIDTH(x) (((x) >> 14) & 0x03) 2752#define C_009910_BANK_WIDTH 0xFFFF3FFF 2753#define V_009910_ADDR_SURF_BANK_WIDTH_1 0x00 2754#define V_009910_ADDR_SURF_BANK_WIDTH_2 0x01 2755#define V_009910_ADDR_SURF_BANK_WIDTH_4 0x02 2756#define V_009910_ADDR_SURF_BANK_WIDTH_8 0x03 2757#define S_009910_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 16) 2758#define G_009910_BANK_HEIGHT(x) (((x) >> 16) & 0x03) 2759#define C_009910_BANK_HEIGHT 0xFFFCFFFF 2760#define V_009910_ADDR_SURF_BANK_HEIGHT_1 0x00 2761#define V_009910_ADDR_SURF_BANK_HEIGHT_2 0x01 2762#define V_009910_ADDR_SURF_BANK_HEIGHT_4 0x02 2763#define V_009910_ADDR_SURF_BANK_HEIGHT_8 0x03 2764#define S_009910_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 18) 2765#define G_009910_MACRO_TILE_ASPECT(x) (((x) >> 18) & 0x03) 2766#define C_009910_MACRO_TILE_ASPECT 0xFFF3FFFF 2767#define V_009910_ADDR_SURF_MACRO_ASPECT_1 0x00 2768#define V_009910_ADDR_SURF_MACRO_ASPECT_2 0x01 2769#define V_009910_ADDR_SURF_MACRO_ASPECT_4 0x02 2770#define V_009910_ADDR_SURF_MACRO_ASPECT_8 0x03 2771#define S_009910_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 20) 2772#define G_009910_NUM_BANKS(x) (((x) >> 20) & 0x03) 2773#define C_009910_NUM_BANKS 0xFFCFFFFF 2774#define V_009910_ADDR_SURF_2_BANK 0x00 2775#define V_009910_ADDR_SURF_4_BANK 0x01 2776#define V_009910_ADDR_SURF_8_BANK 0x02 2777#define V_009910_ADDR_SURF_16_BANK 0x03 2778#define S_009910_MICRO_TILE_MODE_NEW(x) (((unsigned)(x) & 0x07) << 22) 2779#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) 2780#define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF 2781#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 2782#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 2783#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 2784#define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 0x03 2785#define S_009910_SAMPLE_SPLIT(x) (((unsigned)(x) & 0x03) << 25) 2786#define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x03) 2787#define C_009910_SAMPLE_SPLIT 0xF9FFFFFF 2788#define R_009914_GB_TILE_MODE1 0x009914 2789#define R_009918_GB_TILE_MODE2 0x009918 2790#define R_00991C_GB_TILE_MODE3 0x00991C 2791#define R_009920_GB_TILE_MODE4 0x009920 2792#define R_009924_GB_TILE_MODE5 0x009924 2793#define R_009928_GB_TILE_MODE6 0x009928 2794#define R_00992C_GB_TILE_MODE7 0x00992C 2795#define R_009930_GB_TILE_MODE8 0x009930 2796#define R_009934_GB_TILE_MODE9 0x009934 2797#define R_009938_GB_TILE_MODE10 0x009938 2798#define R_00993C_GB_TILE_MODE11 0x00993C 2799#define R_009940_GB_TILE_MODE12 0x009940 2800#define R_009944_GB_TILE_MODE13 0x009944 2801#define R_009948_GB_TILE_MODE14 0x009948 2802#define R_00994C_GB_TILE_MODE15 0x00994C 2803#define R_009950_GB_TILE_MODE16 0x009950 2804#define R_009954_GB_TILE_MODE17 0x009954 2805#define R_009958_GB_TILE_MODE18 0x009958 2806#define R_00995C_GB_TILE_MODE19 0x00995C 2807#define R_009960_GB_TILE_MODE20 0x009960 2808#define R_009964_GB_TILE_MODE21 0x009964 2809#define R_009968_GB_TILE_MODE22 0x009968 2810#define R_00996C_GB_TILE_MODE23 0x00996C 2811#define R_009970_GB_TILE_MODE24 0x009970 2812#define R_009974_GB_TILE_MODE25 0x009974 2813#define R_009978_GB_TILE_MODE26 0x009978 2814#define R_00997C_GB_TILE_MODE27 0x00997C 2815#define R_009980_GB_TILE_MODE28 0x009980 2816#define R_009984_GB_TILE_MODE29 0x009984 2817#define R_009988_GB_TILE_MODE30 0x009988 2818#define R_00998C_GB_TILE_MODE31 0x00998C 2819/* CIK */ 2820#define R_009990_GB_MACROTILE_MODE0 0x009990 2821#define S_009990_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 0) 2822#define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x03) 2823#define C_009990_BANK_WIDTH 0xFFFFFFFC 2824#define S_009990_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 2) 2825#define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x03) 2826#define C_009990_BANK_HEIGHT 0xFFFFFFF3 2827#define S_009990_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 4) 2828#define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x03) 2829#define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF 2830#define S_009990_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 6) 2831#define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x03) 2832#define C_009990_NUM_BANKS 0xFFFFFF3F 2833#define R_009994_GB_MACROTILE_MODE1 0x009994 2834#define R_009998_GB_MACROTILE_MODE2 0x009998 2835#define R_00999C_GB_MACROTILE_MODE3 0x00999C 2836#define R_0099A0_GB_MACROTILE_MODE4 0x0099A0 2837#define R_0099A4_GB_MACROTILE_MODE5 0x0099A4 2838#define R_0099A8_GB_MACROTILE_MODE6 0x0099A8 2839#define R_0099AC_GB_MACROTILE_MODE7 0x0099AC 2840#define R_0099B0_GB_MACROTILE_MODE8 0x0099B0 2841#define R_0099B4_GB_MACROTILE_MODE9 0x0099B4 2842#define R_0099B8_GB_MACROTILE_MODE10 0x0099B8 2843#define R_0099BC_GB_MACROTILE_MODE11 0x0099BC 2844#define R_0099C0_GB_MACROTILE_MODE12 0x0099C0 2845#define R_0099C4_GB_MACROTILE_MODE13 0x0099C4 2846#define R_0099C8_GB_MACROTILE_MODE14 0x0099C8 2847#define R_0099CC_GB_MACROTILE_MODE15 0x0099CC 2848/* */ 2849#define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000 2850#define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004 2851#define S_00B004_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2852#define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF) 2853#define C_00B004_MEM_BASE 0xFFFFFF00 2854#define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008 2855#define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C 2856#define S_00B00C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2857#define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF) 2858#define C_00B00C_MEM_BASE 0xFFFFFF00 2859/* CIK */ 2860#define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C 2861#define S_00B01C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2862#define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF) 2863#define C_00B01C_CU_EN 0xFFFF0000 2864#define S_00B01C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 2865#define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 2866#define C_00B01C_WAVE_LIMIT 0xFFC0FFFF 2867#define S_00B01C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 2868#define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 2869#define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 2870/* */ 2871#define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020 2872#define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024 2873#define S_00B024_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2874#define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF) 2875#define C_00B024_MEM_BASE 0xFFFFFF00 2876#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 2877#define S_00B028_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 2878#define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F) 2879#define C_00B028_VGPRS 0xFFFFFFC0 2880#define S_00B028_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 2881#define G_00B028_SGPRS(x) (((x) >> 6) & 0x0F) 2882#define C_00B028_SGPRS 0xFFFFFC3F 2883#define S_00B028_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 2884#define G_00B028_PRIORITY(x) (((x) >> 10) & 0x03) 2885#define C_00B028_PRIORITY 0xFFFFF3FF 2886#define S_00B028_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 2887#define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 2888#define C_00B028_FLOAT_MODE 0xFFF00FFF 2889#define V_00B028_FP_32_DENORMS 0x30 2890#define V_00B028_FP_64_DENORMS 0xc0 2891#define V_00B028_FP_ALL_DENORMS 0xf0 2892#define S_00B028_PRIV(x) (((unsigned)(x) & 0x1) << 20) 2893#define G_00B028_PRIV(x) (((x) >> 20) & 0x1) 2894#define C_00B028_PRIV 0xFFEFFFFF 2895#define S_00B028_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 2896#define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1) 2897#define C_00B028_DX10_CLAMP 0xFFDFFFFF 2898#define S_00B028_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 2899#define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1) 2900#define C_00B028_DEBUG_MODE 0xFFBFFFFF 2901#define S_00B028_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 2902#define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1) 2903#define C_00B028_IEEE_MODE 0xFF7FFFFF 2904#define S_00B028_CU_GROUP_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 2905#define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1) 2906#define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF 2907/* CIK */ 2908#define S_00B028_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) 2909#define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x07) 2910#define C_00B028_CACHE_CTL 0xF1FFFFFF 2911#define S_00B028_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) 2912#define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1) 2913#define C_00B028_CDBG_USER 0xEFFFFFFF 2914/* */ 2915#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C 2916#define S_00B02C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 2917#define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 2918#define C_00B02C_SCRATCH_EN 0xFFFFFFFE 2919#define S_00B02C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 2920#define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F) 2921#define C_00B02C_USER_SGPR 0xFFFFFFC1 2922#define S_00B02C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 2923#define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 2924#define C_00B02C_TRAP_PRESENT 0xFFFFFFBF 2925#define S_00B02C_WAVE_CNT_EN(x) (((unsigned)(x) & 0x1) << 7) 2926#define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1) 2927#define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F 2928#define S_00B02C_EXTRA_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 2929#define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF) 2930#define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF 2931#define S_00B02C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ 2932#define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ 2933#define C_00B02C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ 2934#define S_00B02C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 16) 2935#define G_00B02C_EXCP_EN_CIK(x) (((x) >> 16) & 0x1FF) 2936#define C_00B02C_EXCP_EN_CIK 0xFE00FFFF 2937#define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030 2938#define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034 2939#define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038 2940#define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C 2941#define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040 2942#define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044 2943#define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048 2944#define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C 2945#define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050 2946#define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054 2947#define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058 2948#define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C 2949#define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060 2950#define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064 2951#define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068 2952#define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C 2953#define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100 2954#define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104 2955#define S_00B104_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2956#define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF) 2957#define C_00B104_MEM_BASE 0xFFFFFF00 2958#define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108 2959#define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C 2960#define S_00B10C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2961#define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF) 2962#define C_00B10C_MEM_BASE 0xFFFFFF00 2963/* CIK */ 2964#define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118 2965#define S_00B118_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2966#define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF) 2967#define C_00B118_CU_EN 0xFFFF0000 2968#define S_00B118_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 2969#define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 2970#define C_00B118_WAVE_LIMIT 0xFFC0FFFF 2971#define S_00B118_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 2972#define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 2973#define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF 2974#define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C 2975#define S_00B11C_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 2976#define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F) 2977#define C_00B11C_LIMIT 0xFFFFFFC0 2978/* */ 2979#define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120 2980#define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124 2981#define S_00B124_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2982#define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF) 2983#define C_00B124_MEM_BASE 0xFFFFFF00 2984#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 2985#define S_00B128_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 2986#define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F) 2987#define C_00B128_VGPRS 0xFFFFFFC0 2988#define S_00B128_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 2989#define G_00B128_SGPRS(x) (((x) >> 6) & 0x0F) 2990#define C_00B128_SGPRS 0xFFFFFC3F 2991#define S_00B128_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 2992#define G_00B128_PRIORITY(x) (((x) >> 10) & 0x03) 2993#define C_00B128_PRIORITY 0xFFFFF3FF 2994#define S_00B128_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 2995#define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 2996#define C_00B128_FLOAT_MODE 0xFFF00FFF 2997#define S_00B128_PRIV(x) (((unsigned)(x) & 0x1) << 20) 2998#define G_00B128_PRIV(x) (((x) >> 20) & 0x1) 2999#define C_00B128_PRIV 0xFFEFFFFF 3000#define S_00B128_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3001#define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3002#define C_00B128_DX10_CLAMP 0xFFDFFFFF 3003#define S_00B128_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3004#define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3005#define C_00B128_DEBUG_MODE 0xFFBFFFFF 3006#define S_00B128_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3007#define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1) 3008#define C_00B128_IEEE_MODE 0xFF7FFFFF 3009#define S_00B128_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3010#define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3011#define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF 3012#define S_00B128_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3013#define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 3014#define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF 3015/* CIK */ 3016#define S_00B128_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) 3017#define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x07) 3018#define C_00B128_CACHE_CTL 0xC7FFFFFF 3019#define S_00B128_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) 3020#define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1) 3021#define C_00B128_CDBG_USER 0xBFFFFFFF 3022/* */ 3023#define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C 3024#define S_00B12C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3025#define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3026#define C_00B12C_SCRATCH_EN 0xFFFFFFFE 3027#define S_00B12C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3028#define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3029#define C_00B12C_USER_SGPR 0xFFFFFFC1 3030#define S_00B12C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3031#define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3032#define C_00B12C_TRAP_PRESENT 0xFFFFFFBF 3033#define S_00B12C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3034#define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3035#define C_00B12C_OC_LDS_EN 0xFFFFFF7F 3036#define S_00B12C_SO_BASE0_EN(x) (((unsigned)(x) & 0x1) << 8) 3037#define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1) 3038#define C_00B12C_SO_BASE0_EN 0xFFFFFEFF 3039#define S_00B12C_SO_BASE1_EN(x) (((unsigned)(x) & 0x1) << 9) 3040#define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1) 3041#define C_00B12C_SO_BASE1_EN 0xFFFFFDFF 3042#define S_00B12C_SO_BASE2_EN(x) (((unsigned)(x) & 0x1) << 10) 3043#define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1) 3044#define C_00B12C_SO_BASE2_EN 0xFFFFFBFF 3045#define S_00B12C_SO_BASE3_EN(x) (((unsigned)(x) & 0x1) << 11) 3046#define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1) 3047#define C_00B12C_SO_BASE3_EN 0xFFFFF7FF 3048#define S_00B12C_SO_EN(x) (((unsigned)(x) & 0x1) << 12) 3049#define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1) 3050#define C_00B12C_SO_EN 0xFFFFEFFF 3051#define S_00B12C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 13) /* mask is 0x1FF on CIK */ 3052#define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x7F) /* mask is 0x1FF on CIK */ 3053#define C_00B12C_EXCP_EN 0xFFF01FFF /* mask is 0x1FF on CIK */ 3054#define S_00B12C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 13) 3055#define G_00B12C_EXCP_EN_CIK(x) (((x) >> 13) & 0x1FF) 3056#define C_00B12C_EXCP_EN_CIK 0xFFC01FFF 3057/* VI */ 3058#define S_00B12C_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 24) 3059#define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1) 3060#define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF 3061/* */ 3062#define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130 3063#define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134 3064#define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138 3065#define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C 3066#define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140 3067#define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144 3068#define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148 3069#define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C 3070#define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150 3071#define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154 3072#define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158 3073#define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C 3074#define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160 3075#define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164 3076#define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168 3077#define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C 3078#define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200 3079#define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204 3080#define S_00B204_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3081#define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF) 3082#define C_00B204_MEM_BASE 0xFFFFFF00 3083#define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208 3084#define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C 3085#define S_00B20C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3086#define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3087#define C_00B20C_MEM_BASE 0xFFFFFF00 3088/* CIK */ 3089#define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C 3090#define S_00B21C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3091#define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3092#define C_00B21C_CU_EN 0xFFFF0000 3093#define S_00B21C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3094#define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3095#define C_00B21C_WAVE_LIMIT 0xFFC0FFFF 3096#define S_00B21C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3097#define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3098#define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3099/* */ 3100/* VI */ 3101#define S_00B21C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3102#define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3103#define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF 3104/* */ 3105#define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220 3106#define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224 3107#define S_00B224_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3108#define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF) 3109#define C_00B224_MEM_BASE 0xFFFFFF00 3110#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 3111#define S_00B228_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3112#define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F) 3113#define C_00B228_VGPRS 0xFFFFFFC0 3114#define S_00B228_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3115#define G_00B228_SGPRS(x) (((x) >> 6) & 0x0F) 3116#define C_00B228_SGPRS 0xFFFFFC3F 3117#define S_00B228_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3118#define G_00B228_PRIORITY(x) (((x) >> 10) & 0x03) 3119#define C_00B228_PRIORITY 0xFFFFF3FF 3120#define S_00B228_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3121#define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3122#define C_00B228_FLOAT_MODE 0xFFF00FFF 3123#define S_00B228_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3124#define G_00B228_PRIV(x) (((x) >> 20) & 0x1) 3125#define C_00B228_PRIV 0xFFEFFFFF 3126#define S_00B228_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3127#define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3128#define C_00B228_DX10_CLAMP 0xFFDFFFFF 3129#define S_00B228_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3130#define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3131#define C_00B228_DEBUG_MODE 0xFFBFFFFF 3132#define S_00B228_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3133#define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1) 3134#define C_00B228_IEEE_MODE 0xFF7FFFFF 3135#define S_00B228_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 3136#define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1) 3137#define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF 3138/* CIK */ 3139#define S_00B228_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) 3140#define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x07) 3141#define C_00B228_CACHE_CTL 0xF1FFFFFF 3142#define S_00B228_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) 3143#define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1) 3144#define C_00B228_CDBG_USER 0xEFFFFFFF 3145/* */ 3146#define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C 3147#define S_00B22C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3148#define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3149#define C_00B22C_SCRATCH_EN 0xFFFFFFFE 3150#define S_00B22C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3151#define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3152#define C_00B22C_USER_SGPR 0xFFFFFFC1 3153#define S_00B22C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3154#define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3155#define C_00B22C_TRAP_PRESENT 0xFFFFFFBF 3156#define S_00B22C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 7) /* mask is 0x1FF on CIK */ 3157#define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x7F) /* mask is 0x1FF on CIK */ 3158#define C_00B22C_EXCP_EN 0xFFFFC07F /* mask is 0x1FF on CIK */ 3159#define S_00B22C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 7) 3160#define G_00B22C_EXCP_EN_CIK(x) (((x) >> 7) & 0x1FF) 3161#define C_00B22C_EXCP_EN_CIK 0xFFFF007F 3162#define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230 3163#define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234 3164#define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238 3165#define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C 3166#define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240 3167#define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244 3168#define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248 3169#define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C 3170#define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250 3171#define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254 3172#define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258 3173#define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C 3174#define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260 3175#define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264 3176#define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268 3177#define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C 3178#define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300 3179#define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304 3180#define S_00B304_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3181#define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF) 3182#define C_00B304_MEM_BASE 0xFFFFFF00 3183#define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308 3184#define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C 3185#define S_00B30C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3186#define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3187#define C_00B30C_MEM_BASE 0xFFFFFF00 3188/* CIK */ 3189#define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C 3190#define S_00B31C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3191#define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3192#define C_00B31C_CU_EN 0xFFFF0000 3193#define S_00B31C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3194#define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3195#define C_00B31C_WAVE_LIMIT 0xFFC0FFFF 3196#define S_00B31C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3197#define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3198#define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3199/* */ 3200/* VI */ 3201#define S_00B31C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3202#define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3203#define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF 3204/* */ 3205#define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320 3206#define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324 3207#define S_00B324_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3208#define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF) 3209#define C_00B324_MEM_BASE 0xFFFFFF00 3210#define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328 3211#define S_00B328_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3212#define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F) 3213#define C_00B328_VGPRS 0xFFFFFFC0 3214#define S_00B328_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3215#define G_00B328_SGPRS(x) (((x) >> 6) & 0x0F) 3216#define C_00B328_SGPRS 0xFFFFFC3F 3217#define S_00B328_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3218#define G_00B328_PRIORITY(x) (((x) >> 10) & 0x03) 3219#define C_00B328_PRIORITY 0xFFFFF3FF 3220#define S_00B328_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3221#define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3222#define C_00B328_FLOAT_MODE 0xFFF00FFF 3223#define S_00B328_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3224#define G_00B328_PRIV(x) (((x) >> 20) & 0x1) 3225#define C_00B328_PRIV 0xFFEFFFFF 3226#define S_00B328_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3227#define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3228#define C_00B328_DX10_CLAMP 0xFFDFFFFF 3229#define S_00B328_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3230#define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3231#define C_00B328_DEBUG_MODE 0xFFBFFFFF 3232#define S_00B328_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3233#define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1) 3234#define C_00B328_IEEE_MODE 0xFF7FFFFF 3235#define S_00B328_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3236#define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3237#define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF 3238#define S_00B328_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3239#define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 3240#define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF 3241/* CIK */ 3242#define S_00B328_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) 3243#define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x07) 3244#define C_00B328_CACHE_CTL 0xC7FFFFFF 3245#define S_00B328_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) 3246#define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1) 3247#define C_00B328_CDBG_USER 0xBFFFFFFF 3248/* */ 3249#define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C 3250#define S_00B32C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3251#define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3252#define C_00B32C_SCRATCH_EN 0xFFFFFFFE 3253#define S_00B32C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3254#define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3255#define C_00B32C_USER_SGPR 0xFFFFFFC1 3256#define S_00B32C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3257#define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3258#define C_00B32C_TRAP_PRESENT 0xFFFFFFBF 3259#define S_00B32C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3260#define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3261#define C_00B32C_OC_LDS_EN 0xFFFFFF7F 3262#define S_00B32C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 8) /* mask is 0x1FF on CIK */ 3263#define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x7F) /* mask is 0x1FF on CIK */ 3264#define C_00B32C_EXCP_EN 0xFFFF80FF /* mask is 0x1FF on CIK */ 3265#define S_00B32C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) /* CIK, for on-chip GS */ 3266#define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */ 3267#define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */ 3268#define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330 3269#define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334 3270#define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338 3271#define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C 3272#define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340 3273#define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344 3274#define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348 3275#define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C 3276#define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350 3277#define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354 3278#define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358 3279#define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C 3280#define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360 3281#define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364 3282#define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368 3283#define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C 3284#define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400 3285#define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404 3286#define S_00B404_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3287#define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF) 3288#define C_00B404_MEM_BASE 0xFFFFFF00 3289#define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408 3290#define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C 3291#define S_00B40C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3292#define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3293#define C_00B40C_MEM_BASE 0xFFFFFF00 3294/* CIK */ 3295#define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C 3296#define S_00B41C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 3297#define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F) 3298#define C_00B41C_WAVE_LIMIT 0xFFFFFFC0 3299#define S_00B41C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 6) 3300#define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0x0F) 3301#define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F 3302/* */ 3303/* VI */ 3304#define S_00B41C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 10) 3305#define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F) 3306#define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF 3307/* */ 3308#define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420 3309#define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424 3310#define S_00B424_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3311#define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF) 3312#define C_00B424_MEM_BASE 0xFFFFFF00 3313#define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428 3314#define S_00B428_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3315#define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F) 3316#define C_00B428_VGPRS 0xFFFFFFC0 3317#define S_00B428_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3318#define G_00B428_SGPRS(x) (((x) >> 6) & 0x0F) 3319#define C_00B428_SGPRS 0xFFFFFC3F 3320#define S_00B428_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3321#define G_00B428_PRIORITY(x) (((x) >> 10) & 0x03) 3322#define C_00B428_PRIORITY 0xFFFFF3FF 3323#define S_00B428_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3324#define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3325#define C_00B428_FLOAT_MODE 0xFFF00FFF 3326#define S_00B428_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3327#define G_00B428_PRIV(x) (((x) >> 20) & 0x1) 3328#define C_00B428_PRIV 0xFFEFFFFF 3329#define S_00B428_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3330#define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3331#define C_00B428_DX10_CLAMP 0xFFDFFFFF 3332#define S_00B428_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3333#define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3334#define C_00B428_DEBUG_MODE 0xFFBFFFFF 3335#define S_00B428_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3336#define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1) 3337#define C_00B428_IEEE_MODE 0xFF7FFFFF 3338/* CIK */ 3339#define S_00B428_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 24) 3340#define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x07) 3341#define C_00B428_CACHE_CTL 0xF8FFFFFF 3342#define S_00B428_CDBG_USER(x) (((unsigned)(x) & 0x1) << 27) 3343#define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1) 3344#define C_00B428_CDBG_USER 0xF7FFFFFF 3345/* */ 3346#define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C 3347#define S_00B42C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3348#define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3349#define C_00B42C_SCRATCH_EN 0xFFFFFFFE 3350#define S_00B42C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3351#define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3352#define C_00B42C_USER_SGPR 0xFFFFFFC1 3353#define S_00B42C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3354#define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3355#define C_00B42C_TRAP_PRESENT 0xFFFFFFBF 3356#define S_00B42C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3357#define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3358#define C_00B42C_OC_LDS_EN 0xFFFFFF7F 3359#define S_00B42C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 8) 3360#define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1) 3361#define C_00B42C_TG_SIZE_EN 0xFFFFFEFF 3362#define S_00B42C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 9) /* mask is 0x1FF on CIK */ 3363#define G_00B42C_EXCP_EN(x) (((x) >> 9) & 0x7F) /* mask is 0x1FF on CIK */ 3364#define C_00B42C_EXCP_EN 0xFFFF01FF /* mask is 0x1FF on CIK */ 3365#define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430 3366#define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434 3367#define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438 3368#define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C 3369#define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440 3370#define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444 3371#define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448 3372#define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C 3373#define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450 3374#define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454 3375#define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458 3376#define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C 3377#define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460 3378#define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464 3379#define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468 3380#define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C 3381#define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500 3382#define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504 3383#define S_00B504_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3384#define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF) 3385#define C_00B504_MEM_BASE 0xFFFFFF00 3386#define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508 3387#define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C 3388#define S_00B50C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3389#define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3390#define C_00B50C_MEM_BASE 0xFFFFFF00 3391/* CIK */ 3392#define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C 3393#define S_00B51C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3394#define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3395#define C_00B51C_CU_EN 0xFFFF0000 3396#define S_00B51C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3397#define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3398#define C_00B51C_WAVE_LIMIT 0xFFC0FFFF 3399#define S_00B51C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3400#define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3401#define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3402/* */ 3403/* VI */ 3404#define S_00B51C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3405#define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3406#define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF 3407/* */ 3408#define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520 3409#define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524 3410#define S_00B524_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3411#define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF) 3412#define C_00B524_MEM_BASE 0xFFFFFF00 3413#define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528 3414#define S_00B528_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3415#define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F) 3416#define C_00B528_VGPRS 0xFFFFFFC0 3417#define S_00B528_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3418#define G_00B528_SGPRS(x) (((x) >> 6) & 0x0F) 3419#define C_00B528_SGPRS 0xFFFFFC3F 3420#define S_00B528_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3421#define G_00B528_PRIORITY(x) (((x) >> 10) & 0x03) 3422#define C_00B528_PRIORITY 0xFFFFF3FF 3423#define S_00B528_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3424#define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3425#define C_00B528_FLOAT_MODE 0xFFF00FFF 3426#define S_00B528_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3427#define G_00B528_PRIV(x) (((x) >> 20) & 0x1) 3428#define C_00B528_PRIV 0xFFEFFFFF 3429#define S_00B528_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3430#define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3431#define C_00B528_DX10_CLAMP 0xFFDFFFFF 3432#define S_00B528_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3433#define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3434#define C_00B528_DEBUG_MODE 0xFFBFFFFF 3435#define S_00B528_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3436#define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1) 3437#define C_00B528_IEEE_MODE 0xFF7FFFFF 3438#define S_00B528_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3439#define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3440#define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF 3441/* CIK */ 3442#define S_00B528_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 26) 3443#define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x07) 3444#define C_00B528_CACHE_CTL 0xE3FFFFFF 3445#define S_00B528_CDBG_USER(x) (((unsigned)(x) & 0x1) << 29) 3446#define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1) 3447#define C_00B528_CDBG_USER 0xDFFFFFFF 3448/* */ 3449#define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C 3450#define S_00B52C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3451#define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3452#define C_00B52C_SCRATCH_EN 0xFFFFFFFE 3453#define S_00B52C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3454#define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3455#define C_00B52C_USER_SGPR 0xFFFFFFC1 3456#define S_00B52C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3457#define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3458#define C_00B52C_TRAP_PRESENT 0xFFFFFFBF 3459#define S_00B52C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 3460#define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 3461#define C_00B52C_LDS_SIZE 0xFFFF007F 3462#define S_00B52C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ 3463#define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ 3464#define C_00B52C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ 3465#define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530 3466#define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534 3467#define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538 3468#define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C 3469#define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540 3470#define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544 3471#define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548 3472#define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C 3473#define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550 3474#define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554 3475#define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558 3476#define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C 3477#define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560 3478#define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564 3479#define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568 3480#define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C 3481#define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800 3482#define S_00B800_COMPUTE_SHADER_EN(x) (((unsigned)(x) & 0x1) << 0) 3483#define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1) 3484#define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE 3485#define S_00B800_PARTIAL_TG_EN(x) (((unsigned)(x) & 0x1) << 1) 3486#define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1) 3487#define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD 3488#define S_00B800_FORCE_START_AT_000(x) (((unsigned)(x) & 0x1) << 2) 3489#define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1) 3490#define C_00B800_FORCE_START_AT_000 0xFFFFFFFB 3491#define S_00B800_ORDERED_APPEND_ENBL(x) (((unsigned)(x) & 0x1) << 3) 3492#define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1) 3493#define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7 3494/* CIK */ 3495#define S_00B800_ORDERED_APPEND_MODE(x) (((unsigned)(x) & 0x1) << 4) 3496#define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1) 3497#define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF 3498#define S_00B800_USE_THREAD_DIMENSIONS(x) (((unsigned)(x) & 0x1) << 5) 3499#define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1) 3500#define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF 3501#define S_00B800_ORDER_MODE(x) (((unsigned)(x) & 0x1) << 6) 3502#define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1) 3503#define C_00B800_ORDER_MODE 0xFFFFFFBF 3504#define S_00B800_DISPATCH_CACHE_CNTL(x) (((unsigned)(x) & 0x07) << 7) 3505#define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x07) 3506#define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F 3507#define S_00B800_SCALAR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 10) 3508#define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1) 3509#define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF 3510#define S_00B800_VECTOR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 11) 3511#define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1) 3512#define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF 3513#define S_00B800_DATA_ATC(x) (((unsigned)(x) & 0x1) << 12) 3514#define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1) 3515#define C_00B800_DATA_ATC 0xFFFFEFFF 3516#define S_00B800_RESTORE(x) (((unsigned)(x) & 0x1) << 14) 3517#define G_00B800_RESTORE(x) (((x) >> 14) & 0x1) 3518#define C_00B800_RESTORE 0xFFFFBFFF 3519/* */ 3520#define R_00B804_COMPUTE_DIM_X 0x00B804 3521#define R_00B808_COMPUTE_DIM_Y 0x00B808 3522#define R_00B80C_COMPUTE_DIM_Z 0x00B80C 3523#define R_00B810_COMPUTE_START_X 0x00B810 3524#define R_00B814_COMPUTE_START_Y 0x00B814 3525#define R_00B818_COMPUTE_START_Z 0x00B818 3526#define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C 3527#define S_00B81C_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3528#define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3529#define C_00B81C_NUM_THREAD_FULL 0xFFFF0000 3530#define S_00B81C_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3531#define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3532#define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF 3533#define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820 3534#define S_00B820_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3535#define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3536#define C_00B820_NUM_THREAD_FULL 0xFFFF0000 3537#define S_00B820_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3538#define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3539#define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF 3540#define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824 3541#define S_00B824_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3542#define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3543#define C_00B824_NUM_THREAD_FULL 0xFFFF0000 3544#define S_00B824_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3545#define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3546#define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF 3547#define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* moved to 0xCD20 on CIK */ 3548#define S_00B82C_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 3549#define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 3550#define C_00B82C_MAX_WAVE_ID 0xFFFFF000 3551/* CIK */ 3552#define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828 3553#define S_00B828_PIPELINESTAT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 3554#define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1) 3555#define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE 3556#define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C 3557#define S_00B82C_PERFCOUNT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 3558#define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1) 3559#define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE 3560/* */ 3561#define R_00B830_COMPUTE_PGM_LO 0x00B830 3562#define R_00B834_COMPUTE_PGM_HI 0x00B834 3563#define S_00B834_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3564#define G_00B834_DATA(x) (((x) >> 0) & 0xFF) 3565#define C_00B834_DATA 0xFFFFFF00 3566/* CIK */ 3567#define S_00B834_INST_ATC(x) (((unsigned)(x) & 0x1) << 8) 3568#define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1) 3569#define C_00B834_INST_ATC 0xFFFFFEFF 3570/* */ 3571#define R_00B838_COMPUTE_TBA_LO 0x00B838 3572#define R_00B83C_COMPUTE_TBA_HI 0x00B83C 3573#define S_00B83C_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3574#define G_00B83C_DATA(x) (((x) >> 0) & 0xFF) 3575#define C_00B83C_DATA 0xFFFFFF00 3576#define R_00B840_COMPUTE_TMA_LO 0x00B840 3577#define R_00B844_COMPUTE_TMA_HI 0x00B844 3578#define S_00B844_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3579#define G_00B844_DATA(x) (((x) >> 0) & 0xFF) 3580#define C_00B844_DATA 0xFFFFFF00 3581#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 3582#define S_00B848_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3583#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) 3584#define C_00B848_VGPRS 0xFFFFFFC0 3585#define S_00B848_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3586#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) 3587#define C_00B848_SGPRS 0xFFFFFC3F 3588#define S_00B848_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3589#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) 3590#define C_00B848_PRIORITY 0xFFFFF3FF 3591#define S_00B848_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3592#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3593#define C_00B848_FLOAT_MODE 0xFFF00FFF 3594#define S_00B848_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3595#define G_00B848_PRIV(x) (((x) >> 20) & 0x1) 3596#define C_00B848_PRIV 0xFFEFFFFF 3597#define S_00B848_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3598#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3599#define C_00B848_DX10_CLAMP 0xFFDFFFFF 3600#define S_00B848_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3601#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3602#define C_00B848_DEBUG_MODE 0xFFBFFFFF 3603#define S_00B848_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3604#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) 3605#define C_00B848_IEEE_MODE 0xFF7FFFFF 3606/* CIK */ 3607#define S_00B848_BULKY(x) (((unsigned)(x) & 0x1) << 24) 3608#define G_00B848_BULKY(x) (((x) >> 24) & 0x1) 3609#define C_00B848_BULKY 0xFEFFFFFF 3610#define S_00B848_CDBG_USER(x) (((unsigned)(x) & 0x1) << 25) 3611#define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1) 3612#define C_00B848_CDBG_USER 0xFDFFFFFF 3613/* */ 3614#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C 3615#define S_00B84C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3616#define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3617#define C_00B84C_SCRATCH_EN 0xFFFFFFFE 3618#define S_00B84C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3619#define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3620#define C_00B84C_USER_SGPR 0xFFFFFFC1 3621#define S_00B84C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3622#define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3623#define C_00B84C_TRAP_PRESENT 0xFFFFFFBF 3624#define S_00B84C_TGID_X_EN(x) (((unsigned)(x) & 0x1) << 7) 3625#define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) 3626#define C_00B84C_TGID_X_EN 0xFFFFFF7F 3627#define S_00B84C_TGID_Y_EN(x) (((unsigned)(x) & 0x1) << 8) 3628#define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) 3629#define C_00B84C_TGID_Y_EN 0xFFFFFEFF 3630#define S_00B84C_TGID_Z_EN(x) (((unsigned)(x) & 0x1) << 9) 3631#define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) 3632#define C_00B84C_TGID_Z_EN 0xFFFFFDFF 3633#define S_00B84C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 10) 3634#define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) 3635#define C_00B84C_TG_SIZE_EN 0xFFFFFBFF 3636#define S_00B84C_TIDIG_COMP_CNT(x) (((unsigned)(x) & 0x03) << 11) 3637#define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03) 3638#define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF 3639/* CIK */ 3640#define S_00B84C_EXCP_EN_MSB(x) (((unsigned)(x) & 0x03) << 13) 3641#define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03) 3642#define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF 3643/* */ 3644#define S_00B84C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 15) 3645#define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) 3646#define C_00B84C_LDS_SIZE 0xFF007FFF 3647#define S_00B84C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 24) 3648#define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) 3649#define C_00B84C_EXCP_EN 0x80FFFFFF 3650#define R_00B850_COMPUTE_VMID 0x00B850 3651#define S_00B850_DATA(x) (((unsigned)(x) & 0x0F) << 0) 3652#define G_00B850_DATA(x) (((x) >> 0) & 0x0F) 3653#define C_00B850_DATA 0xFFFFFFF0 3654#define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854 3655#define S_00B854_WAVES_PER_SH(x) (((unsigned)(x) & 0x3F) << 0) /* mask is 0x3FF on CIK */ 3656#define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3F) /* mask is 0x3FF on CIK */ 3657#define C_00B854_WAVES_PER_SH 0xFFFFFFC0 /* mask is 0x3FF on CIK */ 3658#define S_00B854_WAVES_PER_SH_CIK(x) (((unsigned)(x) & 0x3FF) << 0) 3659#define G_00B854_WAVES_PER_SH_CIK(x) (((x) >> 0) & 0x3FF) 3660#define C_00B854_WAVES_PER_SH_CIK 0xFFFFFC00 3661#define S_00B854_TG_PER_CU(x) (((unsigned)(x) & 0x0F) << 12) 3662#define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0x0F) 3663#define C_00B854_TG_PER_CU 0xFFFF0FFF 3664#define S_00B854_LOCK_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 16) 3665#define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F) 3666#define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF 3667#define S_00B854_SIMD_DEST_CNTL(x) (((unsigned)(x) & 0x1) << 22) 3668#define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1) 3669#define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF 3670/* CIK */ 3671#define S_00B854_FORCE_SIMD_DIST(x) (((unsigned)(x) & 0x1) << 23) 3672#define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1) 3673#define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF 3674#define S_00B854_CU_GROUP_COUNT(x) (((unsigned)(x) & 0x07) << 24) 3675#define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x07) 3676#define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF 3677/* */ 3678#define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858 3679#define S_00B858_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3680#define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3681#define C_00B858_SH0_CU_EN 0xFFFF0000 3682#define S_00B858_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3683#define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3684#define C_00B858_SH1_CU_EN 0x0000FFFF 3685#define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C 3686#define S_00B85C_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3687#define G_00B85C_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3688#define C_00B85C_SH0_CU_EN 0xFFFF0000 3689#define S_00B85C_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3690#define G_00B85C_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3691#define C_00B85C_SH1_CU_EN 0x0000FFFF 3692#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 3693#define S_00B860_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 3694#define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF) 3695#define C_00B860_WAVES 0xFFFFF000 3696#define S_00B860_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 3697#define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 3698#define C_00B860_WAVESIZE 0xFE000FFF 3699/* CIK */ 3700#define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864 3701#define S_00B864_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3702#define G_00B864_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3703#define C_00B864_SH0_CU_EN 0xFFFF0000 3704#define S_00B864_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3705#define G_00B864_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3706#define C_00B864_SH1_CU_EN 0x0000FFFF 3707#define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868 3708#define S_00B868_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3709#define G_00B868_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3710#define C_00B868_SH0_CU_EN 0xFFFF0000 3711#define S_00B868_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3712#define G_00B868_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3713#define C_00B868_SH1_CU_EN 0x0000FFFF 3714#define R_00B86C_COMPUTE_RESTART_X 0x00B86C 3715#define R_00B870_COMPUTE_RESTART_Y 0x00B870 3716#define R_00B874_COMPUTE_RESTART_Z 0x00B874 3717#define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C 3718#define S_00B87C_SEND_SEID(x) (((unsigned)(x) & 0x03) << 0) 3719#define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x03) 3720#define C_00B87C_SEND_SEID 0xFFFFFFFC 3721#define S_00B87C_RESERVED2(x) (((unsigned)(x) & 0x1) << 2) 3722#define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1) 3723#define C_00B87C_RESERVED2 0xFFFFFFFB 3724#define S_00B87C_RESERVED3(x) (((unsigned)(x) & 0x1) << 3) 3725#define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1) 3726#define C_00B87C_RESERVED3 0xFFFFFFF7 3727#define S_00B87C_RESERVED4(x) (((unsigned)(x) & 0x1) << 4) 3728#define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1) 3729#define C_00B87C_RESERVED4 0xFFFFFFEF 3730/* VI */ 3731#define S_00B87C_WAVE_ID_BASE(x) (((unsigned)(x) & 0xFFF) << 5) 3732#define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF) 3733#define C_00B87C_WAVE_ID_BASE 0xFFFE001F 3734#define R_00B880_COMPUTE_DISPATCH_ID 0x00B880 3735#define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884 3736#define R_00B888_COMPUTE_RELAUNCH 0x00B888 3737#define S_00B888_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 3738#define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) 3739#define C_00B888_PAYLOAD 0xC0000000 3740#define S_00B888_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) 3741#define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1) 3742#define C_00B888_IS_EVENT 0xBFFFFFFF 3743#define S_00B888_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) 3744#define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1) 3745#define C_00B888_IS_STATE 0x7FFFFFFF 3746#define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C 3747#define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890 3748#define S_00B890_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 3749#define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF) 3750#define C_00B890_ADDR 0xFFFF0000 3751#define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894 3752#define S_00B894_ATC(x) (((unsigned)(x) & 0x1) << 0) 3753#define G_00B894_ATC(x) (((x) >> 0) & 0x1) 3754#define C_00B894_ATC 0xFFFFFFFE 3755#define S_00B894_MTYPE(x) (((unsigned)(x) & 0x03) << 1) 3756#define G_00B894_MTYPE(x) (((x) >> 1) & 0x03) 3757#define C_00B894_MTYPE 0xFFFFFFF9 3758/* */ 3759/* */ 3760#define R_00B900_COMPUTE_USER_DATA_0 0x00B900 3761#define R_00B904_COMPUTE_USER_DATA_1 0x00B904 3762#define R_00B908_COMPUTE_USER_DATA_2 0x00B908 3763#define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C 3764#define R_00B910_COMPUTE_USER_DATA_4 0x00B910 3765#define R_00B914_COMPUTE_USER_DATA_5 0x00B914 3766#define R_00B918_COMPUTE_USER_DATA_6 0x00B918 3767#define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C 3768#define R_00B920_COMPUTE_USER_DATA_8 0x00B920 3769#define R_00B924_COMPUTE_USER_DATA_9 0x00B924 3770#define R_00B928_COMPUTE_USER_DATA_10 0x00B928 3771#define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C 3772#define R_00B930_COMPUTE_USER_DATA_12 0x00B930 3773#define R_00B934_COMPUTE_USER_DATA_13 0x00B934 3774#define R_00B938_COMPUTE_USER_DATA_14 0x00B938 3775#define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C 3776#define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC 3777#define R_034000_CPG_PERFCOUNTER1_LO 0x034000 3778#define R_034004_CPG_PERFCOUNTER1_HI 0x034004 3779#define R_034008_CPG_PERFCOUNTER0_LO 0x034008 3780#define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C 3781#define R_034010_CPC_PERFCOUNTER1_LO 0x034010 3782#define R_034014_CPC_PERFCOUNTER1_HI 0x034014 3783#define R_034018_CPC_PERFCOUNTER0_LO 0x034018 3784#define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C 3785#define R_034020_CPF_PERFCOUNTER1_LO 0x034020 3786#define R_034024_CPF_PERFCOUNTER1_HI 0x034024 3787#define R_034028_CPF_PERFCOUNTER0_LO 0x034028 3788#define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C 3789#define R_034100_GRBM_PERFCOUNTER0_LO 0x034100 3790#define R_034104_GRBM_PERFCOUNTER0_HI 0x034104 3791#define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C 3792#define R_034110_GRBM_PERFCOUNTER1_HI 0x034110 3793#define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114 3794#define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118 3795#define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C 3796#define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120 3797#define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124 3798#define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128 3799#define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C 3800#define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130 3801#define R_034200_WD_PERFCOUNTER0_LO 0x034200 3802#define R_034204_WD_PERFCOUNTER0_HI 0x034204 3803#define R_034208_WD_PERFCOUNTER1_LO 0x034208 3804#define R_03420C_WD_PERFCOUNTER1_HI 0x03420C 3805#define R_034210_WD_PERFCOUNTER2_LO 0x034210 3806#define R_034214_WD_PERFCOUNTER2_HI 0x034214 3807#define R_034218_WD_PERFCOUNTER3_LO 0x034218 3808#define R_03421C_WD_PERFCOUNTER3_HI 0x03421C 3809#define R_034220_IA_PERFCOUNTER0_LO 0x034220 3810#define R_034224_IA_PERFCOUNTER0_HI 0x034224 3811#define R_034228_IA_PERFCOUNTER1_LO 0x034228 3812#define R_03422C_IA_PERFCOUNTER1_HI 0x03422C 3813#define R_034230_IA_PERFCOUNTER2_LO 0x034230 3814#define R_034234_IA_PERFCOUNTER2_HI 0x034234 3815#define R_034238_IA_PERFCOUNTER3_LO 0x034238 3816#define R_03423C_IA_PERFCOUNTER3_HI 0x03423C 3817#define R_034240_VGT_PERFCOUNTER0_LO 0x034240 3818#define R_034244_VGT_PERFCOUNTER0_HI 0x034244 3819#define R_034248_VGT_PERFCOUNTER1_LO 0x034248 3820#define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C 3821#define R_034250_VGT_PERFCOUNTER2_LO 0x034250 3822#define R_034254_VGT_PERFCOUNTER2_HI 0x034254 3823#define R_034258_VGT_PERFCOUNTER3_LO 0x034258 3824#define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C 3825#define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400 3826#define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404 3827#define S_034404_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 3828#define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) 3829#define C_034404_PERFCOUNTER_HI 0xFFFF0000 3830#define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408 3831#define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C 3832#define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410 3833#define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414 3834#define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418 3835#define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C 3836#define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500 3837#define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504 3838#define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508 3839#define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C 3840#define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510 3841#define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514 3842#define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518 3843#define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C 3844#define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520 3845#define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524 3846#define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528 3847#define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C 3848#define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530 3849#define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534 3850#define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538 3851#define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C 3852#define R_034600_SPI_PERFCOUNTER0_HI 0x034600 3853#define R_034604_SPI_PERFCOUNTER0_LO 0x034604 3854#define R_034608_SPI_PERFCOUNTER1_HI 0x034608 3855#define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C 3856#define R_034610_SPI_PERFCOUNTER2_HI 0x034610 3857#define R_034614_SPI_PERFCOUNTER2_LO 0x034614 3858#define R_034618_SPI_PERFCOUNTER3_HI 0x034618 3859#define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C 3860#define R_034620_SPI_PERFCOUNTER4_HI 0x034620 3861#define R_034624_SPI_PERFCOUNTER4_LO 0x034624 3862#define R_034628_SPI_PERFCOUNTER5_HI 0x034628 3863#define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C 3864#define R_034700_SQ_PERFCOUNTER0_LO 0x034700 3865#define R_034704_SQ_PERFCOUNTER0_HI 0x034704 3866#define R_034708_SQ_PERFCOUNTER1_LO 0x034708 3867#define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C 3868#define R_034710_SQ_PERFCOUNTER2_LO 0x034710 3869#define R_034714_SQ_PERFCOUNTER2_HI 0x034714 3870#define R_034718_SQ_PERFCOUNTER3_LO 0x034718 3871#define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C 3872#define R_034720_SQ_PERFCOUNTER4_LO 0x034720 3873#define R_034724_SQ_PERFCOUNTER4_HI 0x034724 3874#define R_034728_SQ_PERFCOUNTER5_LO 0x034728 3875#define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C 3876#define R_034730_SQ_PERFCOUNTER6_LO 0x034730 3877#define R_034734_SQ_PERFCOUNTER6_HI 0x034734 3878#define R_034738_SQ_PERFCOUNTER7_LO 0x034738 3879#define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C 3880#define R_034740_SQ_PERFCOUNTER8_LO 0x034740 3881#define R_034744_SQ_PERFCOUNTER8_HI 0x034744 3882#define R_034748_SQ_PERFCOUNTER9_LO 0x034748 3883#define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C 3884#define R_034750_SQ_PERFCOUNTER10_LO 0x034750 3885#define R_034754_SQ_PERFCOUNTER10_HI 0x034754 3886#define R_034758_SQ_PERFCOUNTER11_LO 0x034758 3887#define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C 3888#define R_034760_SQ_PERFCOUNTER12_LO 0x034760 3889#define R_034764_SQ_PERFCOUNTER12_HI 0x034764 3890#define R_034768_SQ_PERFCOUNTER13_LO 0x034768 3891#define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C 3892#define R_034770_SQ_PERFCOUNTER14_LO 0x034770 3893#define R_034774_SQ_PERFCOUNTER14_HI 0x034774 3894#define R_034778_SQ_PERFCOUNTER15_LO 0x034778 3895#define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C 3896#define R_034900_SX_PERFCOUNTER0_LO 0x034900 3897#define R_034904_SX_PERFCOUNTER0_HI 0x034904 3898#define R_034908_SX_PERFCOUNTER1_LO 0x034908 3899#define R_03490C_SX_PERFCOUNTER1_HI 0x03490C 3900#define R_034910_SX_PERFCOUNTER2_LO 0x034910 3901#define R_034914_SX_PERFCOUNTER2_HI 0x034914 3902#define R_034918_SX_PERFCOUNTER3_LO 0x034918 3903#define R_03491C_SX_PERFCOUNTER3_HI 0x03491C 3904#define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00 3905#define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04 3906#define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08 3907#define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C 3908#define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10 3909#define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14 3910#define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18 3911#define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C 3912#define R_034B00_TA_PERFCOUNTER0_LO 0x034B00 3913#define R_034B04_TA_PERFCOUNTER0_HI 0x034B04 3914#define R_034B08_TA_PERFCOUNTER1_LO 0x034B08 3915#define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C 3916#define R_034C00_TD_PERFCOUNTER0_LO 0x034C00 3917#define R_034C04_TD_PERFCOUNTER0_HI 0x034C04 3918#define R_034C08_TD_PERFCOUNTER1_LO 0x034C08 3919#define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C 3920#define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00 3921#define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04 3922#define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08 3923#define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C 3924#define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10 3925#define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14 3926#define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18 3927#define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C 3928#define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00 3929#define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04 3930#define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08 3931#define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C 3932#define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10 3933#define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14 3934#define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18 3935#define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C 3936#define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40 3937#define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44 3938#define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48 3939#define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C 3940#define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50 3941#define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54 3942#define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58 3943#define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C 3944#define R_035018_CB_PERFCOUNTER0_LO 0x035018 3945#define R_03501C_CB_PERFCOUNTER0_HI 0x03501C 3946#define R_035020_CB_PERFCOUNTER1_LO 0x035020 3947#define R_035024_CB_PERFCOUNTER1_HI 0x035024 3948#define R_035028_CB_PERFCOUNTER2_LO 0x035028 3949#define R_03502C_CB_PERFCOUNTER2_HI 0x03502C 3950#define R_035030_CB_PERFCOUNTER3_LO 0x035030 3951#define R_035034_CB_PERFCOUNTER3_HI 0x035034 3952#define R_035100_DB_PERFCOUNTER0_LO 0x035100 3953#define R_035104_DB_PERFCOUNTER0_HI 0x035104 3954#define R_035108_DB_PERFCOUNTER1_LO 0x035108 3955#define R_03510C_DB_PERFCOUNTER1_HI 0x03510C 3956#define R_035110_DB_PERFCOUNTER2_LO 0x035110 3957#define R_035114_DB_PERFCOUNTER2_HI 0x035114 3958#define R_035118_DB_PERFCOUNTER3_LO 0x035118 3959#define R_03511C_DB_PERFCOUNTER3_HI 0x03511C 3960#define R_035200_RLC_PERFCOUNTER0_LO 0x035200 3961#define R_035204_RLC_PERFCOUNTER0_HI 0x035204 3962#define R_035208_RLC_PERFCOUNTER1_LO 0x035208 3963#define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C 3964#define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000 3965#define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004 3966#define S_036004_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 3967#define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3F) 3968#define C_036004_PERF_SEL2 0xFFFFFFC0 3969#define S_036004_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 3970#define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3F) 3971#define C_036004_PERF_SEL3 0xFFFF03FF 3972#define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008 3973#define S_036008_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 3974#define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F) 3975#define C_036008_PERF_SEL 0xFFFFFFC0 3976#define S_036008_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 3977#define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F) 3978#define C_036008_PERF_SEL1 0xFFFF03FF 3979#define S_036008_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 3980#define G_036008_CNTR_MODE(x) (((x) >> 20) & 0x0F) 3981#define C_036008_CNTR_MODE 0xFF0FFFFF 3982#define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C 3983#define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010 3984#define S_036010_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 3985#define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3F) 3986#define C_036010_PERF_SEL2 0xFFFFFFC0 3987#define S_036010_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 3988#define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3F) 3989#define C_036010_PERF_SEL3 0xFFFF03FF 3990#define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014 3991#define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018 3992#define S_036018_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 3993#define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3F) 3994#define C_036018_PERF_SEL2 0xFFFFFFC0 3995#define S_036018_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 3996#define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3F) 3997#define C_036018_PERF_SEL3 0xFFFF03FF 3998#define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C 3999#define S_03601C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4000#define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F) 4001#define C_03601C_PERF_SEL 0xFFFFFFC0 4002#define S_03601C_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 4003#define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F) 4004#define C_03601C_PERF_SEL1 0xFFFF03FF 4005#define S_03601C_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4006#define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4007#define C_03601C_CNTR_MODE 0xFF0FFFFF 4008#define R_036020_CP_PERFMON_CNTL 0x036020 4009#define S_036020_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 0) 4010#define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0x0F) 4011#define C_036020_PERFMON_STATE 0xFFFFFFF0 4012#define V_036020_DISABLE_AND_RESET 0x00 4013#define V_036020_START_COUNTING 0x01 4014#define V_036020_STOP_COUNTING 0x02 4015#define S_036020_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 4) 4016#define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0x0F) 4017#define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F 4018#define S_036020_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x03) << 8) 4019#define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x03) 4020#define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF 4021#define S_036020_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 4022#define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) 4023#define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF 4024#define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024 4025#define S_036024_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4026#define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F) 4027#define C_036024_PERF_SEL 0xFFFFFFC0 4028#define S_036024_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 4029#define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F) 4030#define C_036024_PERF_SEL1 0xFFFF03FF 4031#define S_036024_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4032#define G_036024_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4033#define C_036024_CNTR_MODE 0xFF0FFFFF 4034#define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100 4035#define S_036100_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4036#define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F) 4037#define C_036100_PERF_SEL 0xFFFFFFC0 4038#define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4039#define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4040#define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4041#define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4042#define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4043#define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4044#define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4045#define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4046#define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4047#define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4048#define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4049#define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4050#define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) 4051#define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) 4052#define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF 4053#define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4054#define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4055#define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4056#define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4057#define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4058#define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4059#define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4060#define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4061#define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4062#define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4063#define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4064#define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4065#define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4066#define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4067#define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4068#define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4069#define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4070#define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4071#define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) 4072#define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) 4073#define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF 4074#define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) 4075#define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) 4076#define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF 4077#define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) 4078#define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) 4079#define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF 4080#define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) 4081#define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) 4082#define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF 4083#define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) 4084#define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) 4085#define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF 4086#define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) 4087#define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) 4088#define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF 4089#define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) 4090#define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) 4091#define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF 4092#define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104 4093#define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108 4094#define S_036108_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4095#define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F) 4096#define C_036108_PERF_SEL 0xFFFFFFC0 4097#define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4098#define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4099#define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4100#define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4101#define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4102#define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4103#define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4104#define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4105#define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4106#define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4107#define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4108#define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4109#define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4110#define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4111#define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4112#define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4113#define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4114#define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4115#define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4116#define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4117#define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4118#define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4119#define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4120#define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4121#define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4122#define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4123#define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4124#define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4125#define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4126#define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4127#define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4128#define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4129#define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4130#define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C 4131#define S_03610C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4132#define G_03610C_PERF_SEL(x) (((x) >> 0) & 0x3F) 4133#define C_03610C_PERF_SEL 0xFFFFFFC0 4134#define S_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4135#define G_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4136#define C_03610C_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4137#define S_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4138#define G_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4139#define C_03610C_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4140#define S_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4141#define G_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4142#define C_03610C_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4143#define S_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4144#define G_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4145#define C_03610C_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4146#define S_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4147#define G_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4148#define C_03610C_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4149#define S_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4150#define G_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4151#define C_03610C_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4152#define S_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4153#define G_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4154#define C_03610C_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4155#define S_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4156#define G_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4157#define C_03610C_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4158#define S_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4159#define G_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4160#define C_03610C_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4161#define S_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4162#define G_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4163#define C_03610C_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4164#define S_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4165#define G_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4166#define C_03610C_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4167#define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110 4168#define S_036110_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4169#define G_036110_PERF_SEL(x) (((x) >> 0) & 0x3F) 4170#define C_036110_PERF_SEL 0xFFFFFFC0 4171#define S_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4172#define G_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4173#define C_036110_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4174#define S_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4175#define G_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4176#define C_036110_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4177#define S_036110_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4178#define G_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4179#define C_036110_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4180#define S_036110_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4181#define G_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4182#define C_036110_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4183#define S_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4184#define G_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4185#define C_036110_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4186#define S_036110_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4187#define G_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4188#define C_036110_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4189#define S_036110_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4190#define G_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4191#define C_036110_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4192#define S_036110_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4193#define G_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4194#define C_036110_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4195#define S_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4196#define G_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4197#define C_036110_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4198#define S_036110_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4199#define G_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4200#define C_036110_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4201#define S_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4202#define G_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4203#define C_036110_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4204#define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114 4205#define S_036114_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4206#define G_036114_PERF_SEL(x) (((x) >> 0) & 0x3F) 4207#define C_036114_PERF_SEL 0xFFFFFFC0 4208#define S_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4209#define G_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4210#define C_036114_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4211#define S_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4212#define G_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4213#define C_036114_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4214#define S_036114_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4215#define G_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4216#define C_036114_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4217#define S_036114_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4218#define G_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4219#define C_036114_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4220#define S_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4221#define G_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4222#define C_036114_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4223#define S_036114_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4224#define G_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4225#define C_036114_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4226#define S_036114_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4227#define G_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4228#define C_036114_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4229#define S_036114_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4230#define G_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4231#define C_036114_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4232#define S_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4233#define G_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4234#define C_036114_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4235#define S_036114_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4236#define G_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4237#define C_036114_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4238#define S_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4239#define G_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4240#define C_036114_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4241#define R_036200_WD_PERFCOUNTER0_SELECT 0x036200 4242#define S_036200_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4243#define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF) 4244#define C_036200_PERF_SEL 0xFFFFFF00 4245#define S_036200_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4246#define G_036200_PERF_MODE(x) (((x) >> 28) & 0x0F) 4247#define C_036200_PERF_MODE 0x0FFFFFFF 4248#define R_036204_WD_PERFCOUNTER1_SELECT 0x036204 4249#define R_036208_WD_PERFCOUNTER2_SELECT 0x036208 4250#define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C 4251#define R_036210_IA_PERFCOUNTER0_SELECT 0x036210 4252#define S_036210_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4253#define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4254#define C_036210_PERF_SEL 0xFFFFFC00 4255#define S_036210_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4256#define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4257#define C_036210_PERF_SEL1 0xFFF003FF 4258#define S_036210_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4259#define G_036210_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4260#define C_036210_CNTR_MODE 0xFF0FFFFF 4261#define S_036210_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4262#define G_036210_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4263#define C_036210_PERF_MODE1 0xF0FFFFFF 4264#define S_036210_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4265#define G_036210_PERF_MODE(x) (((x) >> 28) & 0x0F) 4266#define C_036210_PERF_MODE 0x0FFFFFFF 4267#define R_036214_IA_PERFCOUNTER1_SELECT 0x036214 4268#define R_036218_IA_PERFCOUNTER2_SELECT 0x036218 4269#define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C 4270#define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220 4271#define S_036220_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4272#define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4273#define C_036220_PERF_SEL2 0xFFFFFC00 4274#define S_036220_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4275#define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4276#define C_036220_PERF_SEL3 0xFFF003FF 4277#define S_036220_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4278#define G_036220_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4279#define C_036220_PERF_MODE3 0xF0FFFFFF 4280#define S_036220_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4281#define G_036220_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4282#define C_036220_PERF_MODE2 0x0FFFFFFF 4283#define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230 4284#define S_036230_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4285#define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4286#define C_036230_PERF_SEL 0xFFFFFC00 4287#define S_036230_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4288#define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4289#define C_036230_PERF_SEL1 0xFFF003FF 4290#define S_036230_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4291#define G_036230_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4292#define C_036230_CNTR_MODE 0xFF0FFFFF 4293#define S_036230_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4294#define G_036230_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4295#define C_036230_PERF_MODE1 0xF0FFFFFF 4296#define S_036230_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4297#define G_036230_PERF_MODE(x) (((x) >> 28) & 0x0F) 4298#define C_036230_PERF_MODE 0x0FFFFFFF 4299#define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234 4300#define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238 4301#define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C 4302#define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240 4303#define S_036240_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4304#define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4305#define C_036240_PERF_SEL2 0xFFFFFC00 4306#define S_036240_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4307#define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4308#define C_036240_PERF_SEL3 0xFFF003FF 4309#define S_036240_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4310#define G_036240_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4311#define C_036240_PERF_MODE3 0xF0FFFFFF 4312#define S_036240_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4313#define G_036240_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4314#define C_036240_PERF_MODE2 0x0FFFFFFF 4315#define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244 4316#define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250 4317#define S_036250_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) 4318#define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) 4319#define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00 4320#define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400 4321#define S_036400_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4322#define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4323#define C_036400_PERF_SEL 0xFFFFFC00 4324#define S_036400_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4325#define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4326#define C_036400_PERF_SEL1 0xFFF003FF 4327#define S_036400_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4328#define G_036400_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4329#define C_036400_CNTR_MODE 0xFF0FFFFF 4330#define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404 4331#define S_036404_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4332#define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4333#define C_036404_PERF_SEL2 0xFFFFFC00 4334#define S_036404_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4335#define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4336#define C_036404_PERF_SEL3 0xFFF003FF 4337#define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408 4338#define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C 4339#define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410 4340#define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414 4341#define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500 4342#define S_036500_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4343#define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4344#define C_036500_PERF_SEL 0xFFFFFC00 4345#define S_036500_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4346#define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4347#define C_036500_PERF_SEL1 0xFFF003FF 4348#define S_036500_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4349#define G_036500_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4350#define C_036500_CNTR_MODE 0xFF0FFFFF 4351#define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504 4352#define S_036504_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4353#define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4354#define C_036504_PERF_SEL2 0xFFFFFC00 4355#define S_036504_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4356#define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4357#define C_036504_PERF_SEL3 0xFFF003FF 4358#define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508 4359#define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C 4360#define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510 4361#define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514 4362#define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518 4363#define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C 4364#define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520 4365#define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600 4366#define S_036600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4367#define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4368#define C_036600_PERF_SEL 0xFFFFFC00 4369#define S_036600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4370#define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4371#define C_036600_PERF_SEL1 0xFFF003FF 4372#define S_036600_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4373#define G_036600_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4374#define C_036600_CNTR_MODE 0xFF0FFFFF 4375#define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604 4376#define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608 4377#define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C 4378#define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610 4379#define S_036610_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4380#define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4381#define C_036610_PERF_SEL2 0xFFFFFC00 4382#define S_036610_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4383#define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4384#define C_036610_PERF_SEL3 0xFFF003FF 4385#define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614 4386#define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618 4387#define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C 4388#define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620 4389#define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624 4390#define R_036628_SPI_PERFCOUNTER_BINS 0x036628 4391#define S_036628_BIN0_MIN(x) (((unsigned)(x) & 0x0F) << 0) 4392#define G_036628_BIN0_MIN(x) (((x) >> 0) & 0x0F) 4393#define C_036628_BIN0_MIN 0xFFFFFFF0 4394#define S_036628_BIN0_MAX(x) (((unsigned)(x) & 0x0F) << 4) 4395#define G_036628_BIN0_MAX(x) (((x) >> 4) & 0x0F) 4396#define C_036628_BIN0_MAX 0xFFFFFF0F 4397#define S_036628_BIN1_MIN(x) (((unsigned)(x) & 0x0F) << 8) 4398#define G_036628_BIN1_MIN(x) (((x) >> 8) & 0x0F) 4399#define C_036628_BIN1_MIN 0xFFFFF0FF 4400#define S_036628_BIN1_MAX(x) (((unsigned)(x) & 0x0F) << 12) 4401#define G_036628_BIN1_MAX(x) (((x) >> 12) & 0x0F) 4402#define C_036628_BIN1_MAX 0xFFFF0FFF 4403#define S_036628_BIN2_MIN(x) (((unsigned)(x) & 0x0F) << 16) 4404#define G_036628_BIN2_MIN(x) (((x) >> 16) & 0x0F) 4405#define C_036628_BIN2_MIN 0xFFF0FFFF 4406#define S_036628_BIN2_MAX(x) (((unsigned)(x) & 0x0F) << 20) 4407#define G_036628_BIN2_MAX(x) (((x) >> 20) & 0x0F) 4408#define C_036628_BIN2_MAX 0xFF0FFFFF 4409#define S_036628_BIN3_MIN(x) (((unsigned)(x) & 0x0F) << 24) 4410#define G_036628_BIN3_MIN(x) (((x) >> 24) & 0x0F) 4411#define C_036628_BIN3_MIN 0xF0FFFFFF 4412#define S_036628_BIN3_MAX(x) (((unsigned)(x) & 0x0F) << 28) 4413#define G_036628_BIN3_MAX(x) (((x) >> 28) & 0x0F) 4414#define C_036628_BIN3_MAX 0x0FFFFFFF 4415#define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700 4416#define S_036700_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4417#define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4418#define C_036700_PERF_SEL 0xFFFFFE00 4419#define S_036700_SQC_BANK_MASK(x) (((unsigned)(x) & 0x0F) << 12) 4420#define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0x0F) 4421#define C_036700_SQC_BANK_MASK 0xFFFF0FFF 4422#define S_036700_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0x0F) << 16) 4423#define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0x0F) 4424#define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF 4425#define S_036700_SPM_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4426#define G_036700_SPM_MODE(x) (((x) >> 20) & 0x0F) 4427#define C_036700_SPM_MODE 0xFF0FFFFF 4428#define S_036700_SIMD_MASK(x) (((unsigned)(x) & 0x0F) << 24) 4429#define G_036700_SIMD_MASK(x) (((x) >> 24) & 0x0F) 4430#define C_036700_SIMD_MASK 0xF0FFFFFF 4431#define S_036700_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4432#define G_036700_PERF_MODE(x) (((x) >> 28) & 0x0F) 4433#define C_036700_PERF_MODE 0x0FFFFFFF 4434#define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704 4435#define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708 4436#define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C 4437#define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710 4438#define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714 4439#define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718 4440#define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C 4441#define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720 4442#define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724 4443#define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728 4444#define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C 4445#define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730 4446#define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734 4447#define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738 4448#define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C 4449#define R_036780_SQ_PERFCOUNTER_CTRL 0x036780 4450#define S_036780_PS_EN(x) (((unsigned)(x) & 0x1) << 0) 4451#define G_036780_PS_EN(x) (((x) >> 0) & 0x1) 4452#define C_036780_PS_EN 0xFFFFFFFE 4453#define S_036780_VS_EN(x) (((unsigned)(x) & 0x1) << 1) 4454#define G_036780_VS_EN(x) (((x) >> 1) & 0x1) 4455#define C_036780_VS_EN 0xFFFFFFFD 4456#define S_036780_GS_EN(x) (((unsigned)(x) & 0x1) << 2) 4457#define G_036780_GS_EN(x) (((x) >> 2) & 0x1) 4458#define C_036780_GS_EN 0xFFFFFFFB 4459#define S_036780_ES_EN(x) (((unsigned)(x) & 0x1) << 3) 4460#define G_036780_ES_EN(x) (((x) >> 3) & 0x1) 4461#define C_036780_ES_EN 0xFFFFFFF7 4462#define S_036780_HS_EN(x) (((unsigned)(x) & 0x1) << 4) 4463#define G_036780_HS_EN(x) (((x) >> 4) & 0x1) 4464#define C_036780_HS_EN 0xFFFFFFEF 4465#define S_036780_LS_EN(x) (((unsigned)(x) & 0x1) << 5) 4466#define G_036780_LS_EN(x) (((x) >> 5) & 0x1) 4467#define C_036780_LS_EN 0xFFFFFFDF 4468#define S_036780_CS_EN(x) (((unsigned)(x) & 0x1) << 6) 4469#define G_036780_CS_EN(x) (((x) >> 6) & 0x1) 4470#define C_036780_CS_EN 0xFFFFFFBF 4471#define S_036780_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) 4472#define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F) 4473#define C_036780_CNTR_RATE 0xFFFFE0FF 4474#define S_036780_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 4475#define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) 4476#define C_036780_DISABLE_FLUSH 0xFFFFDFFF 4477#define R_036784_SQ_PERFCOUNTER_MASK 0x036784 4478#define S_036784_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 4479#define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF) 4480#define C_036784_SH0_MASK 0xFFFF0000 4481#define S_036784_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) 4482#define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF) 4483#define C_036784_SH1_MASK 0x0000FFFF 4484#define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788 4485#define S_036788_FORCE_EN(x) (((unsigned)(x) & 0x1) << 0) 4486#define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1) 4487#define C_036788_FORCE_EN 0xFFFFFFFE 4488#define R_036900_SX_PERFCOUNTER0_SELECT 0x036900 4489#define S_036900_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) 4490#define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 4491#define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00 4492#define S_036900_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) 4493#define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 4494#define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF 4495#define S_036900_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4496#define G_036900_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4497#define C_036900_CNTR_MODE 0xFF0FFFFF 4498#define R_036904_SX_PERFCOUNTER1_SELECT 0x036904 4499#define R_036908_SX_PERFCOUNTER2_SELECT 0x036908 4500#define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C 4501#define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910 4502#define S_036910_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) 4503#define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 4504#define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00 4505#define S_036910_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) 4506#define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 4507#define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF 4508#define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914 4509#define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00 4510#define S_036A00_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) 4511#define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 4512#define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00 4513#define S_036A00_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) 4514#define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 4515#define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF 4516#define S_036A00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4517#define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4518#define C_036A00_CNTR_MODE 0xFF0FFFFF 4519#define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04 4520#define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08 4521#define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C 4522#define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10 4523#define S_036A10_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) 4524#define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 4525#define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00 4526#define S_036A10_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) 4527#define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 4528#define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF 4529#define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00 4530#define S_036B00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4531#define G_036B00_PERF_SEL(x) (((x) >> 0) & 0xFF) 4532#define C_036B00_PERF_SEL 0xFFFFFF00 4533#define S_036B00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) 4534#define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0xFF) 4535#define C_036B00_PERF_SEL1 0xFFFC03FF 4536#define S_036B00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4537#define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4538#define C_036B00_CNTR_MODE 0xFF0FFFFF 4539#define S_036B00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4540#define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4541#define C_036B00_PERF_MODE1 0xF0FFFFFF 4542#define S_036B00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4543#define G_036B00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4544#define C_036B00_PERF_MODE 0x0FFFFFFF 4545#define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04 4546#define S_036B04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) 4547#define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0xFF) 4548#define C_036B04_PERF_SEL2 0xFFFFFF00 4549#define S_036B04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) 4550#define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0xFF) 4551#define C_036B04_PERF_SEL3 0xFFFC03FF 4552#define S_036B04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4553#define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4554#define C_036B04_PERF_MODE3 0xF0FFFFFF 4555#define S_036B04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4556#define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4557#define C_036B04_PERF_MODE2 0x0FFFFFFF 4558#define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08 4559#define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00 4560#define S_036C00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4561#define G_036C00_PERF_SEL(x) (((x) >> 0) & 0xFF) 4562#define C_036C00_PERF_SEL 0xFFFFFF00 4563#define S_036C00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) 4564#define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0xFF) 4565#define C_036C00_PERF_SEL1 0xFFFC03FF 4566#define S_036C00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4567#define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4568#define C_036C00_CNTR_MODE 0xFF0FFFFF 4569#define S_036C00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4570#define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4571#define C_036C00_PERF_MODE1 0xF0FFFFFF 4572#define S_036C00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4573#define G_036C00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4574#define C_036C00_PERF_MODE 0x0FFFFFFF 4575#define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04 4576#define S_036C04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) 4577#define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0xFF) 4578#define C_036C04_PERF_SEL2 0xFFFFFF00 4579#define S_036C04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) 4580#define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0xFF) 4581#define C_036C04_PERF_SEL3 0xFFFC03FF 4582#define S_036C04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4583#define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4584#define C_036C04_PERF_MODE3 0xF0FFFFFF 4585#define S_036C04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4586#define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4587#define C_036C04_PERF_MODE2 0x0FFFFFFF 4588#define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08 4589#define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00 4590#define S_036D00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4591#define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4592#define C_036D00_PERF_SEL 0xFFFFFC00 4593#define S_036D00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4594#define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4595#define C_036D00_PERF_SEL1 0xFFF003FF 4596#define S_036D00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4597#define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4598#define C_036D00_CNTR_MODE 0xFF0FFFFF 4599#define S_036D00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4600#define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4601#define C_036D00_PERF_MODE1 0xF0FFFFFF 4602#define S_036D00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4603#define G_036D00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4604#define C_036D00_PERF_MODE 0x0FFFFFFF 4605#define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04 4606#define S_036D04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4607#define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4608#define C_036D04_PERF_SEL2 0xFFFFFC00 4609#define S_036D04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4610#define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4611#define C_036D04_PERF_SEL3 0xFFF003FF 4612#define S_036D04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4613#define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4614#define C_036D04_PERF_MODE3 0xF0FFFFFF 4615#define S_036D04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4616#define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4617#define C_036D04_PERF_MODE2 0x0FFFFFFF 4618#define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08 4619#define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C 4620#define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10 4621#define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14 4622#define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00 4623#define S_036E00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4624#define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4625#define C_036E00_PERF_SEL 0xFFFFFC00 4626#define S_036E00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4627#define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4628#define C_036E00_PERF_SEL1 0xFFF003FF 4629#define S_036E00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4630#define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4631#define C_036E00_CNTR_MODE 0xFF0FFFFF 4632#define S_036E00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4633#define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4634#define C_036E00_PERF_MODE1 0xF0FFFFFF 4635#define S_036E00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4636#define G_036E00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4637#define C_036E00_PERF_MODE 0x0FFFFFFF 4638#define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04 4639#define S_036E04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4640#define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4641#define C_036E04_PERF_SEL2 0xFFFFFC00 4642#define S_036E04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4643#define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4644#define C_036E04_PERF_SEL3 0xFFF003FF 4645#define S_036E04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) 4646#define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0x0F) 4647#define C_036E04_PERF_MODE2 0xF0FFFFFF 4648#define S_036E04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) 4649#define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0x0F) 4650#define C_036E04_PERF_MODE3 0x0FFFFFFF 4651#define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08 4652#define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C 4653#define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10 4654#define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14 4655#define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40 4656#define S_036E40_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4657#define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4658#define C_036E40_PERF_SEL 0xFFFFFC00 4659#define S_036E40_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4660#define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4661#define C_036E40_PERF_SEL1 0xFFF003FF 4662#define S_036E40_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4663#define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4664#define C_036E40_CNTR_MODE 0xFF0FFFFF 4665#define S_036E40_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4666#define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4667#define C_036E40_PERF_MODE1 0xF0FFFFFF 4668#define S_036E40_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4669#define G_036E40_PERF_MODE(x) (((x) >> 28) & 0x0F) 4670#define C_036E40_PERF_MODE 0x0FFFFFFF 4671#define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44 4672#define S_036E44_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4673#define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4674#define C_036E44_PERF_SEL2 0xFFFFFC00 4675#define S_036E44_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4676#define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4677#define C_036E44_PERF_SEL3 0xFFF003FF 4678#define S_036E44_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) 4679#define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0x0F) 4680#define C_036E44_PERF_MODE2 0xF0FFFFFF 4681#define S_036E44_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) 4682#define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0x0F) 4683#define C_036E44_PERF_MODE3 0x0FFFFFFF 4684#define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48 4685#define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C 4686#define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50 4687#define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54 4688#define R_037000_CB_PERFCOUNTER_FILTER 0x037000 4689#define S_037000_OP_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 4690#define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1) 4691#define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE 4692#define S_037000_OP_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 1) 4693#define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x07) 4694#define C_037000_OP_FILTER_SEL 0xFFFFFFF1 4695#define S_037000_FORMAT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 4696#define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1) 4697#define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF 4698#define S_037000_FORMAT_FILTER_SEL(x) (((unsigned)(x) & 0x1F) << 5) 4699#define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F) 4700#define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F 4701#define S_037000_CLEAR_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 4702#define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1) 4703#define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF 4704#define S_037000_CLEAR_FILTER_SEL(x) (((unsigned)(x) & 0x1) << 11) 4705#define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1) 4706#define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF 4707#define S_037000_MRT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 4708#define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1) 4709#define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF 4710#define S_037000_MRT_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 13) 4711#define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x07) 4712#define C_037000_MRT_FILTER_SEL 0xFFFF1FFF 4713#define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 4714#define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1) 4715#define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF 4716#define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 18) 4717#define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x07) 4718#define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF 4719#define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 21) 4720#define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1) 4721#define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF 4722#define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((unsigned)(x) & 0x03) << 22) 4723#define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x03) 4724#define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF 4725#define R_037004_CB_PERFCOUNTER0_SELECT 0x037004 4726#define S_037004_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4727#define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4728#define C_037004_PERF_SEL 0xFFFFFE00 4729#define S_037004_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) 4730#define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF) 4731#define C_037004_PERF_SEL1 0xFFF803FF 4732#define S_037004_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4733#define G_037004_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4734#define C_037004_CNTR_MODE 0xFF0FFFFF 4735#define S_037004_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4736#define G_037004_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4737#define C_037004_PERF_MODE1 0xF0FFFFFF 4738#define S_037004_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4739#define G_037004_PERF_MODE(x) (((x) >> 28) & 0x0F) 4740#define C_037004_PERF_MODE 0x0FFFFFFF 4741#define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008 4742#define S_037008_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) 4743#define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF) 4744#define C_037008_PERF_SEL2 0xFFFFFE00 4745#define S_037008_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) 4746#define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF) 4747#define C_037008_PERF_SEL3 0xFFF803FF 4748#define S_037008_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4749#define G_037008_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4750#define C_037008_PERF_MODE3 0xF0FFFFFF 4751#define S_037008_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4752#define G_037008_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4753#define C_037008_PERF_MODE2 0x0FFFFFFF 4754#define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C 4755#define R_037010_CB_PERFCOUNTER2_SELECT 0x037010 4756#define R_037014_CB_PERFCOUNTER3_SELECT 0x037014 4757#define R_037100_DB_PERFCOUNTER0_SELECT 0x037100 4758#define S_037100_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4759#define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4760#define C_037100_PERF_SEL 0xFFFFFC00 4761#define S_037100_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4762#define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4763#define C_037100_PERF_SEL1 0xFFF003FF 4764#define S_037100_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4765#define G_037100_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4766#define C_037100_CNTR_MODE 0xFF0FFFFF 4767#define S_037100_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4768#define G_037100_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4769#define C_037100_PERF_MODE1 0xF0FFFFFF 4770#define S_037100_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4771#define G_037100_PERF_MODE(x) (((x) >> 28) & 0x0F) 4772#define C_037100_PERF_MODE 0x0FFFFFFF 4773#define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104 4774#define S_037104_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4775#define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4776#define C_037104_PERF_SEL2 0xFFFFFC00 4777#define S_037104_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4778#define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4779#define C_037104_PERF_SEL3 0xFFF003FF 4780#define S_037104_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4781#define G_037104_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4782#define C_037104_PERF_MODE3 0xF0FFFFFF 4783#define S_037104_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4784#define G_037104_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4785#define C_037104_PERF_MODE2 0x0FFFFFFF 4786#define R_037108_DB_PERFCOUNTER1_SELECT 0x037108 4787#define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C 4788#define R_037110_DB_PERFCOUNTER2_SELECT 0x037110 4789#define R_037118_DB_PERFCOUNTER3_SELECT 0x037118 4790#define R_028000_DB_RENDER_CONTROL 0x028000 4791#define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 4792#define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1) 4793#define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE 4794#define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 4795#define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 4796#define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD 4797#define S_028000_DEPTH_COPY(x) (((unsigned)(x) & 0x1) << 2) 4798#define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1) 4799#define C_028000_DEPTH_COPY 0xFFFFFFFB 4800#define S_028000_STENCIL_COPY(x) (((unsigned)(x) & 0x1) << 3) 4801#define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1) 4802#define C_028000_STENCIL_COPY 0xFFFFFFF7 4803#define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 4804#define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1) 4805#define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF 4806#define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 4807#define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1) 4808#define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF 4809#define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) 4810#define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1) 4811#define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF 4812#define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) 4813#define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1) 4814#define C_028000_COPY_CENTROID 0xFFFFFF7F 4815#define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0x0F) << 8) 4816#define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0x0F) 4817#define C_028000_COPY_SAMPLE 0xFFFFF0FF 4818/* VI */ 4819#define S_028000_DECOMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 4820#define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1) 4821#define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF 4822/* */ 4823#define R_028004_DB_COUNT_CONTROL 0x028004 4824#define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 4825#define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1) 4826#define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE 4827#define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) 4828#define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1) 4829#define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD 4830#define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x07) << 4) 4831#define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x07) 4832#define C_028004_SAMPLE_RATE 0xFFFFFF8F 4833/* CIK */ 4834#define S_028004_ZPASS_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 4835#define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0x0F) 4836#define C_028004_ZPASS_ENABLE 0xFFFFF0FF 4837#define S_028004_ZFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 4838#define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0x0F) 4839#define C_028004_ZFAIL_ENABLE 0xFFFF0FFF 4840#define S_028004_SFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 4841#define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0x0F) 4842#define C_028004_SFAIL_ENABLE 0xFFF0FFFF 4843#define S_028004_DBFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 4844#define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0x0F) 4845#define C_028004_DBFAIL_ENABLE 0xFF0FFFFF 4846#define S_028004_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 4847#define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0x0F) 4848#define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF 4849#define S_028004_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 4850#define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0x0F) 4851#define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF 4852/* */ 4853#define R_028008_DB_DEPTH_VIEW 0x028008 4854#define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 4855#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) 4856#define C_028008_SLICE_START 0xFFFFF800 4857#define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 4858#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 4859#define C_028008_SLICE_MAX 0xFF001FFF 4860#define S_028008_Z_READ_ONLY(x) (((unsigned)(x) & 0x1) << 24) 4861#define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1) 4862#define C_028008_Z_READ_ONLY 0xFEFFFFFF 4863#define S_028008_STENCIL_READ_ONLY(x) (((unsigned)(x) & 0x1) << 25) 4864#define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1) 4865#define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF 4866#define R_02800C_DB_RENDER_OVERRIDE 0x02800C 4867#define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x03) << 0) 4868#define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x03) 4869#define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC 4870#define V_02800C_FORCE_OFF 0x00 4871#define V_02800C_FORCE_ENABLE 0x01 4872#define V_02800C_FORCE_DISABLE 0x02 4873#define V_02800C_FORCE_RESERVED 0x03 4874#define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x03) << 2) 4875#define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x03) 4876#define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 4877#define V_02800C_FORCE_OFF 0x00 4878#define V_02800C_FORCE_ENABLE 0x01 4879#define V_02800C_FORCE_DISABLE 0x02 4880#define V_02800C_FORCE_RESERVED 0x03 4881#define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x03) << 4) 4882#define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x03) 4883#define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF 4884#define V_02800C_FORCE_OFF 0x00 4885#define V_02800C_FORCE_ENABLE 0x01 4886#define V_02800C_FORCE_DISABLE 0x02 4887#define V_02800C_FORCE_RESERVED 0x03 4888#define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) 4889#define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) 4890#define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF 4891#define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 4892#define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) 4893#define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F 4894#define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 4895#define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) 4896#define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF 4897#define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 4898#define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) 4899#define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF 4900#define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) 4901#define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) 4902#define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF 4903#define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) 4904#define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) 4905#define C_02800C_FORCE_Z_READ 0xFFFFF7FF 4906#define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) 4907#define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) 4908#define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF 4909#define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x03) << 13) 4910#define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x03) 4911#define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF 4912#define V_02800C_FORCE_OFF 0x00 4913#define V_02800C_FORCE_ENABLE 0x01 4914#define V_02800C_FORCE_DISABLE 0x02 4915#define V_02800C_FORCE_RESERVED 0x03 4916#define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) 4917#define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) 4918#define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF 4919#define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) 4920#define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) 4921#define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF 4922#define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) 4923#define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) 4924#define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF 4925#define S_02800C_DISABLE_FULLY_COVERED(x) (((unsigned)(x) & 0x1) << 18) 4926#define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1) 4927#define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF 4928#define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((unsigned)(x) & 0x03) << 19) 4929#define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x03) 4930#define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF 4931#define V_02800C_FORCE_SUMM_OFF 0x00 4932#define V_02800C_FORCE_SUMM_MINZ 0x01 4933#define V_02800C_FORCE_SUMM_MAXZ 0x02 4934#define V_02800C_FORCE_SUMM_BOTH 0x03 4935#define S_02800C_MAX_TILES_IN_DTT(x) (((unsigned)(x) & 0x1F) << 21) 4936#define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F) 4937#define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF 4938#define S_02800C_DISABLE_TILE_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) 4939#define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1) 4940#define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF 4941#define S_02800C_FORCE_Z_DIRTY(x) (((unsigned)(x) & 0x1) << 27) 4942#define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1) 4943#define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF 4944#define S_02800C_FORCE_STENCIL_DIRTY(x) (((unsigned)(x) & 0x1) << 28) 4945#define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1) 4946#define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF 4947#define S_02800C_FORCE_Z_VALID(x) (((unsigned)(x) & 0x1) << 29) 4948#define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1) 4949#define C_02800C_FORCE_Z_VALID 0xDFFFFFFF 4950#define S_02800C_FORCE_STENCIL_VALID(x) (((unsigned)(x) & 0x1) << 30) 4951#define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1) 4952#define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF 4953#define S_02800C_PRESERVE_COMPRESSION(x) (((unsigned)(x) & 0x1) << 31) 4954#define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1) 4955#define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF 4956#define R_028010_DB_RENDER_OVERRIDE2 0x028010 4957#define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((unsigned)(x) & 0x03) << 0) 4958#define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x03) 4959#define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC 4960#define V_028010_PSLC_AUTO 0x00 4961#define V_028010_PSLC_ON_HANG_ONLY 0x01 4962#define V_028010_PSLC_ASAP 0x02 4963#define V_028010_PSLC_COUNTDOWN 0x03 4964#define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((unsigned)(x) & 0x07) << 2) 4965#define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x07) 4966#define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3 4967#define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 5) 4968#define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1) 4969#define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF 4970#define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 6) 4971#define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1) 4972#define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF 4973#define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((unsigned)(x) & 0x1) << 7) 4974#define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1) 4975#define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F 4976#define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((unsigned)(x) & 0x1) << 8) 4977#define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1) 4978#define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF 4979#define S_028010_DISABLE_REG_SNOOP(x) (((unsigned)(x) & 0x1) << 9) 4980#define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1) 4981#define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF 4982#define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((unsigned)(x) & 0x1) << 10) 4983#define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1) 4984#define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF 4985/* CIK */ 4986#define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 4987#define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1) 4988#define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF 4989#define S_028010_HIZ_ZFUNC(x) (((unsigned)(x) & 0x07) << 12) 4990#define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x07) 4991#define C_028010_HIZ_ZFUNC 0xFFFF8FFF 4992#define S_028010_HIS_SFUNC_FF(x) (((unsigned)(x) & 0x07) << 15) 4993#define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x07) 4994#define C_028010_HIS_SFUNC_FF 0xFFFC7FFF 4995#define S_028010_HIS_SFUNC_BF(x) (((unsigned)(x) & 0x07) << 18) 4996#define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x07) 4997#define C_028010_HIS_SFUNC_BF 0xFFE3FFFF 4998#define S_028010_PRESERVE_ZRANGE(x) (((unsigned)(x) & 0x1) << 21) 4999#define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1) 5000#define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF 5001#define S_028010_PRESERVE_SRESULTS(x) (((unsigned)(x) & 0x1) << 22) 5002#define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1) 5003#define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF 5004#define S_028010_DISABLE_FAST_PASS(x) (((unsigned)(x) & 0x1) << 23) 5005#define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1) 5006#define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF 5007/* */ 5008#define R_028014_DB_HTILE_DATA_BASE 0x028014 5009#define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020 5010#define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024 5011#define R_028028_DB_STENCIL_CLEAR 0x028028 5012#define S_028028_CLEAR(x) (((unsigned)(x) & 0xFF) << 0) 5013#define G_028028_CLEAR(x) (((x) >> 0) & 0xFF) 5014#define C_028028_CLEAR 0xFFFFFF00 5015#define R_02802C_DB_DEPTH_CLEAR 0x02802C 5016#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 5017#define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) 5018#define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) 5019#define C_028030_TL_X 0xFFFF0000 5020#define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 5021#define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) 5022#define C_028030_TL_Y 0x0000FFFF 5023#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 5024#define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) 5025#define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) 5026#define C_028034_BR_X 0xFFFF0000 5027#define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 5028#define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) 5029#define C_028034_BR_Y 0x0000FFFF 5030#define R_02803C_DB_DEPTH_INFO 0x02803C 5031#define S_02803C_ADDR5_SWIZZLE_MASK(x) (((unsigned)(x) & 0x0F) << 0) 5032#define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0x0F) 5033#define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0 5034/* CIK */ 5035#define S_02803C_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 4) 5036#define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0x0F) 5037#define C_02803C_ARRAY_MODE 0xFFFFFF0F 5038#define V_02803C_ARRAY_LINEAR_GENERAL 0x00 5039#define V_02803C_ARRAY_LINEAR_ALIGNED 0x01 5040#define V_02803C_ARRAY_1D_TILED_THIN1 0x02 5041#define V_02803C_ARRAY_2D_TILED_THIN1 0x04 5042#define V_02803C_ARRAY_PRT_TILED_THIN1 0x05 5043#define V_02803C_ARRAY_PRT_2D_TILED_THIN1 0x06 5044#define S_02803C_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 8) 5045#define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F) 5046#define C_02803C_PIPE_CONFIG 0xFFFFE0FF 5047#define V_02803C_ADDR_SURF_P2 0x00 5048#define V_02803C_X_ADDR_SURF_P4_8X16 0x04 5049#define V_02803C_X_ADDR_SURF_P4_16X16 0x05 5050#define V_02803C_X_ADDR_SURF_P4_16X32 0x06 5051#define V_02803C_X_ADDR_SURF_P4_32X32 0x07 5052#define V_02803C_X_ADDR_SURF_P8_16X16_8X16 0x08 5053#define V_02803C_X_ADDR_SURF_P8_16X32_8X16 0x09 5054#define V_02803C_X_ADDR_SURF_P8_32X32_8X16 0x0A 5055#define V_02803C_X_ADDR_SURF_P8_16X32_16X16 0x0B 5056#define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C 5057#define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D 5058#define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E 5059#define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10 5060#define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11 5061#define S_02803C_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 13) 5062#define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03) 5063#define C_02803C_BANK_WIDTH 0xFFFF9FFF 5064#define V_02803C_ADDR_SURF_BANK_WIDTH_1 0x00 5065#define V_02803C_ADDR_SURF_BANK_WIDTH_2 0x01 5066#define V_02803C_ADDR_SURF_BANK_WIDTH_4 0x02 5067#define V_02803C_ADDR_SURF_BANK_WIDTH_8 0x03 5068#define S_02803C_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 15) 5069#define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x03) 5070#define C_02803C_BANK_HEIGHT 0xFFFE7FFF 5071#define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0x00 5072#define V_02803C_ADDR_SURF_BANK_HEIGHT_2 0x01 5073#define V_02803C_ADDR_SURF_BANK_HEIGHT_4 0x02 5074#define V_02803C_ADDR_SURF_BANK_HEIGHT_8 0x03 5075#define S_02803C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 17) 5076#define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x03) 5077#define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF 5078#define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0x00 5079#define V_02803C_ADDR_SURF_MACRO_ASPECT_2 0x01 5080#define V_02803C_ADDR_SURF_MACRO_ASPECT_4 0x02 5081#define V_02803C_ADDR_SURF_MACRO_ASPECT_8 0x03 5082#define S_02803C_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 19) 5083#define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x03) 5084#define C_02803C_NUM_BANKS 0xFFE7FFFF 5085#define V_02803C_ADDR_SURF_2_BANK 0x00 5086#define V_02803C_ADDR_SURF_4_BANK 0x01 5087#define V_02803C_ADDR_SURF_8_BANK 0x02 5088#define V_02803C_ADDR_SURF_16_BANK 0x03 5089/* */ 5090#define R_028040_DB_Z_INFO 0x028040 5091#define S_028040_FORMAT(x) (((unsigned)(x) & 0x03) << 0) 5092#define G_028040_FORMAT(x) (((x) >> 0) & 0x03) 5093#define C_028040_FORMAT 0xFFFFFFFC 5094#define V_028040_Z_INVALID 0x00 5095#define V_028040_Z_16 0x01 5096#define V_028040_Z_24 0x02 /* deprecated */ 5097#define V_028040_Z_32_FLOAT 0x03 5098#define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x03) << 2) 5099#define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x03) 5100#define C_028040_NUM_SAMPLES 0xFFFFFFF3 5101/* CIK */ 5102#define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) 5103#define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x07) 5104#define C_028040_TILE_SPLIT 0xFFFF1FFF 5105#define V_028040_ADDR_SURF_TILE_SPLIT_64B 0x00 5106#define V_028040_ADDR_SURF_TILE_SPLIT_128B 0x01 5107#define V_028040_ADDR_SURF_TILE_SPLIT_256B 0x02 5108#define V_028040_ADDR_SURF_TILE_SPLIT_512B 0x03 5109#define V_028040_ADDR_SURF_TILE_SPLIT_1KB 0x04 5110#define V_028040_ADDR_SURF_TILE_SPLIT_2KB 0x05 5111#define V_028040_ADDR_SURF_TILE_SPLIT_4KB 0x06 5112/* */ 5113#define S_028040_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ 5114#define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ 5115#define C_028040_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ 5116/* VI */ 5117#define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0x0F) << 23) 5118#define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0x0F) 5119#define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF 5120/* */ 5121#define S_028040_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 5122#define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 5123#define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF 5124#define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) 5125#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) 5126#define C_028040_READ_SIZE 0xEFFFFFFF 5127#define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) 5128#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) 5129#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF 5130/* VI */ 5131#define S_028040_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 5132#define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 5133#define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF 5134/* */ 5135#define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) 5136#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) 5137#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF 5138#define R_028044_DB_STENCIL_INFO 0x028044 5139#define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) 5140#define G_028044_FORMAT(x) (((x) >> 0) & 0x1) 5141#define C_028044_FORMAT 0xFFFFFFFE 5142#define V_028044_STENCIL_INVALID 0x00 5143#define V_028044_STENCIL_8 0x01 5144/* CIK */ 5145#define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) 5146#define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x07) 5147#define C_028044_TILE_SPLIT 0xFFFF1FFF 5148#define V_028044_ADDR_SURF_TILE_SPLIT_64B 0x00 5149#define V_028044_ADDR_SURF_TILE_SPLIT_128B 0x01 5150#define V_028044_ADDR_SURF_TILE_SPLIT_256B 0x02 5151#define V_028044_ADDR_SURF_TILE_SPLIT_512B 0x03 5152#define V_028044_ADDR_SURF_TILE_SPLIT_1KB 0x04 5153#define V_028044_ADDR_SURF_TILE_SPLIT_2KB 0x05 5154#define V_028044_ADDR_SURF_TILE_SPLIT_4KB 0x06 5155/* */ 5156#define S_028044_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ 5157#define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ 5158#define C_028044_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ 5159#define S_028044_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 5160#define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 5161#define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF 5162#define S_028044_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 5163#define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) 5164#define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF 5165/* VI */ 5166#define S_028044_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 5167#define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 5168#define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF 5169/* */ 5170#define R_028048_DB_Z_READ_BASE 0x028048 5171#define R_02804C_DB_STENCIL_READ_BASE 0x02804C 5172#define R_028050_DB_Z_WRITE_BASE 0x028050 5173#define R_028054_DB_STENCIL_WRITE_BASE 0x028054 5174#define R_028058_DB_DEPTH_SIZE 0x028058 5175#define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 5176#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) 5177#define C_028058_PITCH_TILE_MAX 0xFFFFF800 5178#define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) 5179#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) 5180#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF 5181#define R_02805C_DB_DEPTH_SLICE 0x02805C 5182#define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 5183#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 5184#define C_02805C_SLICE_TILE_MAX 0xFFC00000 5185#define R_028080_TA_BC_BASE_ADDR 0x028080 5186/* CIK */ 5187#define R_028084_TA_BC_BASE_ADDR_HI 0x028084 5188#define S_028084_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 5189#define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF) 5190#define C_028084_ADDRESS 0xFFFFFF00 5191#define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8 5192#define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC 5193#define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0 5194#define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4 5195/* */ 5196#define R_0281F8_COHER_DEST_BASE_2 0x0281F8 5197#define R_0281FC_COHER_DEST_BASE_3 0x0281FC 5198#define R_028200_PA_SC_WINDOW_OFFSET 0x028200 5199#define S_028200_WINDOW_X_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) 5200#define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF) 5201#define C_028200_WINDOW_X_OFFSET 0xFFFF0000 5202#define S_028200_WINDOW_Y_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 16) 5203#define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF) 5204#define C_028200_WINDOW_Y_OFFSET 0x0000FFFF 5205#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 5206#define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5207#define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) 5208#define C_028204_TL_X 0xFFFF8000 5209#define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5210#define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) 5211#define C_028204_TL_Y 0x8000FFFF 5212#define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5213#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5214#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5215#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 5216#define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5217#define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) 5218#define C_028208_BR_X 0xFFFF8000 5219#define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5220#define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) 5221#define C_028208_BR_Y 0x8000FFFF 5222#define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C 5223#define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0) 5224#define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF) 5225#define C_02820C_CLIP_RULE 0xFFFF0000 5226#define R_028210_PA_SC_CLIPRECT_0_TL 0x028210 5227#define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5228#define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF) 5229#define C_028210_TL_X 0xFFFF8000 5230#define S_028210_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5231#define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF) 5232#define C_028210_TL_Y 0x8000FFFF 5233#define R_028214_PA_SC_CLIPRECT_0_BR 0x028214 5234#define S_028214_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5235#define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF) 5236#define C_028214_BR_X 0xFFFF8000 5237#define S_028214_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5238#define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF) 5239#define C_028214_BR_Y 0x8000FFFF 5240#define R_028218_PA_SC_CLIPRECT_1_TL 0x028218 5241#define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C 5242#define R_028220_PA_SC_CLIPRECT_2_TL 0x028220 5243#define R_028224_PA_SC_CLIPRECT_2_BR 0x028224 5244#define R_028228_PA_SC_CLIPRECT_3_TL 0x028228 5245#define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C 5246#define R_028230_PA_SC_EDGERULE 0x028230 5247#define S_028230_ER_TRI(x) (((unsigned)(x) & 0x0F) << 0) 5248#define G_028230_ER_TRI(x) (((x) >> 0) & 0x0F) 5249#define C_028230_ER_TRI 0xFFFFFFF0 5250#define S_028230_ER_POINT(x) (((unsigned)(x) & 0x0F) << 4) 5251#define G_028230_ER_POINT(x) (((x) >> 4) & 0x0F) 5252#define C_028230_ER_POINT 0xFFFFFF0F 5253#define S_028230_ER_RECT(x) (((unsigned)(x) & 0x0F) << 8) 5254#define G_028230_ER_RECT(x) (((x) >> 8) & 0x0F) 5255#define C_028230_ER_RECT 0xFFFFF0FF 5256#define S_028230_ER_LINE_LR(x) (((unsigned)(x) & 0x3F) << 12) 5257#define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F) 5258#define C_028230_ER_LINE_LR 0xFFFC0FFF 5259#define S_028230_ER_LINE_RL(x) (((unsigned)(x) & 0x3F) << 18) 5260#define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F) 5261#define C_028230_ER_LINE_RL 0xFF03FFFF 5262#define S_028230_ER_LINE_TB(x) (((unsigned)(x) & 0x0F) << 24) 5263#define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0x0F) 5264#define C_028230_ER_LINE_TB 0xF0FFFFFF 5265#define S_028230_ER_LINE_BT(x) (((unsigned)(x) & 0x0F) << 28) 5266#define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0x0F) 5267#define C_028230_ER_LINE_BT 0x0FFFFFFF 5268#define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234 5269#define S_028234_HW_SCREEN_OFFSET_X(x) (((unsigned)(x) & 0x1FF) << 0) 5270#define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF) 5271#define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00 5272#define S_028234_HW_SCREEN_OFFSET_Y(x) (((unsigned)(x) & 0x1FF) << 16) 5273#define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF) 5274#define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF 5275#define R_028238_CB_TARGET_MASK 0x028238 5276#define S_028238_TARGET0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) 5277#define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0x0F) 5278#define C_028238_TARGET0_ENABLE 0xFFFFFFF0 5279#define S_028238_TARGET1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) 5280#define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0x0F) 5281#define C_028238_TARGET1_ENABLE 0xFFFFFF0F 5282#define S_028238_TARGET2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 5283#define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0x0F) 5284#define C_028238_TARGET2_ENABLE 0xFFFFF0FF 5285#define S_028238_TARGET3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 5286#define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0x0F) 5287#define C_028238_TARGET3_ENABLE 0xFFFF0FFF 5288#define S_028238_TARGET4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 5289#define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0x0F) 5290#define C_028238_TARGET4_ENABLE 0xFFF0FFFF 5291#define S_028238_TARGET5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 5292#define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0x0F) 5293#define C_028238_TARGET5_ENABLE 0xFF0FFFFF 5294#define S_028238_TARGET6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 5295#define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0x0F) 5296#define C_028238_TARGET6_ENABLE 0xF0FFFFFF 5297#define S_028238_TARGET7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 5298#define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0x0F) 5299#define C_028238_TARGET7_ENABLE 0x0FFFFFFF 5300#define R_02823C_CB_SHADER_MASK 0x02823C 5301#define S_02823C_OUTPUT0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) 5302#define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0x0F) 5303#define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 5304#define S_02823C_OUTPUT1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) 5305#define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0x0F) 5306#define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F 5307#define S_02823C_OUTPUT2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 5308#define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0x0F) 5309#define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF 5310#define S_02823C_OUTPUT3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 5311#define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0x0F) 5312#define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF 5313#define S_02823C_OUTPUT4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 5314#define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0x0F) 5315#define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF 5316#define S_02823C_OUTPUT5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 5317#define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0x0F) 5318#define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF 5319#define S_02823C_OUTPUT6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 5320#define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0x0F) 5321#define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF 5322#define S_02823C_OUTPUT7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 5323#define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0x0F) 5324#define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF 5325#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 5326#define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5327#define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) 5328#define C_028240_TL_X 0xFFFF8000 5329#define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5330#define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) 5331#define C_028240_TL_Y 0x8000FFFF 5332#define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5333#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5334#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5335#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 5336#define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5337#define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) 5338#define C_028244_BR_X 0xFFFF8000 5339#define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5340#define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) 5341#define C_028244_BR_Y 0x8000FFFF 5342#define R_028248_COHER_DEST_BASE_0 0x028248 5343#define R_02824C_COHER_DEST_BASE_1 0x02824C 5344#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 5345#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5346#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) 5347#define C_028250_TL_X 0xFFFF8000 5348#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5349#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) 5350#define C_028250_TL_Y 0x8000FFFF 5351#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5352#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5353#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5354#define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 5355#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5356#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) 5357#define C_028254_BR_X 0xFFFF8000 5358#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5359#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) 5360#define C_028254_BR_Y 0x8000FFFF 5361#define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258 5362#define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C 5363#define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260 5364#define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264 5365#define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268 5366#define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C 5367#define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270 5368#define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274 5369#define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278 5370#define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C 5371#define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280 5372#define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284 5373#define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288 5374#define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C 5375#define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290 5376#define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294 5377#define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298 5378#define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C 5379#define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0 5380#define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4 5381#define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8 5382#define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC 5383#define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0 5384#define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4 5385#define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8 5386#define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC 5387#define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0 5388#define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4 5389#define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8 5390#define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC 5391#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 5392#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 5393#define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8 5394#define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC 5395#define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0 5396#define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4 5397#define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8 5398#define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC 5399#define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0 5400#define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4 5401#define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8 5402#define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC 5403#define R_028300_PA_SC_VPORT_ZMIN_6 0x028300 5404#define R_028304_PA_SC_VPORT_ZMAX_6 0x028304 5405#define R_028308_PA_SC_VPORT_ZMIN_7 0x028308 5406#define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C 5407#define R_028310_PA_SC_VPORT_ZMIN_8 0x028310 5408#define R_028314_PA_SC_VPORT_ZMAX_8 0x028314 5409#define R_028318_PA_SC_VPORT_ZMIN_9 0x028318 5410#define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C 5411#define R_028320_PA_SC_VPORT_ZMIN_10 0x028320 5412#define R_028324_PA_SC_VPORT_ZMAX_10 0x028324 5413#define R_028328_PA_SC_VPORT_ZMIN_11 0x028328 5414#define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C 5415#define R_028330_PA_SC_VPORT_ZMIN_12 0x028330 5416#define R_028334_PA_SC_VPORT_ZMAX_12 0x028334 5417#define R_028338_PA_SC_VPORT_ZMIN_13 0x028338 5418#define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C 5419#define R_028340_PA_SC_VPORT_ZMIN_14 0x028340 5420#define R_028344_PA_SC_VPORT_ZMAX_14 0x028344 5421#define R_028348_PA_SC_VPORT_ZMIN_15 0x028348 5422#define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C 5423#define R_028350_PA_SC_RASTER_CONFIG 0x028350 5424#define S_028350_RB_MAP_PKR0(x) (((unsigned)(x) & 0x03) << 0) 5425#define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x03) 5426#define C_028350_RB_MAP_PKR0 0xFFFFFFFC 5427#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 5428#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 5429#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 5430#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 5431#define S_028350_RB_MAP_PKR1(x) (((unsigned)(x) & 0x03) << 2) 5432#define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x03) 5433#define C_028350_RB_MAP_PKR1 0xFFFFFFF3 5434#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 5435#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 5436#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 5437#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 5438#define S_028350_RB_XSEL2(x) (((unsigned)(x) & 0x03) << 4) 5439#define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x03) 5440#define C_028350_RB_XSEL2 0xFFFFFFCF 5441#define V_028350_RASTER_CONFIG_RB_XSEL2_0 0x00 5442#define V_028350_RASTER_CONFIG_RB_XSEL2_1 0x01 5443#define V_028350_RASTER_CONFIG_RB_XSEL2_2 0x02 5444#define V_028350_RASTER_CONFIG_RB_XSEL2_3 0x03 5445#define S_028350_RB_XSEL(x) (((unsigned)(x) & 0x1) << 6) 5446#define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1) 5447#define C_028350_RB_XSEL 0xFFFFFFBF 5448#define S_028350_RB_YSEL(x) (((unsigned)(x) & 0x1) << 7) 5449#define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1) 5450#define C_028350_RB_YSEL 0xFFFFFF7F 5451#define S_028350_PKR_MAP(x) (((unsigned)(x) & 0x03) << 8) 5452#define G_028350_PKR_MAP(x) (((x) >> 8) & 0x03) 5453#define C_028350_PKR_MAP 0xFFFFFCFF 5454#define V_028350_RASTER_CONFIG_PKR_MAP_0 0x00 5455#define V_028350_RASTER_CONFIG_PKR_MAP_1 0x01 5456#define V_028350_RASTER_CONFIG_PKR_MAP_2 0x02 5457#define V_028350_RASTER_CONFIG_PKR_MAP_3 0x03 5458#define S_028350_PKR_XSEL(x) (((unsigned)(x) & 0x03) << 10) 5459#define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x03) 5460#define C_028350_PKR_XSEL 0xFFFFF3FF 5461#define V_028350_RASTER_CONFIG_PKR_XSEL_0 0x00 5462#define V_028350_RASTER_CONFIG_PKR_XSEL_1 0x01 5463#define V_028350_RASTER_CONFIG_PKR_XSEL_2 0x02 5464#define V_028350_RASTER_CONFIG_PKR_XSEL_3 0x03 5465#define S_028350_PKR_YSEL(x) (((unsigned)(x) & 0x03) << 12) 5466#define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x03) 5467#define C_028350_PKR_YSEL 0xFFFFCFFF 5468#define V_028350_RASTER_CONFIG_PKR_YSEL_0 0x00 5469#define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01 5470#define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02 5471#define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03 5472#define S_028350_PKR_XSEL2(x) (((unsigned)(x) & 0x03) << 14) 5473#define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03) 5474#define C_028350_PKR_XSEL2 0xFFFF3FFF 5475#define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00 5476#define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01 5477#define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02 5478#define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03 5479#define S_028350_SC_MAP(x) (((unsigned)(x) & 0x03) << 16) 5480#define G_028350_SC_MAP(x) (((x) >> 16) & 0x03) 5481#define C_028350_SC_MAP 0xFFFCFFFF 5482#define V_028350_RASTER_CONFIG_SC_MAP_0 0x00 5483#define V_028350_RASTER_CONFIG_SC_MAP_1 0x01 5484#define V_028350_RASTER_CONFIG_SC_MAP_2 0x02 5485#define V_028350_RASTER_CONFIG_SC_MAP_3 0x03 5486#define S_028350_SC_XSEL(x) (((unsigned)(x) & 0x03) << 18) 5487#define G_028350_SC_XSEL(x) (((x) >> 18) & 0x03) 5488#define C_028350_SC_XSEL 0xFFF3FFFF 5489#define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0x00 5490#define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 0x01 5491#define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 0x02 5492#define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 0x03 5493#define S_028350_SC_YSEL(x) (((unsigned)(x) & 0x03) << 20) 5494#define G_028350_SC_YSEL(x) (((x) >> 20) & 0x03) 5495#define C_028350_SC_YSEL 0xFFCFFFFF 5496#define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0x00 5497#define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 0x01 5498#define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 0x02 5499#define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 0x03 5500#define S_028350_SE_MAP(x) (((unsigned)(x) & 0x03) << 24) 5501#define G_028350_SE_MAP(x) (((x) >> 24) & 0x03) 5502#define C_028350_SE_MAP 0xFCFFFFFF 5503#define V_028350_RASTER_CONFIG_SE_MAP_0 0x00 5504#define V_028350_RASTER_CONFIG_SE_MAP_1 0x01 5505#define V_028350_RASTER_CONFIG_SE_MAP_2 0x02 5506#define V_028350_RASTER_CONFIG_SE_MAP_3 0x03 5507#define S_028350_SE_XSEL(x) (((unsigned)(x) & 0x03) << 26) 5508#define G_028350_SE_XSEL(x) (((x) >> 26) & 0x03) 5509#define C_028350_SE_XSEL 0xF3FFFFFF 5510#define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0x00 5511#define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 0x01 5512#define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 0x02 5513#define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 0x03 5514#define S_028350_SE_YSEL(x) (((unsigned)(x) & 0x03) << 28) 5515#define G_028350_SE_YSEL(x) (((x) >> 28) & 0x03) 5516#define C_028350_SE_YSEL 0xCFFFFFFF 5517#define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0x00 5518#define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 0x01 5519#define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 0x02 5520#define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 0x03 5521/* CIK */ 5522#define R_028354_PA_SC_RASTER_CONFIG_1 0x028354 5523#define S_028354_SE_PAIR_MAP(x) (((unsigned)(x) & 0x03) << 0) 5524#define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x03) 5525#define C_028354_SE_PAIR_MAP 0xFFFFFFFC 5526#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0x00 5527#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 0x01 5528#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 0x02 5529#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 0x03 5530#define S_028354_SE_PAIR_XSEL(x) (((unsigned)(x) & 0x03) << 2) 5531#define G_028354_SE_PAIR_XSEL(x) (((x) >> 2) & 0x03) 5532#define C_028354_SE_PAIR_XSEL 0xFFFFFFF3 5533#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0x00 5534#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 0x01 5535#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 0x02 5536#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 0x03 5537#define S_028354_SE_PAIR_YSEL(x) (((unsigned)(x) & 0x03) << 4) 5538#define G_028354_SE_PAIR_YSEL(x) (((x) >> 4) & 0x03) 5539#define C_028354_SE_PAIR_YSEL 0xFFFFFFCF 5540#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0x00 5541#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 0x01 5542#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 0x02 5543#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 0x03 5544#define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358 5545#define S_028358_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x03) << 0) 5546#define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x03) 5547#define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC 5548#define S_028358_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x03) << 2) 5549#define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x03) 5550#define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3 5551/* */ 5552#define R_028400_VGT_MAX_VTX_INDX 0x028400 5553#define R_028404_VGT_MIN_VTX_INDX 0x028404 5554#define R_028408_VGT_INDX_OFFSET 0x028408 5555#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C 5556#define R_028414_CB_BLEND_RED 0x028414 5557#define R_028418_CB_BLEND_GREEN 0x028418 5558#define R_02841C_CB_BLEND_BLUE 0x02841C 5559#define R_028420_CB_BLEND_ALPHA 0x028420 5560/* VI */ 5561#define R_028424_CB_DCC_CONTROL 0x028424 5562#define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 5563#define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 5564#define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 5565#define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 5566#define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1) 5567#define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD 5568#define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2) 5569#define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F) 5570#define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83 5571/* */ 5572#define R_02842C_DB_STENCIL_CONTROL 0x02842C 5573#define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0x0F) << 0) 5574#define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F) 5575#define C_02842C_STENCILFAIL 0xFFFFFFF0 5576#define V_02842C_STENCIL_KEEP 0x00 5577#define V_02842C_STENCIL_ZERO 0x01 5578#define V_02842C_STENCIL_ONES 0x02 5579#define V_02842C_STENCIL_REPLACE_TEST 0x03 5580#define V_02842C_STENCIL_REPLACE_OP 0x04 5581#define V_02842C_STENCIL_ADD_CLAMP 0x05 5582#define V_02842C_STENCIL_SUB_CLAMP 0x06 5583#define V_02842C_STENCIL_INVERT 0x07 5584#define V_02842C_STENCIL_ADD_WRAP 0x08 5585#define V_02842C_STENCIL_SUB_WRAP 0x09 5586#define V_02842C_STENCIL_AND 0x0A 5587#define V_02842C_STENCIL_OR 0x0B 5588#define V_02842C_STENCIL_XOR 0x0C 5589#define V_02842C_STENCIL_NAND 0x0D 5590#define V_02842C_STENCIL_NOR 0x0E 5591#define V_02842C_STENCIL_XNOR 0x0F 5592#define S_02842C_STENCILZPASS(x) (((unsigned)(x) & 0x0F) << 4) 5593#define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0x0F) 5594#define C_02842C_STENCILZPASS 0xFFFFFF0F 5595#define V_02842C_STENCIL_KEEP 0x00 5596#define V_02842C_STENCIL_ZERO 0x01 5597#define V_02842C_STENCIL_ONES 0x02 5598#define V_02842C_STENCIL_REPLACE_TEST 0x03 5599#define V_02842C_STENCIL_REPLACE_OP 0x04 5600#define V_02842C_STENCIL_ADD_CLAMP 0x05 5601#define V_02842C_STENCIL_SUB_CLAMP 0x06 5602#define V_02842C_STENCIL_INVERT 0x07 5603#define V_02842C_STENCIL_ADD_WRAP 0x08 5604#define V_02842C_STENCIL_SUB_WRAP 0x09 5605#define V_02842C_STENCIL_AND 0x0A 5606#define V_02842C_STENCIL_OR 0x0B 5607#define V_02842C_STENCIL_XOR 0x0C 5608#define V_02842C_STENCIL_NAND 0x0D 5609#define V_02842C_STENCIL_NOR 0x0E 5610#define V_02842C_STENCIL_XNOR 0x0F 5611#define S_02842C_STENCILZFAIL(x) (((unsigned)(x) & 0x0F) << 8) 5612#define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0x0F) 5613#define C_02842C_STENCILZFAIL 0xFFFFF0FF 5614#define V_02842C_STENCIL_KEEP 0x00 5615#define V_02842C_STENCIL_ZERO 0x01 5616#define V_02842C_STENCIL_ONES 0x02 5617#define V_02842C_STENCIL_REPLACE_TEST 0x03 5618#define V_02842C_STENCIL_REPLACE_OP 0x04 5619#define V_02842C_STENCIL_ADD_CLAMP 0x05 5620#define V_02842C_STENCIL_SUB_CLAMP 0x06 5621#define V_02842C_STENCIL_INVERT 0x07 5622#define V_02842C_STENCIL_ADD_WRAP 0x08 5623#define V_02842C_STENCIL_SUB_WRAP 0x09 5624#define V_02842C_STENCIL_AND 0x0A 5625#define V_02842C_STENCIL_OR 0x0B 5626#define V_02842C_STENCIL_XOR 0x0C 5627#define V_02842C_STENCIL_NAND 0x0D 5628#define V_02842C_STENCIL_NOR 0x0E 5629#define V_02842C_STENCIL_XNOR 0x0F 5630#define S_02842C_STENCILFAIL_BF(x) (((unsigned)(x) & 0x0F) << 12) 5631#define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0x0F) 5632#define C_02842C_STENCILFAIL_BF 0xFFFF0FFF 5633#define V_02842C_STENCIL_KEEP 0x00 5634#define V_02842C_STENCIL_ZERO 0x01 5635#define V_02842C_STENCIL_ONES 0x02 5636#define V_02842C_STENCIL_REPLACE_TEST 0x03 5637#define V_02842C_STENCIL_REPLACE_OP 0x04 5638#define V_02842C_STENCIL_ADD_CLAMP 0x05 5639#define V_02842C_STENCIL_SUB_CLAMP 0x06 5640#define V_02842C_STENCIL_INVERT 0x07 5641#define V_02842C_STENCIL_ADD_WRAP 0x08 5642#define V_02842C_STENCIL_SUB_WRAP 0x09 5643#define V_02842C_STENCIL_AND 0x0A 5644#define V_02842C_STENCIL_OR 0x0B 5645#define V_02842C_STENCIL_XOR 0x0C 5646#define V_02842C_STENCIL_NAND 0x0D 5647#define V_02842C_STENCIL_NOR 0x0E 5648#define V_02842C_STENCIL_XNOR 0x0F 5649#define S_02842C_STENCILZPASS_BF(x) (((unsigned)(x) & 0x0F) << 16) 5650#define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0x0F) 5651#define C_02842C_STENCILZPASS_BF 0xFFF0FFFF 5652#define V_02842C_STENCIL_KEEP 0x00 5653#define V_02842C_STENCIL_ZERO 0x01 5654#define V_02842C_STENCIL_ONES 0x02 5655#define V_02842C_STENCIL_REPLACE_TEST 0x03 5656#define V_02842C_STENCIL_REPLACE_OP 0x04 5657#define V_02842C_STENCIL_ADD_CLAMP 0x05 5658#define V_02842C_STENCIL_SUB_CLAMP 0x06 5659#define V_02842C_STENCIL_INVERT 0x07 5660#define V_02842C_STENCIL_ADD_WRAP 0x08 5661#define V_02842C_STENCIL_SUB_WRAP 0x09 5662#define V_02842C_STENCIL_AND 0x0A 5663#define V_02842C_STENCIL_OR 0x0B 5664#define V_02842C_STENCIL_XOR 0x0C 5665#define V_02842C_STENCIL_NAND 0x0D 5666#define V_02842C_STENCIL_NOR 0x0E 5667#define V_02842C_STENCIL_XNOR 0x0F 5668#define S_02842C_STENCILZFAIL_BF(x) (((unsigned)(x) & 0x0F) << 20) 5669#define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0x0F) 5670#define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF 5671#define V_02842C_STENCIL_KEEP 0x00 5672#define V_02842C_STENCIL_ZERO 0x01 5673#define V_02842C_STENCIL_ONES 0x02 5674#define V_02842C_STENCIL_REPLACE_TEST 0x03 5675#define V_02842C_STENCIL_REPLACE_OP 0x04 5676#define V_02842C_STENCIL_ADD_CLAMP 0x05 5677#define V_02842C_STENCIL_SUB_CLAMP 0x06 5678#define V_02842C_STENCIL_INVERT 0x07 5679#define V_02842C_STENCIL_ADD_WRAP 0x08 5680#define V_02842C_STENCIL_SUB_WRAP 0x09 5681#define V_02842C_STENCIL_AND 0x0A 5682#define V_02842C_STENCIL_OR 0x0B 5683#define V_02842C_STENCIL_XOR 0x0C 5684#define V_02842C_STENCIL_NAND 0x0D 5685#define V_02842C_STENCIL_NOR 0x0E 5686#define V_02842C_STENCIL_XNOR 0x0F 5687#define R_028430_DB_STENCILREFMASK 0x028430 5688#define S_028430_STENCILTESTVAL(x) (((unsigned)(x) & 0xFF) << 0) 5689#define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF) 5690#define C_028430_STENCILTESTVAL 0xFFFFFF00 5691#define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) 5692#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) 5693#define C_028430_STENCILMASK 0xFFFF00FF 5694#define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) 5695#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) 5696#define C_028430_STENCILWRITEMASK 0xFF00FFFF 5697#define S_028430_STENCILOPVAL(x) (((unsigned)(x) & 0xFF) << 24) 5698#define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF) 5699#define C_028430_STENCILOPVAL 0x00FFFFFF 5700#define R_028434_DB_STENCILREFMASK_BF 0x028434 5701#define S_028434_STENCILTESTVAL_BF(x) (((unsigned)(x) & 0xFF) << 0) 5702#define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF) 5703#define C_028434_STENCILTESTVAL_BF 0xFFFFFF00 5704#define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) 5705#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) 5706#define C_028434_STENCILMASK_BF 0xFFFF00FF 5707#define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) 5708#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) 5709#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF 5710#define S_028434_STENCILOPVAL_BF(x) (((unsigned)(x) & 0xFF) << 24) 5711#define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF) 5712#define C_028434_STENCILOPVAL_BF 0x00FFFFFF 5713#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C 5714#define R_028440_PA_CL_VPORT_XOFFSET 0x028440 5715#define R_028444_PA_CL_VPORT_YSCALE 0x028444 5716#define R_028448_PA_CL_VPORT_YOFFSET 0x028448 5717#define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C 5718#define R_028450_PA_CL_VPORT_ZOFFSET 0x028450 5719#define R_028454_PA_CL_VPORT_XSCALE_1 0x028454 5720#define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458 5721#define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C 5722#define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460 5723#define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464 5724#define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468 5725#define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C 5726#define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470 5727#define R_028474_PA_CL_VPORT_YSCALE_2 0x028474 5728#define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478 5729#define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C 5730#define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480 5731#define R_028484_PA_CL_VPORT_XSCALE_3 0x028484 5732#define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488 5733#define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C 5734#define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490 5735#define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494 5736#define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498 5737#define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C 5738#define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0 5739#define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4 5740#define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8 5741#define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC 5742#define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0 5743#define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4 5744#define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8 5745#define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC 5746#define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0 5747#define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4 5748#define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8 5749#define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC 5750#define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0 5751#define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4 5752#define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8 5753#define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC 5754#define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0 5755#define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4 5756#define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8 5757#define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC 5758#define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0 5759#define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4 5760#define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8 5761#define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC 5762#define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500 5763#define R_028504_PA_CL_VPORT_YSCALE_8 0x028504 5764#define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508 5765#define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C 5766#define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510 5767#define R_028514_PA_CL_VPORT_XSCALE_9 0x028514 5768#define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518 5769#define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C 5770#define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520 5771#define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524 5772#define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528 5773#define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C 5774#define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530 5775#define R_028534_PA_CL_VPORT_YSCALE_10 0x028534 5776#define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538 5777#define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C 5778#define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540 5779#define R_028544_PA_CL_VPORT_XSCALE_11 0x028544 5780#define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548 5781#define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C 5782#define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550 5783#define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554 5784#define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558 5785#define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C 5786#define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560 5787#define R_028564_PA_CL_VPORT_YSCALE_12 0x028564 5788#define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568 5789#define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C 5790#define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570 5791#define R_028574_PA_CL_VPORT_XSCALE_13 0x028574 5792#define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578 5793#define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C 5794#define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580 5795#define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584 5796#define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588 5797#define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C 5798#define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590 5799#define R_028594_PA_CL_VPORT_YSCALE_14 0x028594 5800#define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598 5801#define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C 5802#define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0 5803#define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4 5804#define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8 5805#define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC 5806#define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0 5807#define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4 5808#define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8 5809#define R_0285BC_PA_CL_UCP_0_X 0x0285BC 5810#define R_0285C0_PA_CL_UCP_0_Y 0x0285C0 5811#define R_0285C4_PA_CL_UCP_0_Z 0x0285C4 5812#define R_0285C8_PA_CL_UCP_0_W 0x0285C8 5813#define R_0285CC_PA_CL_UCP_1_X 0x0285CC 5814#define R_0285D0_PA_CL_UCP_1_Y 0x0285D0 5815#define R_0285D4_PA_CL_UCP_1_Z 0x0285D4 5816#define R_0285D8_PA_CL_UCP_1_W 0x0285D8 5817#define R_0285DC_PA_CL_UCP_2_X 0x0285DC 5818#define R_0285E0_PA_CL_UCP_2_Y 0x0285E0 5819#define R_0285E4_PA_CL_UCP_2_Z 0x0285E4 5820#define R_0285E8_PA_CL_UCP_2_W 0x0285E8 5821#define R_0285EC_PA_CL_UCP_3_X 0x0285EC 5822#define R_0285F0_PA_CL_UCP_3_Y 0x0285F0 5823#define R_0285F4_PA_CL_UCP_3_Z 0x0285F4 5824#define R_0285F8_PA_CL_UCP_3_W 0x0285F8 5825#define R_0285FC_PA_CL_UCP_4_X 0x0285FC 5826#define R_028600_PA_CL_UCP_4_Y 0x028600 5827#define R_028604_PA_CL_UCP_4_Z 0x028604 5828#define R_028608_PA_CL_UCP_4_W 0x028608 5829#define R_02860C_PA_CL_UCP_5_X 0x02860C 5830#define R_028610_PA_CL_UCP_5_Y 0x028610 5831#define R_028614_PA_CL_UCP_5_Z 0x028614 5832#define R_028618_PA_CL_UCP_5_W 0x028618 5833#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 5834#define S_028644_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) 5835#define G_028644_OFFSET(x) (((x) >> 0) & 0x3F) 5836#define C_028644_OFFSET 0xFFFFFFC0 5837#define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x03) << 8) 5838#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x03) 5839#define C_028644_DEFAULT_VAL 0xFFFFFCFF 5840#define V_028644_X_0_0F 0x00 5841#define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) 5842#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) 5843#define C_028644_FLAT_SHADE 0xFFFFFBFF 5844#define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0x0F) << 13) 5845#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0x0F) 5846#define C_028644_CYL_WRAP 0xFFFE1FFF 5847#define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) 5848#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) 5849#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF 5850/* CIK */ 5851#define S_028644_DUP(x) (((unsigned)(x) & 0x1) << 18) 5852#define G_028644_DUP(x) (((x) >> 18) & 0x1) 5853#define C_028644_DUP 0xFFFBFFFF 5854/* */ 5855/* VI */ 5856#define S_028644_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) 5857#define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) 5858#define C_028644_FP16_INTERP_MODE 0xFFF7FFFF 5859#define S_028644_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) 5860#define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) 5861#define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF 5862#define S_028644_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x03) << 21) 5863#define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x03) 5864#define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF 5865#define S_028644_PT_SPRITE_TEX_ATTR1(x) (((unsigned)(x) & 0x1) << 23) 5866#define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1) 5867#define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF 5868#define S_028644_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) 5869#define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1) 5870#define C_028644_ATTR0_VALID 0xFEFFFFFF 5871#define S_028644_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) 5872#define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1) 5873#define C_028644_ATTR1_VALID 0xFDFFFFFF 5874/* */ 5875#define R_028648_SPI_PS_INPUT_CNTL_1 0x028648 5876#define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C 5877#define R_028650_SPI_PS_INPUT_CNTL_3 0x028650 5878#define R_028654_SPI_PS_INPUT_CNTL_4 0x028654 5879#define R_028658_SPI_PS_INPUT_CNTL_5 0x028658 5880#define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C 5881#define R_028660_SPI_PS_INPUT_CNTL_7 0x028660 5882#define R_028664_SPI_PS_INPUT_CNTL_8 0x028664 5883#define R_028668_SPI_PS_INPUT_CNTL_9 0x028668 5884#define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C 5885#define R_028670_SPI_PS_INPUT_CNTL_11 0x028670 5886#define R_028674_SPI_PS_INPUT_CNTL_12 0x028674 5887#define R_028678_SPI_PS_INPUT_CNTL_13 0x028678 5888#define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C 5889#define R_028680_SPI_PS_INPUT_CNTL_15 0x028680 5890#define R_028684_SPI_PS_INPUT_CNTL_16 0x028684 5891#define R_028688_SPI_PS_INPUT_CNTL_17 0x028688 5892#define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C 5893#define R_028690_SPI_PS_INPUT_CNTL_19 0x028690 5894#define R_028694_SPI_PS_INPUT_CNTL_20 0x028694 5895#define R_028698_SPI_PS_INPUT_CNTL_21 0x028698 5896#define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C 5897#define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0 5898#define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4 5899#define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8 5900#define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC 5901#define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0 5902#define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4 5903#define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8 5904#define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC 5905#define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0 5906#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 5907#define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) 5908#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) 5909#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 5910#define S_0286C4_VS_HALF_PACK(x) (((unsigned)(x) & 0x1) << 6) 5911#define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1) 5912#define C_0286C4_VS_HALF_PACK 0xFFFFFFBF 5913#define S_0286C4_VS_EXPORTS_FOG(x) (((unsigned)(x) & 0x1) << 7) /* not on CIK */ 5914#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 7) & 0x1) /* not on CIK */ 5915#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFF7F /* not on CIK */ 5916#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((unsigned)(x) & 0x1F) << 8) /* not on CIK */ 5917#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 8) & 0x1F) /* not on CIK */ 5918#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFE0FF /* not on CIK */ 5919#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC 5920#define S_0286CC_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 5921#define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 5922#define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE 5923#define S_0286CC_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 5924#define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 5925#define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD 5926#define S_0286CC_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 5927#define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 5928#define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB 5929#define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 5930#define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 5931#define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 5932#define S_0286CC_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 5933#define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 5934#define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF 5935#define S_0286CC_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 5936#define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 5937#define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF 5938#define S_0286CC_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 5939#define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 5940#define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF 5941#define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 5942#define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 5943#define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 5944#define S_0286CC_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 5945#define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 5946#define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF 5947#define S_0286CC_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 5948#define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 5949#define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF 5950#define S_0286CC_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 5951#define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 5952#define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF 5953#define S_0286CC_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 5954#define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 5955#define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF 5956#define S_0286CC_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 5957#define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 5958#define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF 5959#define S_0286CC_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 5960#define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 5961#define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF 5962#define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 5963#define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 5964#define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 5965#define S_0286CC_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 5966#define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 5967#define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF 5968#define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 5969#define S_0286D0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 5970#define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 5971#define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE 5972#define S_0286D0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 5973#define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 5974#define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD 5975#define S_0286D0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 5976#define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 5977#define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB 5978#define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 5979#define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 5980#define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 5981#define S_0286D0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 5982#define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 5983#define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF 5984#define S_0286D0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 5985#define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 5986#define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF 5987#define S_0286D0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 5988#define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 5989#define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF 5990#define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 5991#define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 5992#define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 5993#define S_0286D0_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 5994#define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 5995#define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF 5996#define S_0286D0_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 5997#define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 5998#define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF 5999#define S_0286D0_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 6000#define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 6001#define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF 6002#define S_0286D0_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 6003#define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 6004#define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF 6005#define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 6006#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 6007#define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF 6008#define S_0286D0_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 6009#define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 6010#define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF 6011#define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 6012#define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 6013#define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 6014#define S_0286D0_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 6015#define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 6016#define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF 6017#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 6018#define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) 6019#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) 6020#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE 6021#define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) 6022#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) 6023#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD 6024#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x07) << 2) 6025#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x07) 6026#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 6027#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6028#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6029#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6030#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6031#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6032#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x07) << 5) 6033#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x07) 6034#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F 6035#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6036#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6037#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6038#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6039#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6040#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x07) << 8) 6041#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x07) 6042#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF 6043#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6044#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6045#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6046#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6047#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6048#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x07) << 11) 6049#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x07) 6050#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF 6051#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6052#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6053#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6054#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6055#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6056#define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) 6057#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) 6058#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF 6059#define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8 6060#define S_0286D8_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) 6061#define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F) 6062#define C_0286D8_NUM_INTERP 0xFFFFFFC0 6063#define S_0286D8_PARAM_GEN(x) (((unsigned)(x) & 0x1) << 6) 6064#define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1) 6065#define C_0286D8_PARAM_GEN 0xFFFFFFBF 6066#define S_0286D8_FOG_ADDR(x) (((unsigned)(x) & 0x7F) << 7) /* not on CIK */ 6067#define G_0286D8_FOG_ADDR(x) (((x) >> 7) & 0x7F) /* not on CIK */ 6068#define C_0286D8_FOG_ADDR 0xFFFFC07F /* not on CIK */ 6069#define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) 6070#define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1) 6071#define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF 6072#define S_0286D8_PASS_FOG_THROUGH_PS(x) (((unsigned)(x) & 0x1) << 15) /* not on CIK */ 6073#define G_0286D8_PASS_FOG_THROUGH_PS(x) (((x) >> 15) & 0x1) /* not on CIK */ 6074#define C_0286D8_PASS_FOG_THROUGH_PS 0xFFFF7FFF /* not on CIK */ 6075#define R_0286E0_SPI_BARYC_CNTL 0x0286E0 6076#define S_0286E0_PERSP_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 0) 6077#define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1) 6078#define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE 6079#define S_0286E0_PERSP_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 4) 6080#define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1) 6081#define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF 6082#define S_0286E0_LINEAR_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 8) 6083#define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1) 6084#define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF 6085#define S_0286E0_LINEAR_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 12) 6086#define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1) 6087#define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF 6088#define S_0286E0_POS_FLOAT_LOCATION(x) (((unsigned)(x) & 0x03) << 16) 6089#define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x03) 6090#define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF 6091#define V_0286E0_X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT 0x00 6092#define S_0286E0_POS_FLOAT_ULC(x) (((unsigned)(x) & 0x1) << 20) 6093#define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1) 6094#define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF 6095#define S_0286E0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 24) 6096#define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1) 6097#define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF 6098#define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 6099#define S_0286E8_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 6100#define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF) 6101#define C_0286E8_WAVES 0xFFFFF000 6102#define S_0286E8_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 6103#define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 6104#define C_0286E8_WAVESIZE 0xFE000FFF 6105#define R_028704_SPI_WAVE_MGMT_1 0x028704 /* not on CIK */ 6106#define S_028704_NUM_PS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) 6107#define G_028704_NUM_PS_WAVES(x) (((x) >> 0) & 0x3F) 6108#define C_028704_NUM_PS_WAVES 0xFFFFFFC0 6109#define S_028704_NUM_VS_WAVES(x) (((unsigned)(x) & 0x3F) << 6) 6110#define G_028704_NUM_VS_WAVES(x) (((x) >> 6) & 0x3F) 6111#define C_028704_NUM_VS_WAVES 0xFFFFF03F 6112#define S_028704_NUM_GS_WAVES(x) (((unsigned)(x) & 0x3F) << 12) 6113#define G_028704_NUM_GS_WAVES(x) (((x) >> 12) & 0x3F) 6114#define C_028704_NUM_GS_WAVES 0xFFFC0FFF 6115#define S_028704_NUM_ES_WAVES(x) (((unsigned)(x) & 0x3F) << 18) 6116#define G_028704_NUM_ES_WAVES(x) (((x) >> 18) & 0x3F) 6117#define C_028704_NUM_ES_WAVES 0xFF03FFFF 6118#define S_028704_NUM_HS_WAVES(x) (((unsigned)(x) & 0x3F) << 24) 6119#define G_028704_NUM_HS_WAVES(x) (((x) >> 24) & 0x3F) 6120#define C_028704_NUM_HS_WAVES 0xC0FFFFFF 6121#define R_028708_SPI_WAVE_MGMT_2 0x028708 /* not on CIK */ 6122#define S_028708_NUM_LS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) 6123#define G_028708_NUM_LS_WAVES(x) (((x) >> 0) & 0x3F) 6124#define C_028708_NUM_LS_WAVES 0xFFFFFFC0 6125#define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C 6126#define S_02870C_POS0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6127#define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6128#define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0 6129#define V_02870C_SPI_SHADER_NONE 0x00 6130#define V_02870C_SPI_SHADER_1COMP 0x01 6131#define V_02870C_SPI_SHADER_2COMP 0x02 6132#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6133#define V_02870C_SPI_SHADER_4COMP 0x04 6134#define S_02870C_POS1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) 6135#define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) 6136#define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F 6137#define V_02870C_SPI_SHADER_NONE 0x00 6138#define V_02870C_SPI_SHADER_1COMP 0x01 6139#define V_02870C_SPI_SHADER_2COMP 0x02 6140#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6141#define V_02870C_SPI_SHADER_4COMP 0x04 6142#define S_02870C_POS2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) 6143#define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) 6144#define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF 6145#define V_02870C_SPI_SHADER_NONE 0x00 6146#define V_02870C_SPI_SHADER_1COMP 0x01 6147#define V_02870C_SPI_SHADER_2COMP 0x02 6148#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6149#define V_02870C_SPI_SHADER_4COMP 0x04 6150#define S_02870C_POS3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) 6151#define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) 6152#define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF 6153#define V_02870C_SPI_SHADER_NONE 0x00 6154#define V_02870C_SPI_SHADER_1COMP 0x01 6155#define V_02870C_SPI_SHADER_2COMP 0x02 6156#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6157#define V_02870C_SPI_SHADER_4COMP 0x04 6158#define R_028710_SPI_SHADER_Z_FORMAT 0x028710 6159#define S_028710_Z_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6160#define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6161#define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0 6162#define V_028710_SPI_SHADER_ZERO 0x00 6163#define V_028710_SPI_SHADER_32_R 0x01 6164#define V_028710_SPI_SHADER_32_GR 0x02 6165#define V_028710_SPI_SHADER_32_AR 0x03 6166#define V_028710_SPI_SHADER_FP16_ABGR 0x04 6167#define V_028710_SPI_SHADER_UNORM16_ABGR 0x05 6168#define V_028710_SPI_SHADER_SNORM16_ABGR 0x06 6169#define V_028710_SPI_SHADER_UINT16_ABGR 0x07 6170#define V_028710_SPI_SHADER_SINT16_ABGR 0x08 6171#define V_028710_SPI_SHADER_32_ABGR 0x09 6172#define R_028714_SPI_SHADER_COL_FORMAT 0x028714 6173#define S_028714_COL0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6174#define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6175#define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0 6176#define V_028714_SPI_SHADER_ZERO 0x00 6177#define V_028714_SPI_SHADER_32_R 0x01 6178#define V_028714_SPI_SHADER_32_GR 0x02 6179#define V_028714_SPI_SHADER_32_AR 0x03 6180#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6181#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6182#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6183#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6184#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6185#define V_028714_SPI_SHADER_32_ABGR 0x09 6186#define S_028714_COL1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) 6187#define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) 6188#define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F 6189#define V_028714_SPI_SHADER_ZERO 0x00 6190#define V_028714_SPI_SHADER_32_R 0x01 6191#define V_028714_SPI_SHADER_32_GR 0x02 6192#define V_028714_SPI_SHADER_32_AR 0x03 6193#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6194#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6195#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6196#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6197#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6198#define V_028714_SPI_SHADER_32_ABGR 0x09 6199#define S_028714_COL2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) 6200#define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) 6201#define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF 6202#define V_028714_SPI_SHADER_ZERO 0x00 6203#define V_028714_SPI_SHADER_32_R 0x01 6204#define V_028714_SPI_SHADER_32_GR 0x02 6205#define V_028714_SPI_SHADER_32_AR 0x03 6206#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6207#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6208#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6209#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6210#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6211#define V_028714_SPI_SHADER_32_ABGR 0x09 6212#define S_028714_COL3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) 6213#define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) 6214#define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF 6215#define V_028714_SPI_SHADER_ZERO 0x00 6216#define V_028714_SPI_SHADER_32_R 0x01 6217#define V_028714_SPI_SHADER_32_GR 0x02 6218#define V_028714_SPI_SHADER_32_AR 0x03 6219#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6220#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6221#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6222#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6223#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6224#define V_028714_SPI_SHADER_32_ABGR 0x09 6225#define S_028714_COL4_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 16) 6226#define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0x0F) 6227#define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF 6228#define V_028714_SPI_SHADER_ZERO 0x00 6229#define V_028714_SPI_SHADER_32_R 0x01 6230#define V_028714_SPI_SHADER_32_GR 0x02 6231#define V_028714_SPI_SHADER_32_AR 0x03 6232#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6233#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6234#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6235#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6236#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6237#define V_028714_SPI_SHADER_32_ABGR 0x09 6238#define S_028714_COL5_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 20) 6239#define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0x0F) 6240#define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF 6241#define V_028714_SPI_SHADER_ZERO 0x00 6242#define V_028714_SPI_SHADER_32_R 0x01 6243#define V_028714_SPI_SHADER_32_GR 0x02 6244#define V_028714_SPI_SHADER_32_AR 0x03 6245#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6246#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6247#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6248#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6249#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6250#define V_028714_SPI_SHADER_32_ABGR 0x09 6251#define S_028714_COL6_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 24) 6252#define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0x0F) 6253#define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF 6254#define V_028714_SPI_SHADER_ZERO 0x00 6255#define V_028714_SPI_SHADER_32_R 0x01 6256#define V_028714_SPI_SHADER_32_GR 0x02 6257#define V_028714_SPI_SHADER_32_AR 0x03 6258#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6259#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6260#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6261#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6262#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6263#define V_028714_SPI_SHADER_32_ABGR 0x09 6264#define S_028714_COL7_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 28) 6265#define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0x0F) 6266#define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF 6267#define V_028714_SPI_SHADER_ZERO 0x00 6268#define V_028714_SPI_SHADER_32_R 0x01 6269#define V_028714_SPI_SHADER_32_GR 0x02 6270#define V_028714_SPI_SHADER_32_AR 0x03 6271#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6272#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6273#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6274#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6275#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6276#define V_028714_SPI_SHADER_32_ABGR 0x09 6277/* Stoney */ 6278#define R_028754_SX_PS_DOWNCONVERT 0x028754 6279#define S_028754_MRT0(x) (((unsigned)(x) & 0x0F) << 0) 6280#define G_028754_MRT0(x) (((x) >> 0) & 0x0F) 6281#define C_028754_MRT0 0xFFFFFFF0 6282#define V_028754_SX_RT_EXPORT_NO_CONVERSION 0 6283#define V_028754_SX_RT_EXPORT_32_R 1 6284#define V_028754_SX_RT_EXPORT_32_A 2 6285#define V_028754_SX_RT_EXPORT_10_11_11 3 6286#define V_028754_SX_RT_EXPORT_2_10_10_10 4 6287#define V_028754_SX_RT_EXPORT_8_8_8_8 5 6288#define V_028754_SX_RT_EXPORT_5_6_5 6 6289#define V_028754_SX_RT_EXPORT_1_5_5_5 7 6290#define V_028754_SX_RT_EXPORT_4_4_4_4 8 6291#define V_028754_SX_RT_EXPORT_16_16_GR 9 6292#define V_028754_SX_RT_EXPORT_16_16_AR 10 6293#define S_028754_MRT1(x) (((unsigned)(x) & 0x0F) << 4) 6294#define G_028754_MRT1(x) (((x) >> 4) & 0x0F) 6295#define C_028754_MRT1 0xFFFFFF0F 6296#define S_028754_MRT2(x) (((unsigned)(x) & 0x0F) << 8) 6297#define G_028754_MRT2(x) (((x) >> 8) & 0x0F) 6298#define C_028754_MRT2 0xFFFFF0FF 6299#define S_028754_MRT3(x) (((unsigned)(x) & 0x0F) << 12) 6300#define G_028754_MRT3(x) (((x) >> 12) & 0x0F) 6301#define C_028754_MRT3 0xFFFF0FFF 6302#define S_028754_MRT4(x) (((unsigned)(x) & 0x0F) << 16) 6303#define G_028754_MRT4(x) (((x) >> 16) & 0x0F) 6304#define C_028754_MRT4 0xFFF0FFFF 6305#define S_028754_MRT5(x) (((unsigned)(x) & 0x0F) << 20) 6306#define G_028754_MRT5(x) (((x) >> 20) & 0x0F) 6307#define C_028754_MRT5 0xFF0FFFFF 6308#define S_028754_MRT6(x) (((unsigned)(x) & 0x0F) << 24) 6309#define G_028754_MRT6(x) (((x) >> 24) & 0x0F) 6310#define C_028754_MRT6 0xF0FFFFFF 6311#define S_028754_MRT7(x) (((unsigned)(x) & 0x0F) << 28) 6312#define G_028754_MRT7(x) (((x) >> 28) & 0x0F) 6313#define C_028754_MRT7 0x0FFFFFFF 6314#define R_028758_SX_BLEND_OPT_EPSILON 0x028758 6315#define S_028758_MRT0_EPSILON(x) (((unsigned)(x) & 0x0F) << 0) 6316#define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0x0F) 6317#define C_028758_MRT0_EPSILON 0xFFFFFFF0 6318#define V_028758_EXACT 0 6319#define V_028758_11BIT_FORMAT 1 6320#define V_028758_10BIT_FORMAT 3 6321#define V_028758_8BIT_FORMAT 7 6322#define V_028758_6BIT_FORMAT 11 6323#define V_028758_5BIT_FORMAT 13 6324#define V_028758_4BIT_FORMAT 15 6325#define S_028758_MRT1_EPSILON(x) (((unsigned)(x) & 0x0F) << 4) 6326#define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0x0F) 6327#define C_028758_MRT1_EPSILON 0xFFFFFF0F 6328#define S_028758_MRT2_EPSILON(x) (((unsigned)(x) & 0x0F) << 8) 6329#define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0x0F) 6330#define C_028758_MRT2_EPSILON 0xFFFFF0FF 6331#define S_028758_MRT3_EPSILON(x) (((unsigned)(x) & 0x0F) << 12) 6332#define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0x0F) 6333#define C_028758_MRT3_EPSILON 0xFFFF0FFF 6334#define S_028758_MRT4_EPSILON(x) (((unsigned)(x) & 0x0F) << 16) 6335#define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0x0F) 6336#define C_028758_MRT4_EPSILON 0xFFF0FFFF 6337#define S_028758_MRT5_EPSILON(x) (((unsigned)(x) & 0x0F) << 20) 6338#define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0x0F) 6339#define C_028758_MRT5_EPSILON 0xFF0FFFFF 6340#define S_028758_MRT6_EPSILON(x) (((unsigned)(x) & 0x0F) << 24) 6341#define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0x0F) 6342#define C_028758_MRT6_EPSILON 0xF0FFFFFF 6343#define S_028758_MRT7_EPSILON(x) (((unsigned)(x) & 0x0F) << 28) 6344#define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0x0F) 6345#define C_028758_MRT7_EPSILON 0x0FFFFFFF 6346#define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C 6347#define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 6348#define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1) 6349#define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE 6350#define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 6351#define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1) 6352#define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD 6353#define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 6354#define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1) 6355#define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF 6356#define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 6357#define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1) 6358#define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF 6359#define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 6360#define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1) 6361#define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF 6362#define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 6363#define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1) 6364#define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF 6365#define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 6366#define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1) 6367#define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF 6368#define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 13) 6369#define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1) 6370#define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF 6371#define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 6372#define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1) 6373#define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF 6374#define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 17) 6375#define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1) 6376#define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF 6377#define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 20) 6378#define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1) 6379#define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF 6380#define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 6381#define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1) 6382#define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF 6383#define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 6384#define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1) 6385#define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF 6386#define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 6387#define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1) 6388#define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF 6389#define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 28) 6390#define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1) 6391#define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF 6392#define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 6393#define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1) 6394#define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF 6395#define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 6396#define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1) 6397#define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF 6398#define R_028760_SX_MRT0_BLEND_OPT 0x028760 6399#define S_028760_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6400#define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6401#define C_028760_COLOR_SRC_OPT 0xFFFFFFF8 6402#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0 6403#define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1 6404#define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2 6405#define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3 6406#define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4 6407#define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5 6408#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6 6409#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7 6410#define S_028760_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6411#define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6412#define C_028760_COLOR_DST_OPT 0xFFFFFF8F 6413#define S_028760_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6414#define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6415#define C_028760_COLOR_COMB_FCN 0xFFFFF8FF 6416#define V_028760_OPT_COMB_NONE 0 6417#define V_028760_OPT_COMB_ADD 1 6418#define V_028760_OPT_COMB_SUBTRACT 2 6419#define V_028760_OPT_COMB_MIN 3 6420#define V_028760_OPT_COMB_MAX 4 6421#define V_028760_OPT_COMB_REVSUBTRACT 5 6422#define V_028760_OPT_COMB_BLEND_DISABLED 6 6423#define V_028760_OPT_COMB_SAFE_ADD 7 6424#define S_028760_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6425#define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6426#define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF 6427#define S_028760_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6428#define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6429#define C_028760_ALPHA_DST_OPT 0xFF8FFFFF 6430#define S_028760_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6431#define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6432#define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF 6433#define R_028764_SX_MRT1_BLEND_OPT 0x028764 6434#define S_028764_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6435#define G_028764_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6436#define C_028764_COLOR_SRC_OPT 0xFFFFFFF8 6437#define S_028764_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6438#define G_028764_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6439#define C_028764_COLOR_DST_OPT 0xFFFFFF8F 6440#define S_028764_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6441#define G_028764_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6442#define C_028764_COLOR_COMB_FCN 0xFFFFF8FF 6443#define S_028764_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6444#define G_028764_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6445#define C_028764_ALPHA_SRC_OPT 0xFFF8FFFF 6446#define S_028764_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6447#define G_028764_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6448#define C_028764_ALPHA_DST_OPT 0xFF8FFFFF 6449#define S_028764_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6450#define G_028764_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6451#define C_028764_ALPHA_COMB_FCN 0xF8FFFFFF 6452#define R_028768_SX_MRT2_BLEND_OPT 0x028768 6453#define S_028768_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6454#define G_028768_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6455#define C_028768_COLOR_SRC_OPT 0xFFFFFFF8 6456#define S_028768_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6457#define G_028768_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6458#define C_028768_COLOR_DST_OPT 0xFFFFFF8F 6459#define S_028768_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6460#define G_028768_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6461#define C_028768_COLOR_COMB_FCN 0xFFFFF8FF 6462#define S_028768_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6463#define G_028768_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6464#define C_028768_ALPHA_SRC_OPT 0xFFF8FFFF 6465#define S_028768_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6466#define G_028768_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6467#define C_028768_ALPHA_DST_OPT 0xFF8FFFFF 6468#define S_028768_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6469#define G_028768_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6470#define C_028768_ALPHA_COMB_FCN 0xF8FFFFFF 6471#define R_02876C_SX_MRT3_BLEND_OPT 0x02876C 6472#define S_02876C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6473#define G_02876C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6474#define C_02876C_COLOR_SRC_OPT 0xFFFFFFF8 6475#define S_02876C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6476#define G_02876C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6477#define C_02876C_COLOR_DST_OPT 0xFFFFFF8F 6478#define S_02876C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6479#define G_02876C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6480#define C_02876C_COLOR_COMB_FCN 0xFFFFF8FF 6481#define S_02876C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6482#define G_02876C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6483#define C_02876C_ALPHA_SRC_OPT 0xFFF8FFFF 6484#define S_02876C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6485#define G_02876C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6486#define C_02876C_ALPHA_DST_OPT 0xFF8FFFFF 6487#define S_02876C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6488#define G_02876C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6489#define C_02876C_ALPHA_COMB_FCN 0xF8FFFFFF 6490#define R_028770_SX_MRT4_BLEND_OPT 0x028770 6491#define S_028770_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6492#define G_028770_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6493#define C_028770_COLOR_SRC_OPT 0xFFFFFFF8 6494#define S_028770_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6495#define G_028770_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6496#define C_028770_COLOR_DST_OPT 0xFFFFFF8F 6497#define S_028770_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6498#define G_028770_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6499#define C_028770_COLOR_COMB_FCN 0xFFFFF8FF 6500#define S_028770_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6501#define G_028770_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6502#define C_028770_ALPHA_SRC_OPT 0xFFF8FFFF 6503#define S_028770_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6504#define G_028770_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6505#define C_028770_ALPHA_DST_OPT 0xFF8FFFFF 6506#define S_028770_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6507#define G_028770_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6508#define C_028770_ALPHA_COMB_FCN 0xF8FFFFFF 6509#define R_028774_SX_MRT5_BLEND_OPT 0x028774 6510#define S_028774_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6511#define G_028774_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6512#define C_028774_COLOR_SRC_OPT 0xFFFFFFF8 6513#define S_028774_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6514#define G_028774_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6515#define C_028774_COLOR_DST_OPT 0xFFFFFF8F 6516#define S_028774_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6517#define G_028774_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6518#define C_028774_COLOR_COMB_FCN 0xFFFFF8FF 6519#define S_028774_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6520#define G_028774_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6521#define C_028774_ALPHA_SRC_OPT 0xFFF8FFFF 6522#define S_028774_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6523#define G_028774_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6524#define C_028774_ALPHA_DST_OPT 0xFF8FFFFF 6525#define S_028774_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6526#define G_028774_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6527#define C_028774_ALPHA_COMB_FCN 0xF8FFFFFF 6528#define R_028778_SX_MRT6_BLEND_OPT 0x028778 6529#define S_028778_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6530#define G_028778_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6531#define C_028778_COLOR_SRC_OPT 0xFFFFFFF8 6532#define S_028778_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6533#define G_028778_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6534#define C_028778_COLOR_DST_OPT 0xFFFFFF8F 6535#define S_028778_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6536#define G_028778_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6537#define C_028778_COLOR_COMB_FCN 0xFFFFF8FF 6538#define S_028778_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6539#define G_028778_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6540#define C_028778_ALPHA_SRC_OPT 0xFFF8FFFF 6541#define S_028778_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6542#define G_028778_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6543#define C_028778_ALPHA_DST_OPT 0xFF8FFFFF 6544#define S_028778_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6545#define G_028778_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6546#define C_028778_ALPHA_COMB_FCN 0xF8FFFFFF 6547#define R_02877C_SX_MRT7_BLEND_OPT 0x02877C 6548#define S_02877C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6549#define G_02877C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6550#define C_02877C_COLOR_SRC_OPT 0xFFFFFFF8 6551#define S_02877C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6552#define G_02877C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6553#define C_02877C_COLOR_DST_OPT 0xFFFFFF8F 6554#define S_02877C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6555#define G_02877C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6556#define C_02877C_COLOR_COMB_FCN 0xFFFFF8FF 6557#define S_02877C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6558#define G_02877C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6559#define C_02877C_ALPHA_SRC_OPT 0xFFF8FFFF 6560#define S_02877C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6561#define G_02877C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6562#define C_02877C_ALPHA_DST_OPT 0xFF8FFFFF 6563#define S_02877C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6564#define G_02877C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6565#define C_02877C_ALPHA_COMB_FCN 0xF8FFFFFF 6566/* */ 6567#define R_028780_CB_BLEND0_CONTROL 0x028780 6568#define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) 6569#define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) 6570#define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 6571#define V_028780_BLEND_ZERO 0x00 6572#define V_028780_BLEND_ONE 0x01 6573#define V_028780_BLEND_SRC_COLOR 0x02 6574#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6575#define V_028780_BLEND_SRC_ALPHA 0x04 6576#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6577#define V_028780_BLEND_DST_ALPHA 0x06 6578#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6579#define V_028780_BLEND_DST_COLOR 0x08 6580#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6581#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6582#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6583#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6584#define V_028780_BLEND_SRC1_COLOR 0x0F 6585#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6586#define V_028780_BLEND_SRC1_ALPHA 0x11 6587#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6588#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6589#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6590#define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 5) 6591#define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x07) 6592#define C_028780_COLOR_COMB_FCN 0xFFFFFF1F 6593#define V_028780_COMB_DST_PLUS_SRC 0x00 6594#define V_028780_COMB_SRC_MINUS_DST 0x01 6595#define V_028780_COMB_MIN_DST_SRC 0x02 6596#define V_028780_COMB_MAX_DST_SRC 0x03 6597#define V_028780_COMB_DST_MINUS_SRC 0x04 6598#define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) 6599#define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) 6600#define C_028780_COLOR_DESTBLEND 0xFFFFE0FF 6601#define V_028780_BLEND_ZERO 0x00 6602#define V_028780_BLEND_ONE 0x01 6603#define V_028780_BLEND_SRC_COLOR 0x02 6604#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6605#define V_028780_BLEND_SRC_ALPHA 0x04 6606#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6607#define V_028780_BLEND_DST_ALPHA 0x06 6608#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6609#define V_028780_BLEND_DST_COLOR 0x08 6610#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6611#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6612#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6613#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6614#define V_028780_BLEND_SRC1_COLOR 0x0F 6615#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6616#define V_028780_BLEND_SRC1_ALPHA 0x11 6617#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6618#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6619#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6620#define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) 6621#define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) 6622#define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF 6623#define V_028780_BLEND_ZERO 0x00 6624#define V_028780_BLEND_ONE 0x01 6625#define V_028780_BLEND_SRC_COLOR 0x02 6626#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6627#define V_028780_BLEND_SRC_ALPHA 0x04 6628#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6629#define V_028780_BLEND_DST_ALPHA 0x06 6630#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6631#define V_028780_BLEND_DST_COLOR 0x08 6632#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6633#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6634#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6635#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6636#define V_028780_BLEND_SRC1_COLOR 0x0F 6637#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6638#define V_028780_BLEND_SRC1_ALPHA 0x11 6639#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6640#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6641#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6642#define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 21) 6643#define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x07) 6644#define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF 6645#define V_028780_COMB_DST_PLUS_SRC 0x00 6646#define V_028780_COMB_SRC_MINUS_DST 0x01 6647#define V_028780_COMB_MIN_DST_SRC 0x02 6648#define V_028780_COMB_MAX_DST_SRC 0x03 6649#define V_028780_COMB_DST_MINUS_SRC 0x04 6650#define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) 6651#define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) 6652#define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF 6653#define V_028780_BLEND_ZERO 0x00 6654#define V_028780_BLEND_ONE 0x01 6655#define V_028780_BLEND_SRC_COLOR 0x02 6656#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6657#define V_028780_BLEND_SRC_ALPHA 0x04 6658#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6659#define V_028780_BLEND_DST_ALPHA 0x06 6660#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6661#define V_028780_BLEND_DST_COLOR 0x08 6662#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6663#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6664#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6665#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6666#define V_028780_BLEND_SRC1_COLOR 0x0F 6667#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6668#define V_028780_BLEND_SRC1_ALPHA 0x11 6669#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6670#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6671#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6672#define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) 6673#define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) 6674#define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF 6675#define S_028780_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 6676#define G_028780_ENABLE(x) (((x) >> 30) & 0x1) 6677#define C_028780_ENABLE 0xBFFFFFFF 6678#define S_028780_DISABLE_ROP3(x) (((unsigned)(x) & 0x1) << 31) 6679#define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1) 6680#define C_028780_DISABLE_ROP3 0x7FFFFFFF 6681#define R_028784_CB_BLEND1_CONTROL 0x028784 6682#define R_028788_CB_BLEND2_CONTROL 0x028788 6683#define R_02878C_CB_BLEND3_CONTROL 0x02878C 6684#define R_028790_CB_BLEND4_CONTROL 0x028790 6685#define R_028794_CB_BLEND5_CONTROL 0x028794 6686#define R_028798_CB_BLEND6_CONTROL 0x028798 6687#define R_02879C_CB_BLEND7_CONTROL 0x02879C 6688#define R_0287CC_CS_COPY_STATE 0x0287CC 6689#define S_0287CC_SRC_STATE_ID(x) (((unsigned)(x) & 0x07) << 0) 6690#define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x07) 6691#define C_0287CC_SRC_STATE_ID 0xFFFFFFF8 6692#define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4 6693#define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8 6694#define R_0287DC_PA_CL_POINT_SIZE 0x0287DC 6695#define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0 6696#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 6697#define S_0287E4_BASE_ADDR(x) (((unsigned)(x) & 0xFF) << 0) 6698#define G_0287E4_BASE_ADDR(x) (((x) >> 0) & 0xFF) 6699#define C_0287E4_BASE_ADDR 0xFFFFFF00 6700#define R_0287E8_VGT_DMA_BASE 0x0287E8 6701#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 6702#define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x03) << 0) 6703#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x03) 6704#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC 6705#define V_0287F0_DI_SRC_SEL_DMA 0x00 6706#define V_0287F0_DI_SRC_SEL_IMMEDIATE 0x01 /* not on CIK */ 6707#define V_0287F0_DI_SRC_SEL_AUTO_INDEX 0x02 6708#define V_0287F0_DI_SRC_SEL_RESERVED 0x03 6709#define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x03) << 2) 6710#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x03) 6711#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 6712#define V_0287F0_DI_MAJOR_MODE_0 0x00 6713#define V_0287F0_DI_MAJOR_MODE_1 0x01 6714#define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) 6715#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) 6716#define C_0287F0_NOT_EOP 0xFFFFFFDF 6717#define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) 6718#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) 6719#define C_0287F0_USE_OPAQUE 0xFFFFFFBF 6720#define R_0287F4_VGT_IMMED_DATA 0x0287F4 /* not on CIK */ 6721#define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8 6722#define S_0287F8_ADDRESS_LOW(x) (((unsigned)(x) & 0xFFFFFFF) << 0) 6723#define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF) 6724#define C_0287F8_ADDRESS_LOW 0xF0000000 6725#define R_028800_DB_DEPTH_CONTROL 0x028800 6726#define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 6727#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) 6728#define C_028800_STENCIL_ENABLE 0xFFFFFFFE 6729#define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 6730#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) 6731#define C_028800_Z_ENABLE 0xFFFFFFFD 6732#define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 6733#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) 6734#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB 6735#define S_028800_DEPTH_BOUNDS_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 6736#define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1) 6737#define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7 6738#define S_028800_ZFUNC(x) (((unsigned)(x) & 0x07) << 4) 6739#define G_028800_ZFUNC(x) (((x) >> 4) & 0x07) 6740#define C_028800_ZFUNC 0xFFFFFF8F 6741#define V_028800_FRAG_NEVER 0x00 6742#define V_028800_FRAG_LESS 0x01 6743#define V_028800_FRAG_EQUAL 0x02 6744#define V_028800_FRAG_LEQUAL 0x03 6745#define V_028800_FRAG_GREATER 0x04 6746#define V_028800_FRAG_NOTEQUAL 0x05 6747#define V_028800_FRAG_GEQUAL 0x06 6748#define V_028800_FRAG_ALWAYS 0x07 6749#define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 6750#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) 6751#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F 6752#define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x07) << 8) 6753#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x07) 6754#define C_028800_STENCILFUNC 0xFFFFF8FF 6755#define V_028800_REF_NEVER 0x00 6756#define V_028800_REF_LESS 0x01 6757#define V_028800_REF_EQUAL 0x02 6758#define V_028800_REF_LEQUAL 0x03 6759#define V_028800_REF_GREATER 0x04 6760#define V_028800_REF_NOTEQUAL 0x05 6761#define V_028800_REF_GEQUAL 0x06 6762#define V_028800_REF_ALWAYS 0x07 6763#define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x07) << 20) 6764#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x07) 6765#define C_028800_STENCILFUNC_BF 0xFF8FFFFF 6766#define V_028800_REF_NEVER 0x00 6767#define V_028800_REF_LESS 0x01 6768#define V_028800_REF_EQUAL 0x02 6769#define V_028800_REF_LEQUAL 0x03 6770#define V_028800_REF_GREATER 0x04 6771#define V_028800_REF_NOTEQUAL 0x05 6772#define V_028800_REF_GEQUAL 0x06 6773#define V_028800_REF_ALWAYS 0x07 6774#define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((unsigned)(x) & 0x1) << 30) 6775#define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1) 6776#define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF 6777#define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((unsigned)(x) & 0x1) << 31) 6778#define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1) 6779#define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF 6780#define R_028804_DB_EQAA 0x028804 6781#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 6782#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) 6783#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 6784#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) 6785#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) 6786#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F 6787#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) 6788#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) 6789#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF 6790#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) 6791#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 6792#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF 6793#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 6794#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) 6795#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF 6796#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 6797#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) 6798#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF 6799#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 6800#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) 6801#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF 6802#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 6803#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) 6804#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF 6805#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 6806#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) 6807#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF 6808#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 6809#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) 6810#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF 6811#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) 6812#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) 6813#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF 6814#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) 6815#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) 6816#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF 6817#define R_028808_CB_COLOR_CONTROL 0x028808 6818#define S_028808_DISABLE_DUAL_QUAD(x) (((unsigned)(x) & 0x1) << 0) 6819#define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1) 6820#define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE 6821#define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 6822#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) 6823#define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 6824#define S_028808_MODE(x) (((unsigned)(x) & 0x07) << 4) 6825#define G_028808_MODE(x) (((x) >> 4) & 0x07) 6826#define C_028808_MODE 0xFFFFFF8F 6827#define V_028808_CB_DISABLE 0x00 6828#define V_028808_CB_NORMAL 0x01 6829#define V_028808_CB_ELIMINATE_FAST_CLEAR 0x02 6830#define V_028808_CB_RESOLVE 0x03 6831#define V_028808_CB_FMASK_DECOMPRESS 0x05 6832#define V_028808_CB_DCC_DECOMPRESS 0x06 6833#define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) 6834#define G_028808_ROP3(x) (((x) >> 16) & 0xFF) 6835#define C_028808_ROP3 0xFF00FFFF 6836#define V_028808_X_0X00 0x00 6837#define V_028808_X_0X05 0x05 6838#define V_028808_X_0X0A 0x0A 6839#define V_028808_X_0X0F 0x0F 6840#define V_028808_X_0X11 0x11 6841#define V_028808_X_0X22 0x22 6842#define V_028808_X_0X33 0x33 6843#define V_028808_X_0X44 0x44 6844#define V_028808_X_0X50 0x50 6845#define V_028808_X_0X55 0x55 6846#define V_028808_X_0X5A 0x5A 6847#define V_028808_X_0X5F 0x5F 6848#define V_028808_X_0X66 0x66 6849#define V_028808_X_0X77 0x77 6850#define V_028808_X_0X88 0x88 6851#define V_028808_X_0X99 0x99 6852#define V_028808_X_0XA0 0xA0 6853#define V_028808_X_0XA5 0xA5 6854#define V_028808_X_0XAA 0xAA 6855#define V_028808_X_0XAF 0xAF 6856#define V_028808_X_0XBB 0xBB 6857#define V_028808_X_0XCC 0xCC 6858#define V_028808_X_0XDD 0xDD 6859#define V_028808_X_0XEE 0xEE 6860#define V_028808_X_0XF0 0xF0 6861#define V_028808_X_0XF5 0xF5 6862#define V_028808_X_0XFA 0xFA 6863#define V_028808_X_0XFF 0xFF 6864#define R_02880C_DB_SHADER_CONTROL 0x02880C 6865#define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 6866#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) 6867#define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE 6868#define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 6869#define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) 6870#define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD 6871#define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 6872#define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1) 6873#define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB 6874#define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x03) << 4) 6875#define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x03) 6876#define C_02880C_Z_ORDER 0xFFFFFFCF 6877#define V_02880C_LATE_Z 0x00 6878#define V_02880C_EARLY_Z_THEN_LATE_Z 0x01 6879#define V_02880C_RE_Z 0x02 6880#define V_02880C_EARLY_Z_THEN_RE_Z 0x03 6881#define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 6882#define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) 6883#define C_02880C_KILL_ENABLE 0xFFFFFFBF 6884#define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 6885#define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1) 6886#define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F 6887#define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 6888#define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) 6889#define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF 6890#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 9) 6891#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1) 6892#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF 6893#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 10) 6894#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1) 6895#define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF 6896#define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 11) 6897#define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1) 6898#define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF 6899#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 12) 6900#define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1) 6901#define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF 6902/* CIK */ 6903#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 13) 6904#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03) 6905#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF 6906#define V_02880C_EXPORT_ANY_Z 0 6907#define V_02880C_EXPORT_LESS_THAN_Z 1 6908#define V_02880C_EXPORT_GREATER_THAN_Z 2 6909#define V_02880C_EXPORT_RESERVED 3 6910/* */ 6911/* Stoney */ 6912#define S_02880C_DUAL_QUAD_DISABLE(x) (((unsigned)(x) & 0x1) << 15) 6913#define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1) 6914#define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF 6915/* */ 6916#define R_028810_PA_CL_CLIP_CNTL 0x028810 6917#define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 6918#define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) 6919#define C_028810_UCP_ENA_0 0xFFFFFFFE 6920#define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 6921#define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) 6922#define C_028810_UCP_ENA_1 0xFFFFFFFD 6923#define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 6924#define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) 6925#define C_028810_UCP_ENA_2 0xFFFFFFFB 6926#define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 6927#define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) 6928#define C_028810_UCP_ENA_3 0xFFFFFFF7 6929#define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 6930#define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) 6931#define C_028810_UCP_ENA_4 0xFFFFFFEF 6932#define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 6933#define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) 6934#define C_028810_UCP_ENA_5 0xFFFFFFDF 6935#define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) 6936#define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) 6937#define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF 6938#define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x03) << 14) 6939#define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x03) 6940#define C_028810_PS_UCP_MODE 0xFFFF3FFF 6941#define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 6942#define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) 6943#define C_028810_CLIP_DISABLE 0xFFFEFFFF 6944#define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) 6945#define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) 6946#define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF 6947#define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) 6948#define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) 6949#define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF 6950#define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) 6951#define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) 6952#define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF 6953#define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) 6954#define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) 6955#define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF 6956#define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) 6957#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) 6958#define C_028810_VTX_KILL_OR 0xFFDFFFFF 6959#define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) 6960#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) 6961#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF 6962#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) 6963#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) 6964#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF 6965#define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 6966#define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) 6967#define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF 6968#define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 6969#define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) 6970#define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF 6971#define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) 6972#define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) 6973#define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF 6974#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 6975#define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) 6976#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) 6977#define C_028814_CULL_FRONT 0xFFFFFFFE 6978#define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) 6979#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) 6980#define C_028814_CULL_BACK 0xFFFFFFFD 6981#define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) 6982#define G_028814_FACE(x) (((x) >> 2) & 0x1) 6983#define C_028814_FACE 0xFFFFFFFB 6984#define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x03) << 3) 6985#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x03) 6986#define C_028814_POLY_MODE 0xFFFFFFE7 6987#define V_028814_X_DISABLE_POLY_MODE 0x00 6988#define V_028814_X_DUAL_MODE 0x01 6989#define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x07) << 5) 6990#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x07) 6991#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F 6992#define V_028814_X_DRAW_POINTS 0x00 6993#define V_028814_X_DRAW_LINES 0x01 6994#define V_028814_X_DRAW_TRIANGLES 0x02 6995#define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x07) << 8) 6996#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x07) 6997#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF 6998#define V_028814_X_DRAW_POINTS 0x00 6999#define V_028814_X_DRAW_LINES 0x01 7000#define V_028814_X_DRAW_TRIANGLES 0x02 7001#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 7002#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) 7003#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF 7004#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 7005#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) 7006#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF 7007#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) 7008#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) 7009#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF 7010#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) 7011#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) 7012#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF 7013#define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) 7014#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) 7015#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF 7016#define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) 7017#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) 7018#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF 7019#define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) 7020#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) 7021#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF 7022#define R_028818_PA_CL_VTE_CNTL 0x028818 7023#define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) 7024#define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1) 7025#define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE 7026#define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) 7027#define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1) 7028#define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD 7029#define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) 7030#define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1) 7031#define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB 7032#define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) 7033#define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1) 7034#define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 7035#define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) 7036#define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1) 7037#define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF 7038#define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) 7039#define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1) 7040#define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF 7041#define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) 7042#define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) 7043#define C_028818_VTX_XY_FMT 0xFFFFFEFF 7044#define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) 7045#define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) 7046#define C_028818_VTX_Z_FMT 0xFFFFFDFF 7047#define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) 7048#define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) 7049#define C_028818_VTX_W0_FMT 0xFFFFFBFF 7050#define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C 7051#define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 7052#define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) 7053#define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE 7054#define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 7055#define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) 7056#define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD 7057#define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 7058#define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) 7059#define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB 7060#define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 7061#define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) 7062#define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 7063#define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 7064#define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) 7065#define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF 7066#define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 7067#define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) 7068#define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF 7069#define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) 7070#define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) 7071#define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF 7072#define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) 7073#define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) 7074#define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F 7075#define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) 7076#define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) 7077#define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF 7078#define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) 7079#define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) 7080#define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF 7081#define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) 7082#define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) 7083#define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF 7084#define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) 7085#define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) 7086#define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF 7087#define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) 7088#define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) 7089#define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF 7090#define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) 7091#define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) 7092#define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF 7093#define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) 7094#define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) 7095#define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF 7096#define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) 7097#define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) 7098#define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF 7099#define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) 7100#define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) 7101#define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF 7102#define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) 7103#define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) 7104#define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF 7105#define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) 7106#define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) 7107#define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF 7108#define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) 7109#define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) 7110#define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF 7111#define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) 7112#define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) 7113#define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF 7114#define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) 7115#define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) 7116#define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF 7117#define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) 7118#define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) 7119#define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF 7120#define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) 7121#define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) 7122#define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF 7123#define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((unsigned)(x) & 0x1) << 24) 7124#define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1) 7125#define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF 7126#define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((unsigned)(x) & 0x1) << 25) 7127#define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1) 7128#define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF 7129/* VI */ 7130#define S_02881C_USE_VTX_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 26) 7131#define G_02881C_USE_VTX_LINE_WIDTH(x) (((x) >> 26) & 0x1) 7132#define C_02881C_USE_VTX_LINE_WIDTH 0xFBFFFFFF 7133/* */ 7134#define R_028820_PA_CL_NANINF_CNTL 0x028820 7135#define S_028820_VTE_XY_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 0) 7136#define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1) 7137#define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE 7138#define S_028820_VTE_Z_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 1) 7139#define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1) 7140#define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD 7141#define S_028820_VTE_W_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 2) 7142#define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1) 7143#define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB 7144#define S_028820_VTE_0XNANINF_IS_0(x) (((unsigned)(x) & 0x1) << 3) 7145#define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1) 7146#define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7 7147#define S_028820_VTE_XY_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 4) 7148#define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1) 7149#define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF 7150#define S_028820_VTE_Z_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 5) 7151#define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1) 7152#define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF 7153#define S_028820_VTE_W_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 6) 7154#define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1) 7155#define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF 7156#define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((unsigned)(x) & 0x1) << 7) 7157#define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1) 7158#define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F 7159#define S_028820_VS_XY_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 8) 7160#define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1) 7161#define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF 7162#define S_028820_VS_XY_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 9) 7163#define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1) 7164#define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF 7165#define S_028820_VS_Z_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 10) 7166#define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1) 7167#define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF 7168#define S_028820_VS_Z_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 11) 7169#define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1) 7170#define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF 7171#define S_028820_VS_W_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 12) 7172#define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1) 7173#define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF 7174#define S_028820_VS_W_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 13) 7175#define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1) 7176#define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF 7177#define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 14) 7178#define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1) 7179#define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF 7180#define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((unsigned)(x) & 0x1) << 20) 7181#define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1) 7182#define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF 7183#define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824 7184#define S_028824_LINE_STIPPLE_RESET(x) (((unsigned)(x) & 0x03) << 0) 7185#define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x03) 7186#define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC 7187#define S_028824_EXPAND_FULL_LENGTH(x) (((unsigned)(x) & 0x1) << 2) 7188#define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1) 7189#define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB 7190#define S_028824_FRACTIONAL_ACCUM(x) (((unsigned)(x) & 0x1) << 3) 7191#define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1) 7192#define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7 7193#define S_028824_DIAMOND_ADJUST(x) (((unsigned)(x) & 0x1) << 4) 7194#define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1) 7195#define C_028824_DIAMOND_ADJUST 0xFFFFFFEF 7196#define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828 7197#define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C 7198#define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 7199#define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1) 7200#define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE 7201#define S_02882C_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 7202#define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) 7203#define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD 7204#define S_02882C_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 7205#define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1) 7206#define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB 7207#define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 7208#define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1) 7209#define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7 7210#define S_02882C_TRIANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 4) 7211#define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1) 7212#define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF 7213#define S_02882C_LINE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 5) 7214#define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1) 7215#define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF 7216#define S_02882C_POINT_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 6) 7217#define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1) 7218#define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF 7219#define S_02882C_RECTANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 7) 7220#define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1) 7221#define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F 7222#define S_02882C_PRIM_EXPAND_CONSTANT(x) (((unsigned)(x) & 0xFF) << 8) 7223#define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF) 7224#define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF 7225/* CIK */ 7226#define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((unsigned)(x) & 0x1) << 30) 7227#define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1) 7228#define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF 7229#define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((unsigned)(x) & 0x1) << 31) 7230#define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) 7231#define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF 7232/* */ 7233#define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* Polaris */ 7234#define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) & 0x1) << 0) 7235#define C_028830_SMALL_PRIM_FILTER_ENABLE 0xFFFFFFFE 7236#define S_028830_TRIANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 1) 7237#define S_028830_LINE_FILTER_DISABLE(x) (((x) & 0x1) << 2) 7238#define S_028830_POINT_FILTER_DISABLE(x) (((x) & 0x1) << 3) 7239#define S_028830_RECTANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 4) 7240#define R_028A00_PA_SU_POINT_SIZE 0x028A00 7241#define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) 7242#define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) 7243#define C_028A00_HEIGHT 0xFFFF0000 7244#define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) 7245#define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) 7246#define C_028A00_WIDTH 0x0000FFFF 7247#define R_028A04_PA_SU_POINT_MINMAX 0x028A04 7248#define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 7249#define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) 7250#define C_028A04_MIN_SIZE 0xFFFF0000 7251#define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 7252#define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) 7253#define C_028A04_MAX_SIZE 0x0000FFFF 7254#define R_028A08_PA_SU_LINE_CNTL 0x028A08 7255#define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) 7256#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) 7257#define C_028A08_WIDTH 0xFFFF0000 7258#define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C 7259#define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) 7260#define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF) 7261#define C_028A0C_LINE_PATTERN 0xFFFF0000 7262#define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) 7263#define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF) 7264#define C_028A0C_REPEAT_COUNT 0xFF00FFFF 7265#define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) 7266#define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1) 7267#define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF 7268#define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x03) << 29) 7269#define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x03) 7270#define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF 7271#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10 7272#define S_028A10_PATH_SELECT(x) (((unsigned)(x) & 0x07) << 0) 7273#define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x07) 7274#define C_028A10_PATH_SELECT 0xFFFFFFF8 7275#define V_028A10_VGT_OUTPATH_VTX_REUSE 0x00 7276#define V_028A10_VGT_OUTPATH_TESS_EN 0x01 7277#define V_028A10_VGT_OUTPATH_PASSTHRU 0x02 7278#define V_028A10_VGT_OUTPATH_GS_BLOCK 0x03 7279#define V_028A10_VGT_OUTPATH_HS_BLOCK 0x04 7280#define R_028A14_VGT_HOS_CNTL 0x028A14 7281#define S_028A14_TESS_MODE(x) (((unsigned)(x) & 0x03) << 0) 7282#define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x03) 7283#define C_028A14_TESS_MODE 0xFFFFFFFC 7284#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 7285#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C 7286#define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20 7287#define S_028A20_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 7288#define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 7289#define C_028A20_REUSE_DEPTH 0xFFFFFF00 7290#define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24 7291#define S_028A24_PRIM_TYPE(x) (((unsigned)(x) & 0x1F) << 0) 7292#define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F) 7293#define C_028A24_PRIM_TYPE 0xFFFFFFE0 7294#define V_028A24_VGT_GRP_3D_POINT 0x00 7295#define V_028A24_VGT_GRP_3D_LINE 0x01 7296#define V_028A24_VGT_GRP_3D_TRI 0x02 7297#define V_028A24_VGT_GRP_3D_RECT 0x03 7298#define V_028A24_VGT_GRP_3D_QUAD 0x04 7299#define V_028A24_VGT_GRP_2D_COPY_RECT_V0 0x05 7300#define V_028A24_VGT_GRP_2D_COPY_RECT_V1 0x06 7301#define V_028A24_VGT_GRP_2D_COPY_RECT_V2 0x07 7302#define V_028A24_VGT_GRP_2D_COPY_RECT_V3 0x08 7303#define V_028A24_VGT_GRP_2D_FILL_RECT 0x09 7304#define V_028A24_VGT_GRP_2D_LINE 0x0A 7305#define V_028A24_VGT_GRP_2D_TRI 0x0B 7306#define V_028A24_VGT_GRP_PRIM_INDEX_LINE 0x0C 7307#define V_028A24_VGT_GRP_PRIM_INDEX_TRI 0x0D 7308#define V_028A24_VGT_GRP_PRIM_INDEX_QUAD 0x0E 7309#define V_028A24_VGT_GRP_3D_LINE_ADJ 0x0F 7310#define V_028A24_VGT_GRP_3D_TRI_ADJ 0x10 7311#define V_028A24_VGT_GRP_3D_PATCH 0x11 7312#define S_028A24_RETAIN_ORDER(x) (((unsigned)(x) & 0x1) << 14) 7313#define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1) 7314#define C_028A24_RETAIN_ORDER 0xFFFFBFFF 7315#define S_028A24_RETAIN_QUADS(x) (((unsigned)(x) & 0x1) << 15) 7316#define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1) 7317#define C_028A24_RETAIN_QUADS 0xFFFF7FFF 7318#define S_028A24_PRIM_ORDER(x) (((unsigned)(x) & 0x07) << 16) 7319#define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x07) 7320#define C_028A24_PRIM_ORDER 0xFFF8FFFF 7321#define V_028A24_VGT_GRP_LIST 0x00 7322#define V_028A24_VGT_GRP_STRIP 0x01 7323#define V_028A24_VGT_GRP_FAN 0x02 7324#define V_028A24_VGT_GRP_LOOP 0x03 7325#define V_028A24_VGT_GRP_POLYGON 0x04 7326#define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28 7327#define S_028A28_FIRST_DECR(x) (((unsigned)(x) & 0x0F) << 0) 7328#define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0x0F) 7329#define C_028A28_FIRST_DECR 0xFFFFFFF0 7330#define R_028A2C_VGT_GROUP_DECR 0x028A2C 7331#define S_028A2C_DECR(x) (((unsigned)(x) & 0x0F) << 0) 7332#define G_028A2C_DECR(x) (((x) >> 0) & 0x0F) 7333#define C_028A2C_DECR 0xFFFFFFF0 7334#define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30 7335#define S_028A30_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) 7336#define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1) 7337#define C_028A30_COMP_X_EN 0xFFFFFFFE 7338#define S_028A30_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) 7339#define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1) 7340#define C_028A30_COMP_Y_EN 0xFFFFFFFD 7341#define S_028A30_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) 7342#define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1) 7343#define C_028A30_COMP_Z_EN 0xFFFFFFFB 7344#define S_028A30_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) 7345#define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1) 7346#define C_028A30_COMP_W_EN 0xFFFFFFF7 7347#define S_028A30_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) 7348#define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF) 7349#define C_028A30_STRIDE 0xFFFF00FF 7350#define S_028A30_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) 7351#define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF) 7352#define C_028A30_SHIFT 0xFF00FFFF 7353#define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34 7354#define S_028A34_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) 7355#define G_028A34_COMP_X_EN(x) (((x) >> 0) & 0x1) 7356#define C_028A34_COMP_X_EN 0xFFFFFFFE 7357#define S_028A34_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) 7358#define G_028A34_COMP_Y_EN(x) (((x) >> 1) & 0x1) 7359#define C_028A34_COMP_Y_EN 0xFFFFFFFD 7360#define S_028A34_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) 7361#define G_028A34_COMP_Z_EN(x) (((x) >> 2) & 0x1) 7362#define C_028A34_COMP_Z_EN 0xFFFFFFFB 7363#define S_028A34_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) 7364#define G_028A34_COMP_W_EN(x) (((x) >> 3) & 0x1) 7365#define C_028A34_COMP_W_EN 0xFFFFFFF7 7366#define S_028A34_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) 7367#define G_028A34_STRIDE(x) (((x) >> 8) & 0xFF) 7368#define C_028A34_STRIDE 0xFFFF00FF 7369#define S_028A34_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) 7370#define G_028A34_SHIFT(x) (((x) >> 16) & 0xFF) 7371#define C_028A34_SHIFT 0xFF00FFFF 7372#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38 7373#define S_028A38_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) 7374#define G_028A38_X_CONV(x) (((x) >> 0) & 0x0F) 7375#define C_028A38_X_CONV 0xFFFFFFF0 7376#define V_028A38_VGT_GRP_INDEX_16 0x00 7377#define V_028A38_VGT_GRP_INDEX_32 0x01 7378#define V_028A38_VGT_GRP_UINT_16 0x02 7379#define V_028A38_VGT_GRP_UINT_32 0x03 7380#define V_028A38_VGT_GRP_SINT_16 0x04 7381#define V_028A38_VGT_GRP_SINT_32 0x05 7382#define V_028A38_VGT_GRP_FLOAT_32 0x06 7383#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7384#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7385#define S_028A38_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) 7386#define G_028A38_X_OFFSET(x) (((x) >> 4) & 0x0F) 7387#define C_028A38_X_OFFSET 0xFFFFFF0F 7388#define S_028A38_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) 7389#define G_028A38_Y_CONV(x) (((x) >> 8) & 0x0F) 7390#define C_028A38_Y_CONV 0xFFFFF0FF 7391#define V_028A38_VGT_GRP_INDEX_16 0x00 7392#define V_028A38_VGT_GRP_INDEX_32 0x01 7393#define V_028A38_VGT_GRP_UINT_16 0x02 7394#define V_028A38_VGT_GRP_UINT_32 0x03 7395#define V_028A38_VGT_GRP_SINT_16 0x04 7396#define V_028A38_VGT_GRP_SINT_32 0x05 7397#define V_028A38_VGT_GRP_FLOAT_32 0x06 7398#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7399#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7400#define S_028A38_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) 7401#define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0x0F) 7402#define C_028A38_Y_OFFSET 0xFFFF0FFF 7403#define S_028A38_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) 7404#define G_028A38_Z_CONV(x) (((x) >> 16) & 0x0F) 7405#define C_028A38_Z_CONV 0xFFF0FFFF 7406#define V_028A38_VGT_GRP_INDEX_16 0x00 7407#define V_028A38_VGT_GRP_INDEX_32 0x01 7408#define V_028A38_VGT_GRP_UINT_16 0x02 7409#define V_028A38_VGT_GRP_UINT_32 0x03 7410#define V_028A38_VGT_GRP_SINT_16 0x04 7411#define V_028A38_VGT_GRP_SINT_32 0x05 7412#define V_028A38_VGT_GRP_FLOAT_32 0x06 7413#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7414#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7415#define S_028A38_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) 7416#define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0x0F) 7417#define C_028A38_Z_OFFSET 0xFF0FFFFF 7418#define S_028A38_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) 7419#define G_028A38_W_CONV(x) (((x) >> 24) & 0x0F) 7420#define C_028A38_W_CONV 0xF0FFFFFF 7421#define V_028A38_VGT_GRP_INDEX_16 0x00 7422#define V_028A38_VGT_GRP_INDEX_32 0x01 7423#define V_028A38_VGT_GRP_UINT_16 0x02 7424#define V_028A38_VGT_GRP_UINT_32 0x03 7425#define V_028A38_VGT_GRP_SINT_16 0x04 7426#define V_028A38_VGT_GRP_SINT_32 0x05 7427#define V_028A38_VGT_GRP_FLOAT_32 0x06 7428#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7429#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7430#define S_028A38_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) 7431#define G_028A38_W_OFFSET(x) (((x) >> 28) & 0x0F) 7432#define C_028A38_W_OFFSET 0x0FFFFFFF 7433#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C 7434#define S_028A3C_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) 7435#define G_028A3C_X_CONV(x) (((x) >> 0) & 0x0F) 7436#define C_028A3C_X_CONV 0xFFFFFFF0 7437#define V_028A3C_VGT_GRP_INDEX_16 0x00 7438#define V_028A3C_VGT_GRP_INDEX_32 0x01 7439#define V_028A3C_VGT_GRP_UINT_16 0x02 7440#define V_028A3C_VGT_GRP_UINT_32 0x03 7441#define V_028A3C_VGT_GRP_SINT_16 0x04 7442#define V_028A3C_VGT_GRP_SINT_32 0x05 7443#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7444#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7445#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7446#define S_028A3C_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) 7447#define G_028A3C_X_OFFSET(x) (((x) >> 4) & 0x0F) 7448#define C_028A3C_X_OFFSET 0xFFFFFF0F 7449#define S_028A3C_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) 7450#define G_028A3C_Y_CONV(x) (((x) >> 8) & 0x0F) 7451#define C_028A3C_Y_CONV 0xFFFFF0FF 7452#define V_028A3C_VGT_GRP_INDEX_16 0x00 7453#define V_028A3C_VGT_GRP_INDEX_32 0x01 7454#define V_028A3C_VGT_GRP_UINT_16 0x02 7455#define V_028A3C_VGT_GRP_UINT_32 0x03 7456#define V_028A3C_VGT_GRP_SINT_16 0x04 7457#define V_028A3C_VGT_GRP_SINT_32 0x05 7458#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7459#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7460#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7461#define S_028A3C_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) 7462#define G_028A3C_Y_OFFSET(x) (((x) >> 12) & 0x0F) 7463#define C_028A3C_Y_OFFSET 0xFFFF0FFF 7464#define S_028A3C_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) 7465#define G_028A3C_Z_CONV(x) (((x) >> 16) & 0x0F) 7466#define C_028A3C_Z_CONV 0xFFF0FFFF 7467#define V_028A3C_VGT_GRP_INDEX_16 0x00 7468#define V_028A3C_VGT_GRP_INDEX_32 0x01 7469#define V_028A3C_VGT_GRP_UINT_16 0x02 7470#define V_028A3C_VGT_GRP_UINT_32 0x03 7471#define V_028A3C_VGT_GRP_SINT_16 0x04 7472#define V_028A3C_VGT_GRP_SINT_32 0x05 7473#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7474#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7475#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7476#define S_028A3C_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) 7477#define G_028A3C_Z_OFFSET(x) (((x) >> 20) & 0x0F) 7478#define C_028A3C_Z_OFFSET 0xFF0FFFFF 7479#define S_028A3C_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) 7480#define G_028A3C_W_CONV(x) (((x) >> 24) & 0x0F) 7481#define C_028A3C_W_CONV 0xF0FFFFFF 7482#define V_028A3C_VGT_GRP_INDEX_16 0x00 7483#define V_028A3C_VGT_GRP_INDEX_32 0x01 7484#define V_028A3C_VGT_GRP_UINT_16 0x02 7485#define V_028A3C_VGT_GRP_UINT_32 0x03 7486#define V_028A3C_VGT_GRP_SINT_16 0x04 7487#define V_028A3C_VGT_GRP_SINT_32 0x05 7488#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7489#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7490#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7491#define S_028A3C_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) 7492#define G_028A3C_W_OFFSET(x) (((x) >> 28) & 0x0F) 7493#define C_028A3C_W_OFFSET 0x0FFFFFFF 7494#define R_028A40_VGT_GS_MODE 0x028A40 7495#define S_028A40_MODE(x) (((unsigned)(x) & 0x07) << 0) 7496#define G_028A40_MODE(x) (((x) >> 0) & 0x07) 7497#define C_028A40_MODE 0xFFFFFFF8 7498#define V_028A40_GS_OFF 0x00 7499#define V_028A40_GS_SCENARIO_A 0x01 7500#define V_028A40_GS_SCENARIO_B 0x02 7501#define V_028A40_GS_SCENARIO_G 0x03 7502#define V_028A40_GS_SCENARIO_C 0x04 7503#define V_028A40_SPRITE_EN 0x05 7504#define S_028A40_RESERVED_0(x) (((unsigned)(x) & 0x1) << 3) 7505#define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1) 7506#define C_028A40_RESERVED_0 0xFFFFFFF7 7507#define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x03) << 4) 7508#define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x03) 7509#define C_028A40_CUT_MODE 0xFFFFFFCF 7510#define V_028A40_GS_CUT_1024 0x00 7511#define V_028A40_GS_CUT_512 0x01 7512#define V_028A40_GS_CUT_256 0x02 7513#define V_028A40_GS_CUT_128 0x03 7514#define S_028A40_RESERVED_1(x) (((unsigned)(x) & 0x1F) << 6) 7515#define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F) 7516#define C_028A40_RESERVED_1 0xFFFFF83F 7517#define S_028A40_GS_C_PACK_EN(x) (((unsigned)(x) & 0x1) << 11) 7518#define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1) 7519#define C_028A40_GS_C_PACK_EN 0xFFFFF7FF 7520#define S_028A40_RESERVED_2(x) (((unsigned)(x) & 0x1) << 12) 7521#define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1) 7522#define C_028A40_RESERVED_2 0xFFFFEFFF 7523#define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 13) 7524#define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1) 7525#define C_028A40_ES_PASSTHRU 0xFFFFDFFF 7526/* SI-CIK */ 7527#define S_028A40_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 14) 7528#define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1) 7529#define C_028A40_COMPUTE_MODE 0xFFFFBFFF 7530#define S_028A40_FAST_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 15) 7531#define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1) 7532#define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF 7533#define S_028A40_ELEMENT_INFO_EN(x) (((unsigned)(x) & 0x1) << 16) 7534#define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1) 7535#define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF 7536/* */ 7537#define S_028A40_PARTIAL_THD_AT_EOI(x) (((unsigned)(x) & 0x1) << 17) 7538#define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1) 7539#define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF 7540#define S_028A40_SUPPRESS_CUTS(x) (((unsigned)(x) & 0x1) << 18) 7541#define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1) 7542#define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF 7543#define S_028A40_ES_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 19) 7544#define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1) 7545#define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF 7546#define S_028A40_GS_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 20) 7547#define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1) 7548#define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF 7549/* CIK */ 7550#define S_028A40_ONCHIP(x) (((unsigned)(x) & 0x03) << 21) 7551#define G_028A40_ONCHIP(x) (((x) >> 21) & 0x03) 7552#define C_028A40_ONCHIP 0xFF9FFFFF 7553#define V_028A40_X_0_OFFCHIP_GS 0x00 7554#define V_028A40_X_3_ES_AND_GS_ARE_ONCHIP 0x03 7555#define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44 7556#define S_028A44_ES_VERTS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 0) 7557#define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF) 7558#define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800 7559#define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 11) 7560#define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF) 7561#define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF 7562/* */ 7563#define R_028A48_PA_SC_MODE_CNTL_0 0x028A48 7564#define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7565#define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1) 7566#define C_028A48_MSAA_ENABLE 0xFFFFFFFE 7567#define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 7568#define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1) 7569#define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD 7570#define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 7571#define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1) 7572#define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB 7573#define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((unsigned)(x) & 0x1) << 3) 7574#define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1) 7575#define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7 7576#define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C 7577#define S_028A4C_WALK_SIZE(x) (((unsigned)(x) & 0x1) << 0) 7578#define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1) 7579#define C_028A4C_WALK_SIZE 0xFFFFFFFE 7580#define S_028A4C_WALK_ALIGNMENT(x) (((unsigned)(x) & 0x1) << 1) 7581#define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1) 7582#define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD 7583#define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((unsigned)(x) & 0x1) << 2) 7584#define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1) 7585#define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB 7586#define S_028A4C_WALK_FENCE_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 7587#define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1) 7588#define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7 7589#define S_028A4C_WALK_FENCE_SIZE(x) (((unsigned)(x) & 0x07) << 4) 7590#define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x07) 7591#define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F 7592#define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 7593#define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1) 7594#define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F 7595#define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 7596#define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1) 7597#define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF 7598#define S_028A4C_TILE_COVER_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 7599#define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1) 7600#define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF 7601#define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((unsigned)(x) & 0x1) << 10) 7602#define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1) 7603#define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF 7604#define S_028A4C_ZMM_LINE_EXTENT(x) (((unsigned)(x) & 0x1) << 11) 7605#define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1) 7606#define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF 7607#define S_028A4C_ZMM_LINE_OFFSET(x) (((unsigned)(x) & 0x1) << 12) 7608#define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1) 7609#define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF 7610#define S_028A4C_ZMM_RECT_EXTENT(x) (((unsigned)(x) & 0x1) << 13) 7611#define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1) 7612#define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF 7613#define S_028A4C_KILL_PIX_POST_HI_Z(x) (((unsigned)(x) & 0x1) << 14) 7614#define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1) 7615#define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF 7616#define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((unsigned)(x) & 0x1) << 15) 7617#define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1) 7618#define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF 7619#define S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) 7620#define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1) 7621#define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF 7622#define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 7623#define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1) 7624#define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF 7625#define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((unsigned)(x) & 0x1) << 18) 7626#define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1) 7627#define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF 7628#define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((unsigned)(x) & 0x1) << 19) 7629#define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1) 7630#define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF 7631#define S_028A4C_GPU_ID_OVERRIDE(x) (((unsigned)(x) & 0x0F) << 20) 7632#define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0x0F) 7633#define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF 7634#define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 7635#define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1) 7636#define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF 7637#define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 7638#define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1) 7639#define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF 7640#define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 7641#define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1) 7642#define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF 7643#define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((unsigned)(x) & 0x1) << 27) 7644#define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1) 7645#define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF 7646#define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((unsigned)(x) & 0x07) << 28) 7647#define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x07) 7648#define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF 7649#define R_028A50_VGT_ENHANCE 0x028A50 7650#define R_028A54_VGT_GS_PER_ES 0x028A54 7651#define S_028A54_GS_PER_ES(x) (((unsigned)(x) & 0x7FF) << 0) 7652#define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF) 7653#define C_028A54_GS_PER_ES 0xFFFFF800 7654#define R_028A58_VGT_ES_PER_GS 0x028A58 7655#define S_028A58_ES_PER_GS(x) (((unsigned)(x) & 0x7FF) << 0) 7656#define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF) 7657#define C_028A58_ES_PER_GS 0xFFFFF800 7658#define R_028A5C_VGT_GS_PER_VS 0x028A5C 7659#define S_028A5C_GS_PER_VS(x) (((unsigned)(x) & 0x0F) << 0) 7660#define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0x0F) 7661#define C_028A5C_GS_PER_VS 0xFFFFFFF0 7662#define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60 7663#define S_028A60_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7664#define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF) 7665#define C_028A60_OFFSET 0xFFFF8000 7666#define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64 7667#define S_028A64_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7668#define G_028A64_OFFSET(x) (((x) >> 0) & 0x7FFF) 7669#define C_028A64_OFFSET 0xFFFF8000 7670#define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68 7671#define S_028A68_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7672#define G_028A68_OFFSET(x) (((x) >> 0) & 0x7FFF) 7673#define C_028A68_OFFSET 0xFFFF8000 7674#define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C 7675#define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 7676#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F) 7677#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0 7678#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 7679#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1 7680#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2 7681#define S_028A6C_OUTPRIM_TYPE_1(x) (((unsigned)(x) & 0x3F) << 8) 7682#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F) 7683#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF 7684#define S_028A6C_OUTPRIM_TYPE_2(x) (((unsigned)(x) & 0x3F) << 16) 7685#define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F) 7686#define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF 7687#define S_028A6C_OUTPRIM_TYPE_3(x) (((unsigned)(x) & 0x3F) << 22) 7688#define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F) 7689#define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF 7690#define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((unsigned)(x) & 0x1) << 31) 7691#define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1) 7692#define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF 7693#define R_028A70_IA_ENHANCE 0x028A70 7694#define R_028A74_VGT_DMA_SIZE 0x028A74 7695#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 7696#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C 7697#define S_028A7C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 7698#define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 7699#define C_028A7C_INDEX_TYPE 0xFFFFFFFC 7700#define V_028A7C_VGT_INDEX_16 0x00 7701#define V_028A7C_VGT_INDEX_32 0x01 7702#define V_028A7C_VGT_INDEX_8 0x02 /* VI */ 7703#define S_028A7C_SWAP_MODE(x) (((unsigned)(x) & 0x03) << 2) 7704#define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x03) 7705#define C_028A7C_SWAP_MODE 0xFFFFFFF3 7706#define V_028A7C_VGT_DMA_SWAP_NONE 0x00 7707#define V_028A7C_VGT_DMA_SWAP_16_BIT 0x01 7708#define V_028A7C_VGT_DMA_SWAP_32_BIT 0x02 7709#define V_028A7C_VGT_DMA_SWAP_WORD 0x03 7710/* CIK */ 7711#define S_028A7C_BUF_TYPE(x) (((unsigned)(x) & 0x03) << 4) 7712#define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x03) 7713#define C_028A7C_BUF_TYPE 0xFFFFFFCF 7714#define V_028A7C_VGT_DMA_BUF_MEM 0x00 7715#define V_028A7C_VGT_DMA_BUF_RING 0x01 7716#define V_028A7C_VGT_DMA_BUF_SETUP 0x02 7717#define S_028A7C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 6) 7718#define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x03) 7719#define C_028A7C_RDREQ_POLICY 0xFFFFFF3F 7720#define V_028A7C_VGT_POLICY_LRU 0x00 7721#define V_028A7C_VGT_POLICY_STREAM 0x01 7722#define S_028A7C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 6) 7723#define G_028A7C_RDREQ_POLICY_VI(x) (((x) >> 6) & 0x1) 7724#define C_028A7C_RDREQ_POLICY_VI 0xFFFFFFBF 7725#define S_028A7C_ATC(x) (((unsigned)(x) & 0x1) << 8) 7726#define G_028A7C_ATC(x) (((x) >> 8) & 0x1) 7727#define C_028A7C_ATC 0xFFFFFEFF 7728#define S_028A7C_NOT_EOP(x) (((unsigned)(x) & 0x1) << 9) 7729#define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1) 7730#define C_028A7C_NOT_EOP 0xFFFFFDFF 7731#define S_028A7C_REQ_PATH(x) (((unsigned)(x) & 0x1) << 10) 7732#define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1) 7733#define C_028A7C_REQ_PATH 0xFFFFFBFF 7734/* */ 7735/* VI */ 7736#define S_028A7C_MTYPE(x) (((unsigned)(x) & 0x03) << 11) 7737#define G_028A7C_MTYPE(x) (((x) >> 11) & 0x03) 7738#define C_028A7C_MTYPE 0xFFFFE7FF 7739/* */ 7740#define R_028A80_WD_ENHANCE 0x028A80 7741#define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 7742#define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) 7743#define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) 7744#define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE 7745#define S_028A84_DISABLE_RESET_ON_EOI(x) (((unsigned)(x) & 0x1) << 1) /* not on CIK */ 7746#define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) /* not on CIK */ 7747#define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD /* not on CIK */ 7748#define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88 7749#define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C 7750#define R_028A90_VGT_EVENT_INITIATOR 0x028A90 7751#define S_028A90_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 7752#define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F) 7753#define C_028A90_EVENT_TYPE 0xFFFFFFC0 7754#define V_028A90_SAMPLE_STREAMOUTSTATS1 0x01 7755#define V_028A90_SAMPLE_STREAMOUTSTATS2 0x02 7756#define V_028A90_SAMPLE_STREAMOUTSTATS3 0x03 7757#define V_028A90_CACHE_FLUSH_TS 0x04 7758#define V_028A90_CONTEXT_DONE 0x05 7759#define V_028A90_CACHE_FLUSH 0x06 7760#define V_028A90_CS_PARTIAL_FLUSH 0x07 7761#define V_028A90_VGT_STREAMOUT_SYNC 0x08 7762#define V_028A90_VGT_STREAMOUT_RESET 0x0A 7763#define V_028A90_END_OF_PIPE_INCR_DE 0x0B 7764#define V_028A90_END_OF_PIPE_IB_END 0x0C 7765#define V_028A90_RST_PIX_CNT 0x0D 7766#define V_028A90_VS_PARTIAL_FLUSH 0x0F 7767#define V_028A90_PS_PARTIAL_FLUSH 0x10 7768#define V_028A90_FLUSH_HS_OUTPUT 0x11 7769#define V_028A90_FLUSH_LS_OUTPUT 0x12 7770#define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 7771#define V_028A90_ZPASS_DONE 0x15 7772#define V_028A90_CACHE_FLUSH_AND_INV_EVENT 0x16 7773#define V_028A90_PERFCOUNTER_START 0x17 7774#define V_028A90_PERFCOUNTER_STOP 0x18 7775#define V_028A90_PIPELINESTAT_START 0x19 7776#define V_028A90_PIPELINESTAT_STOP 0x1A 7777#define V_028A90_PERFCOUNTER_SAMPLE 0x1B 7778#define V_028A90_FLUSH_ES_OUTPUT 0x1C 7779#define V_028A90_FLUSH_GS_OUTPUT 0x1D 7780#define V_028A90_SAMPLE_PIPELINESTAT 0x1E 7781#define V_028A90_SO_VGTSTREAMOUT_FLUSH 0x1F 7782#define V_028A90_SAMPLE_STREAMOUTSTATS 0x20 7783#define V_028A90_RESET_VTX_CNT 0x21 7784#define V_028A90_BLOCK_CONTEXT_DONE 0x22 7785#define V_028A90_CS_CONTEXT_DONE 0x23 7786#define V_028A90_VGT_FLUSH 0x24 7787#define V_028A90_SC_SEND_DB_VPZ 0x27 7788#define V_028A90_BOTTOM_OF_PIPE_TS 0x28 7789#define V_028A90_DB_CACHE_FLUSH_AND_INV 0x2A 7790#define V_028A90_FLUSH_AND_INV_DB_DATA_TS 0x2B 7791#define V_028A90_FLUSH_AND_INV_DB_META 0x2C 7792#define V_028A90_FLUSH_AND_INV_CB_DATA_TS 0x2D 7793#define V_028A90_FLUSH_AND_INV_CB_META 0x2E 7794#define V_028A90_CS_DONE 0x2F 7795#define V_028A90_PS_DONE 0x30 7796#define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 0x31 7797#define V_028A90_THREAD_TRACE_START 0x33 7798#define V_028A90_THREAD_TRACE_STOP 0x34 7799#define V_028A90_THREAD_TRACE_MARKER 0x35 7800#define V_028A90_THREAD_TRACE_FLUSH 0x36 7801#define V_028A90_THREAD_TRACE_FINISH 0x37 7802/* CIK */ 7803#define V_028A90_PIXEL_PIPE_STAT_CONTROL 0x38 7804#define V_028A90_PIXEL_PIPE_STAT_DUMP 0x39 7805#define V_028A90_PIXEL_PIPE_STAT_RESET 0x3A 7806/* */ 7807#define S_028A90_ADDRESS_HI(x) (((unsigned)(x) & 0x1FF) << 18) 7808#define G_028A90_ADDRESS_HI(x) (((x) >> 18) & 0x1FF) 7809#define C_028A90_ADDRESS_HI 0xF803FFFF 7810#define S_028A90_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) 7811#define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) 7812#define C_028A90_EXTENDED_EVENT 0xF7FFFFFF 7813#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94 7814#define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) 7815#define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) 7816#define C_028A94_RESET_EN 0xFFFFFFFE 7817#define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0 7818#define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4 7819#define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 7820#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 7821#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) 7822#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 7823#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) 7824#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) 7825#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF 7826#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) 7827#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) 7828#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF 7829#define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) 7830#define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) 7831#define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF 7832#define S_028AA8_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) 7833#define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) 7834#define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF 7835/* CIK */ 7836#define S_028AA8_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) 7837#define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) 7838#define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF 7839/* VI */ 7840#define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0x0F) << 28) 7841#define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0x0F) 7842#define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF 7843/* */ 7844#define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC 7845#define S_028AAC_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 7846#define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 7847#define C_028AAC_ITEMSIZE 0xFFFF8000 7848#define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0 7849#define S_028AB0_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 7850#define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 7851#define C_028AB0_ITEMSIZE 0xFFFF8000 7852#define R_028AB4_VGT_REUSE_OFF 0x028AB4 7853#define S_028AB4_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) 7854#define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1) 7855#define C_028AB4_REUSE_OFF 0xFFFFFFFE 7856#define R_028AB8_VGT_VTX_CNT_EN 0x028AB8 7857#define S_028AB8_VTX_CNT_EN(x) (((unsigned)(x) & 0x1) << 0) 7858#define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1) 7859#define C_028AB8_VTX_CNT_EN 0xFFFFFFFE 7860#define R_028ABC_DB_HTILE_SURFACE 0x028ABC 7861#define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 0) 7862#define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1) 7863#define C_028ABC_LINEAR 0xFFFFFFFE 7864#define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 1) 7865#define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1) 7866#define C_028ABC_FULL_CACHE 0xFFFFFFFD 7867#define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 2) 7868#define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1) 7869#define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB 7870#define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 3) 7871#define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1) 7872#define C_028ABC_PRELOAD 0xFFFFFFF7 7873#define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 4) 7874#define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F) 7875#define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F 7876#define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 10) 7877#define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F) 7878#define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF 7879#define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((unsigned)(x) & 0x1) << 16) 7880#define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1) 7881#define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF 7882/* VI */ 7883#define S_028ABC_TC_COMPATIBLE(x) (((unsigned)(x) & 0x1) << 17) 7884#define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1) 7885#define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF 7886/* */ 7887#define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0 7888#define S_028AC0_COMPAREFUNC0(x) (((unsigned)(x) & 0x07) << 0) 7889#define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x07) 7890#define C_028AC0_COMPAREFUNC0 0xFFFFFFF8 7891#define V_028AC0_REF_NEVER 0x00 7892#define V_028AC0_REF_LESS 0x01 7893#define V_028AC0_REF_EQUAL 0x02 7894#define V_028AC0_REF_LEQUAL 0x03 7895#define V_028AC0_REF_GREATER 0x04 7896#define V_028AC0_REF_NOTEQUAL 0x05 7897#define V_028AC0_REF_GEQUAL 0x06 7898#define V_028AC0_REF_ALWAYS 0x07 7899#define S_028AC0_COMPAREVALUE0(x) (((unsigned)(x) & 0xFF) << 4) 7900#define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF) 7901#define C_028AC0_COMPAREVALUE0 0xFFFFF00F 7902#define S_028AC0_COMPAREMASK0(x) (((unsigned)(x) & 0xFF) << 12) 7903#define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF) 7904#define C_028AC0_COMPAREMASK0 0xFFF00FFF 7905#define S_028AC0_ENABLE0(x) (((unsigned)(x) & 0x1) << 24) 7906#define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1) 7907#define C_028AC0_ENABLE0 0xFEFFFFFF 7908#define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4 7909#define S_028AC4_COMPAREFUNC1(x) (((unsigned)(x) & 0x07) << 0) 7910#define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x07) 7911#define C_028AC4_COMPAREFUNC1 0xFFFFFFF8 7912#define V_028AC4_REF_NEVER 0x00 7913#define V_028AC4_REF_LESS 0x01 7914#define V_028AC4_REF_EQUAL 0x02 7915#define V_028AC4_REF_LEQUAL 0x03 7916#define V_028AC4_REF_GREATER 0x04 7917#define V_028AC4_REF_NOTEQUAL 0x05 7918#define V_028AC4_REF_GEQUAL 0x06 7919#define V_028AC4_REF_ALWAYS 0x07 7920#define S_028AC4_COMPAREVALUE1(x) (((unsigned)(x) & 0xFF) << 4) 7921#define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF) 7922#define C_028AC4_COMPAREVALUE1 0xFFFFF00F 7923#define S_028AC4_COMPAREMASK1(x) (((unsigned)(x) & 0xFF) << 12) 7924#define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF) 7925#define C_028AC4_COMPAREMASK1 0xFFF00FFF 7926#define S_028AC4_ENABLE1(x) (((unsigned)(x) & 0x1) << 24) 7927#define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1) 7928#define C_028AC4_ENABLE1 0xFEFFFFFF 7929#define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8 7930#define S_028AC8_START_X(x) (((unsigned)(x) & 0xFF) << 0) 7931#define G_028AC8_START_X(x) (((x) >> 0) & 0xFF) 7932#define C_028AC8_START_X 0xFFFFFF00 7933#define S_028AC8_START_Y(x) (((unsigned)(x) & 0xFF) << 8) 7934#define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF) 7935#define C_028AC8_START_Y 0xFFFF00FF 7936#define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xFF) << 16) 7937#define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF) 7938#define C_028AC8_MAX_X 0xFF00FFFF 7939#define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xFF) << 24) 7940#define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF) 7941#define C_028AC8_MAX_Y 0x00FFFFFF 7942#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 7943#define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 7944#define S_028AD4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 7945#define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF) 7946#define C_028AD4_STRIDE 0xFFFFFC00 7947#define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC 7948#define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 7949#define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 7950#define S_028AE4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 7951#define G_028AE4_STRIDE(x) (((x) >> 0) & 0x3FF) 7952#define C_028AE4_STRIDE 0xFFFFFC00 7953#define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC 7954#define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 7955#define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 7956#define S_028AF4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 7957#define G_028AF4_STRIDE(x) (((x) >> 0) & 0x3FF) 7958#define C_028AF4_STRIDE 0xFFFFFC00 7959#define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC 7960#define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 7961#define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 7962#define S_028B04_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 7963#define G_028B04_STRIDE(x) (((x) >> 0) & 0x3FF) 7964#define C_028B04_STRIDE 0xFFFFFC00 7965#define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C 7966#define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 7967#define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C 7968#define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 7969#define S_028B30_VERTEX_STRIDE(x) (((unsigned)(x) & 0x1FF) << 0) 7970#define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF) 7971#define C_028B30_VERTEX_STRIDE 0xFFFFFE00 7972#define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 7973#define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) 7974#define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF) 7975#define C_028B38_MAX_VERT_OUT 0xFFFFF800 7976/* VI */ 7977#define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50 7978#define S_028B50_ACCUM_ISOLINE(x) (((unsigned)(x) & 0xFF) << 0) 7979#define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF) 7980#define C_028B50_ACCUM_ISOLINE 0xFFFFFF00 7981#define S_028B50_ACCUM_TRI(x) (((unsigned)(x) & 0xFF) << 8) 7982#define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF) 7983#define C_028B50_ACCUM_TRI 0xFFFF00FF 7984#define S_028B50_ACCUM_QUAD(x) (((unsigned)(x) & 0xFF) << 16) 7985#define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF) 7986#define C_028B50_ACCUM_QUAD 0xFF00FFFF 7987#define S_028B50_DONUT_SPLIT(x) (((unsigned)(x) & 0x1F) << 24) 7988#define G_028B50_DONUT_SPLIT(x) (((x) >> 24) & 0x1F) 7989#define C_028B50_DONUT_SPLIT 0xE0FFFFFF 7990#define S_028B50_TRAP_SPLIT(x) (((unsigned)(x) & 0x7) << 29) /* Fiji+ */ 7991#define G_028B50_TRAP_SPLIT(x) (((x) >> 29) & 0x7) 7992#define C_028B50_TRAP_SPLIT 0x1FFFFFFF 7993/* */ 7994#define R_028B54_VGT_SHADER_STAGES_EN 0x028B54 7995#define S_028B54_LS_EN(x) (((unsigned)(x) & 0x03) << 0) 7996#define G_028B54_LS_EN(x) (((x) >> 0) & 0x03) 7997#define C_028B54_LS_EN 0xFFFFFFFC 7998#define V_028B54_LS_STAGE_OFF 0x00 7999#define V_028B54_LS_STAGE_ON 0x01 8000#define V_028B54_CS_STAGE_ON 0x02 8001#define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) 8002#define G_028B54_HS_EN(x) (((x) >> 2) & 0x1) 8003#define C_028B54_HS_EN 0xFFFFFFFB 8004#define S_028B54_ES_EN(x) (((unsigned)(x) & 0x03) << 3) 8005#define G_028B54_ES_EN(x) (((x) >> 3) & 0x03) 8006#define C_028B54_ES_EN 0xFFFFFFE7 8007#define V_028B54_ES_STAGE_OFF 0x00 8008#define V_028B54_ES_STAGE_DS 0x01 8009#define V_028B54_ES_STAGE_REAL 0x02 8010#define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) 8011#define G_028B54_GS_EN(x) (((x) >> 5) & 0x1) 8012#define C_028B54_GS_EN 0xFFFFFFDF 8013#define S_028B54_VS_EN(x) (((unsigned)(x) & 0x03) << 6) 8014#define G_028B54_VS_EN(x) (((x) >> 6) & 0x03) 8015#define C_028B54_VS_EN 0xFFFFFF3F 8016#define V_028B54_VS_STAGE_REAL 0x00 8017#define V_028B54_VS_STAGE_DS 0x01 8018#define V_028B54_VS_STAGE_COPY_SHADER 0x02 8019#define S_028B54_DYNAMIC_HS(x) (((unsigned)(x) & 0x1) << 8) 8020#define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1) 8021#define C_028B54_DYNAMIC_HS 0xFFFFFEFF 8022/* VI */ 8023#define S_028B54_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 9) 8024#define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1) 8025#define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF 8026#define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((unsigned)(x) & 0x1) << 10) 8027#define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1) 8028#define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF 8029#define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((unsigned)(x) & 0x1) << 11) 8030#define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1) 8031#define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF 8032#define S_028B54_VS_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 12) 8033#define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1) 8034#define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF 8035/* */ 8036#define R_028B58_VGT_LS_HS_CONFIG 0x028B58 8037#define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) 8038#define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) 8039#define C_028B58_NUM_PATCHES 0xFFFFFF00 8040#define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) 8041#define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) 8042#define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF 8043#define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) 8044#define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) 8045#define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF 8046#define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C 8047#define S_028B5C_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8048#define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8049#define C_028B5C_ITEMSIZE 0xFFFF8000 8050#define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60 8051#define S_028B60_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8052#define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8053#define C_028B60_ITEMSIZE 0xFFFF8000 8054#define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64 8055#define S_028B64_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8056#define G_028B64_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8057#define C_028B64_ITEMSIZE 0xFFFF8000 8058#define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68 8059#define S_028B68_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8060#define G_028B68_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8061#define C_028B68_ITEMSIZE 0xFFFF8000 8062#define R_028B6C_VGT_TF_PARAM 0x028B6C 8063#define S_028B6C_TYPE(x) (((unsigned)(x) & 0x03) << 0) 8064#define G_028B6C_TYPE(x) (((x) >> 0) & 0x03) 8065#define C_028B6C_TYPE 0xFFFFFFFC 8066#define V_028B6C_TESS_ISOLINE 0x00 8067#define V_028B6C_TESS_TRIANGLE 0x01 8068#define V_028B6C_TESS_QUAD 0x02 8069#define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x07) << 2) 8070#define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07) 8071#define C_028B6C_PARTITIONING 0xFFFFFFE3 8072#define V_028B6C_PART_INTEGER 0x00 8073#define V_028B6C_PART_POW2 0x01 8074#define V_028B6C_PART_FRAC_ODD 0x02 8075#define V_028B6C_PART_FRAC_EVEN 0x03 8076#define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x07) << 5) 8077#define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07) 8078#define C_028B6C_TOPOLOGY 0xFFFFFF1F 8079#define V_028B6C_OUTPUT_POINT 0x00 8080#define V_028B6C_OUTPUT_LINE 0x01 8081#define V_028B6C_OUTPUT_TRIANGLE_CW 0x02 8082#define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03 8083#define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) /* not on CIK */ 8084#define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) /* not on CIK */ 8085#define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF /* not on CIK */ 8086#define S_028B6C_DEPRECATED(x) (((unsigned)(x) & 0x1) << 9) 8087#define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1) 8088#define C_028B6C_DEPRECATED 0xFFFFFDFF 8089#define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0x0F) << 10) 8090#define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0x0F) 8091#define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF 8092#define S_028B6C_DISABLE_DONUTS(x) (((unsigned)(x) & 0x1) << 14) 8093#define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1) 8094#define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF 8095/* CIK */ 8096#define S_028B6C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 15) 8097#define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x03) 8098#define C_028B6C_RDREQ_POLICY 0xFFFE7FFF 8099#define V_028B6C_VGT_POLICY_LRU 0x00 8100#define V_028B6C_VGT_POLICY_STREAM 0x01 8101#define V_028B6C_VGT_POLICY_BYPASS 0x02 8102/* */ 8103/* VI */ 8104#define S_028B6C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 15) 8105#define G_028B6C_RDREQ_POLICY_VI(x) (((x) >> 15) & 0x1) 8106#define C_028B6C_RDREQ_POLICY_VI 0xFFFF7FFF 8107#define S_028B6C_DISTRIBUTION_MODE(x) (((unsigned)(x) & 0x03) << 17) 8108#define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x03) 8109#define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF 8110#define V_028B6C_DISTRIBUTION_MODE_NO_DIST 0x00 8111#define V_028B6C_DISTRIBUTION_MODE_PATCHES 0x01 8112#define V_028B6C_DISTRIBUTION_MODE_DONUTS 0x02 8113#define V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS 0x03 /* Fiji+ */ 8114#define S_028B6C_MTYPE(x) (((unsigned)(x) & 0x03) << 19) 8115#define G_028B6C_MTYPE(x) (((x) >> 19) & 0x03) 8116#define C_028B6C_MTYPE 0xFFE7FFFF 8117/* */ 8118#define R_028B70_DB_ALPHA_TO_MASK 0x028B70 8119#define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 8120#define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1) 8121#define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE 8122#define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x03) << 8) 8123#define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x03) 8124#define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF 8125#define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x03) << 10) 8126#define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x03) 8127#define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF 8128#define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x03) << 12) 8129#define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x03) 8130#define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF 8131#define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x03) << 14) 8132#define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x03) 8133#define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF 8134#define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) 8135#define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1) 8136#define C_028B70_OFFSET_ROUND 0xFFFEFFFF 8137/* CIK */ 8138#define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74 8139/* */ 8140#define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78 8141#define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) 8142#define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) 8143#define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 8144#define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) 8145#define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) 8146#define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF 8147#define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C 8148#define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80 8149#define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84 8150#define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88 8151#define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C 8152#define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90 8153#define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 8154#define G_028B90_ENABLE(x) (((x) >> 0) & 0x1) 8155#define C_028B90_ENABLE 0xFFFFFFFE 8156#define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) 8157#define G_028B90_CNT(x) (((x) >> 2) & 0x7F) 8158#define C_028B90_CNT 0xFFFFFE03 8159#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 8160#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) 8161#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) 8162#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE 8163#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) 8164#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) 8165#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD 8166#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) 8167#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) 8168#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB 8169#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) 8170#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) 8171#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 8172#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) 8173#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) 8174#define C_028B94_RAST_STREAM 0xFFFFFF8F 8175#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) 8176#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) 8177#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF 8178#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) 8179#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) 8180#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF 8181#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 8182#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) 8183#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) 8184#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 8185#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) 8186#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) 8187#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F 8188#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) 8189#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) 8190#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF 8191#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) 8192#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) 8193#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF 8194#define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4 8195#define S_028BD4_DISTANCE_0(x) (((unsigned)(x) & 0x0F) << 0) 8196#define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0x0F) 8197#define C_028BD4_DISTANCE_0 0xFFFFFFF0 8198#define S_028BD4_DISTANCE_1(x) (((unsigned)(x) & 0x0F) << 4) 8199#define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0x0F) 8200#define C_028BD4_DISTANCE_1 0xFFFFFF0F 8201#define S_028BD4_DISTANCE_2(x) (((unsigned)(x) & 0x0F) << 8) 8202#define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0x0F) 8203#define C_028BD4_DISTANCE_2 0xFFFFF0FF 8204#define S_028BD4_DISTANCE_3(x) (((unsigned)(x) & 0x0F) << 12) 8205#define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0x0F) 8206#define C_028BD4_DISTANCE_3 0xFFFF0FFF 8207#define S_028BD4_DISTANCE_4(x) (((unsigned)(x) & 0x0F) << 16) 8208#define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0x0F) 8209#define C_028BD4_DISTANCE_4 0xFFF0FFFF 8210#define S_028BD4_DISTANCE_5(x) (((unsigned)(x) & 0x0F) << 20) 8211#define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0x0F) 8212#define C_028BD4_DISTANCE_5 0xFF0FFFFF 8213#define S_028BD4_DISTANCE_6(x) (((unsigned)(x) & 0x0F) << 24) 8214#define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0x0F) 8215#define C_028BD4_DISTANCE_6 0xF0FFFFFF 8216#define S_028BD4_DISTANCE_7(x) (((unsigned)(x) & 0x0F) << 28) 8217#define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0x0F) 8218#define C_028BD4_DISTANCE_7 0x0FFFFFFF 8219#define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8 8220#define S_028BD8_DISTANCE_8(x) (((unsigned)(x) & 0x0F) << 0) 8221#define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0x0F) 8222#define C_028BD8_DISTANCE_8 0xFFFFFFF0 8223#define S_028BD8_DISTANCE_9(x) (((unsigned)(x) & 0x0F) << 4) 8224#define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0x0F) 8225#define C_028BD8_DISTANCE_9 0xFFFFFF0F 8226#define S_028BD8_DISTANCE_10(x) (((unsigned)(x) & 0x0F) << 8) 8227#define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0x0F) 8228#define C_028BD8_DISTANCE_10 0xFFFFF0FF 8229#define S_028BD8_DISTANCE_11(x) (((unsigned)(x) & 0x0F) << 12) 8230#define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0x0F) 8231#define C_028BD8_DISTANCE_11 0xFFFF0FFF 8232#define S_028BD8_DISTANCE_12(x) (((unsigned)(x) & 0x0F) << 16) 8233#define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0x0F) 8234#define C_028BD8_DISTANCE_12 0xFFF0FFFF 8235#define S_028BD8_DISTANCE_13(x) (((unsigned)(x) & 0x0F) << 20) 8236#define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0x0F) 8237#define C_028BD8_DISTANCE_13 0xFF0FFFFF 8238#define S_028BD8_DISTANCE_14(x) (((unsigned)(x) & 0x0F) << 24) 8239#define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0x0F) 8240#define C_028BD8_DISTANCE_14 0xF0FFFFFF 8241#define S_028BD8_DISTANCE_15(x) (((unsigned)(x) & 0x0F) << 28) 8242#define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0x0F) 8243#define C_028BD8_DISTANCE_15 0x0FFFFFFF 8244#define R_028BDC_PA_SC_LINE_CNTL 0x028BDC 8245#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 8246#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 8247#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF 8248#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 8249#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) 8250#define C_028BDC_LAST_PIXEL 0xFFFFFBFF 8251#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) 8252#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) 8253#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF 8254#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) 8255#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) 8256#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF 8257#define R_028BE0_PA_SC_AA_CONFIG 0x028BE0 8258#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 8259#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) 8260#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 8261#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 8262#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) 8263#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF 8264#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) 8265#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) 8266#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF 8267#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) 8268#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) 8269#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF 8270#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) 8271#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) 8272#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF 8273#define R_028BE4_PA_SU_VTX_CNTL 0x028BE4 8274#define S_028BE4_PIX_CENTER(x) (((unsigned)(x) & 0x1) << 0) 8275#define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1) 8276#define C_028BE4_PIX_CENTER 0xFFFFFFFE 8277#define S_028BE4_ROUND_MODE(x) (((unsigned)(x) & 0x03) << 1) 8278#define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x03) 8279#define C_028BE4_ROUND_MODE 0xFFFFFFF9 8280#define V_028BE4_X_TRUNCATE 0x00 8281#define V_028BE4_X_ROUND 0x01 8282#define V_028BE4_X_ROUND_TO_EVEN 0x02 8283#define V_028BE4_X_ROUND_TO_ODD 0x03 8284#define S_028BE4_QUANT_MODE(x) (((unsigned)(x) & 0x07) << 3) 8285#define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x07) 8286#define C_028BE4_QUANT_MODE 0xFFFFFFC7 8287#define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0x00 8288#define V_028BE4_X_16_8_FIXED_POINT_1_8TH 0x01 8289#define V_028BE4_X_16_8_FIXED_POINT_1_4TH 0x02 8290#define V_028BE4_X_16_8_FIXED_POINT_1_2 0x03 8291#define V_028BE4_X_16_8_FIXED_POINT_1 0x04 8292#define V_028BE4_X_16_8_FIXED_POINT_1_256TH 0x05 8293#define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 0x06 8294#define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 0x07 8295#define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8 8296#define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC 8297#define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0 8298#define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4 8299#define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8 8300#define S_028BF8_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8301#define G_028BF8_S0_X(x) (((x) >> 0) & 0x0F) 8302#define C_028BF8_S0_X 0xFFFFFFF0 8303#define S_028BF8_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8304#define G_028BF8_S0_Y(x) (((x) >> 4) & 0x0F) 8305#define C_028BF8_S0_Y 0xFFFFFF0F 8306#define S_028BF8_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8307#define G_028BF8_S1_X(x) (((x) >> 8) & 0x0F) 8308#define C_028BF8_S1_X 0xFFFFF0FF 8309#define S_028BF8_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8310#define G_028BF8_S1_Y(x) (((x) >> 12) & 0x0F) 8311#define C_028BF8_S1_Y 0xFFFF0FFF 8312#define S_028BF8_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8313#define G_028BF8_S2_X(x) (((x) >> 16) & 0x0F) 8314#define C_028BF8_S2_X 0xFFF0FFFF 8315#define S_028BF8_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8316#define G_028BF8_S2_Y(x) (((x) >> 20) & 0x0F) 8317#define C_028BF8_S2_Y 0xFF0FFFFF 8318#define S_028BF8_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8319#define G_028BF8_S3_X(x) (((x) >> 24) & 0x0F) 8320#define C_028BF8_S3_X 0xF0FFFFFF 8321#define S_028BF8_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8322#define G_028BF8_S3_Y(x) (((x) >> 28) & 0x0F) 8323#define C_028BF8_S3_Y 0x0FFFFFFF 8324#define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC 8325#define S_028BFC_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8326#define G_028BFC_S4_X(x) (((x) >> 0) & 0x0F) 8327#define C_028BFC_S4_X 0xFFFFFFF0 8328#define S_028BFC_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8329#define G_028BFC_S4_Y(x) (((x) >> 4) & 0x0F) 8330#define C_028BFC_S4_Y 0xFFFFFF0F 8331#define S_028BFC_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8332#define G_028BFC_S5_X(x) (((x) >> 8) & 0x0F) 8333#define C_028BFC_S5_X 0xFFFFF0FF 8334#define S_028BFC_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8335#define G_028BFC_S5_Y(x) (((x) >> 12) & 0x0F) 8336#define C_028BFC_S5_Y 0xFFFF0FFF 8337#define S_028BFC_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8338#define G_028BFC_S6_X(x) (((x) >> 16) & 0x0F) 8339#define C_028BFC_S6_X 0xFFF0FFFF 8340#define S_028BFC_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8341#define G_028BFC_S6_Y(x) (((x) >> 20) & 0x0F) 8342#define C_028BFC_S6_Y 0xFF0FFFFF 8343#define S_028BFC_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8344#define G_028BFC_S7_X(x) (((x) >> 24) & 0x0F) 8345#define C_028BFC_S7_X 0xF0FFFFFF 8346#define S_028BFC_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8347#define G_028BFC_S7_Y(x) (((x) >> 28) & 0x0F) 8348#define C_028BFC_S7_Y 0x0FFFFFFF 8349#define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00 8350#define S_028C00_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8351#define G_028C00_S8_X(x) (((x) >> 0) & 0x0F) 8352#define C_028C00_S8_X 0xFFFFFFF0 8353#define S_028C00_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8354#define G_028C00_S8_Y(x) (((x) >> 4) & 0x0F) 8355#define C_028C00_S8_Y 0xFFFFFF0F 8356#define S_028C00_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8357#define G_028C00_S9_X(x) (((x) >> 8) & 0x0F) 8358#define C_028C00_S9_X 0xFFFFF0FF 8359#define S_028C00_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8360#define G_028C00_S9_Y(x) (((x) >> 12) & 0x0F) 8361#define C_028C00_S9_Y 0xFFFF0FFF 8362#define S_028C00_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8363#define G_028C00_S10_X(x) (((x) >> 16) & 0x0F) 8364#define C_028C00_S10_X 0xFFF0FFFF 8365#define S_028C00_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8366#define G_028C00_S10_Y(x) (((x) >> 20) & 0x0F) 8367#define C_028C00_S10_Y 0xFF0FFFFF 8368#define S_028C00_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8369#define G_028C00_S11_X(x) (((x) >> 24) & 0x0F) 8370#define C_028C00_S11_X 0xF0FFFFFF 8371#define S_028C00_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8372#define G_028C00_S11_Y(x) (((x) >> 28) & 0x0F) 8373#define C_028C00_S11_Y 0x0FFFFFFF 8374#define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04 8375#define S_028C04_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8376#define G_028C04_S12_X(x) (((x) >> 0) & 0x0F) 8377#define C_028C04_S12_X 0xFFFFFFF0 8378#define S_028C04_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8379#define G_028C04_S12_Y(x) (((x) >> 4) & 0x0F) 8380#define C_028C04_S12_Y 0xFFFFFF0F 8381#define S_028C04_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8382#define G_028C04_S13_X(x) (((x) >> 8) & 0x0F) 8383#define C_028C04_S13_X 0xFFFFF0FF 8384#define S_028C04_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8385#define G_028C04_S13_Y(x) (((x) >> 12) & 0x0F) 8386#define C_028C04_S13_Y 0xFFFF0FFF 8387#define S_028C04_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8388#define G_028C04_S14_X(x) (((x) >> 16) & 0x0F) 8389#define C_028C04_S14_X 0xFFF0FFFF 8390#define S_028C04_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8391#define G_028C04_S14_Y(x) (((x) >> 20) & 0x0F) 8392#define C_028C04_S14_Y 0xFF0FFFFF 8393#define S_028C04_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8394#define G_028C04_S15_X(x) (((x) >> 24) & 0x0F) 8395#define C_028C04_S15_X 0xF0FFFFFF 8396#define S_028C04_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8397#define G_028C04_S15_Y(x) (((x) >> 28) & 0x0F) 8398#define C_028C04_S15_Y 0x0FFFFFFF 8399#define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08 8400#define S_028C08_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8401#define G_028C08_S0_X(x) (((x) >> 0) & 0x0F) 8402#define C_028C08_S0_X 0xFFFFFFF0 8403#define S_028C08_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8404#define G_028C08_S0_Y(x) (((x) >> 4) & 0x0F) 8405#define C_028C08_S0_Y 0xFFFFFF0F 8406#define S_028C08_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8407#define G_028C08_S1_X(x) (((x) >> 8) & 0x0F) 8408#define C_028C08_S1_X 0xFFFFF0FF 8409#define S_028C08_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8410#define G_028C08_S1_Y(x) (((x) >> 12) & 0x0F) 8411#define C_028C08_S1_Y 0xFFFF0FFF 8412#define S_028C08_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8413#define G_028C08_S2_X(x) (((x) >> 16) & 0x0F) 8414#define C_028C08_S2_X 0xFFF0FFFF 8415#define S_028C08_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8416#define G_028C08_S2_Y(x) (((x) >> 20) & 0x0F) 8417#define C_028C08_S2_Y 0xFF0FFFFF 8418#define S_028C08_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8419#define G_028C08_S3_X(x) (((x) >> 24) & 0x0F) 8420#define C_028C08_S3_X 0xF0FFFFFF 8421#define S_028C08_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8422#define G_028C08_S3_Y(x) (((x) >> 28) & 0x0F) 8423#define C_028C08_S3_Y 0x0FFFFFFF 8424#define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C 8425#define S_028C0C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8426#define G_028C0C_S4_X(x) (((x) >> 0) & 0x0F) 8427#define C_028C0C_S4_X 0xFFFFFFF0 8428#define S_028C0C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8429#define G_028C0C_S4_Y(x) (((x) >> 4) & 0x0F) 8430#define C_028C0C_S4_Y 0xFFFFFF0F 8431#define S_028C0C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8432#define G_028C0C_S5_X(x) (((x) >> 8) & 0x0F) 8433#define C_028C0C_S5_X 0xFFFFF0FF 8434#define S_028C0C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8435#define G_028C0C_S5_Y(x) (((x) >> 12) & 0x0F) 8436#define C_028C0C_S5_Y 0xFFFF0FFF 8437#define S_028C0C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8438#define G_028C0C_S6_X(x) (((x) >> 16) & 0x0F) 8439#define C_028C0C_S6_X 0xFFF0FFFF 8440#define S_028C0C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8441#define G_028C0C_S6_Y(x) (((x) >> 20) & 0x0F) 8442#define C_028C0C_S6_Y 0xFF0FFFFF 8443#define S_028C0C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8444#define G_028C0C_S7_X(x) (((x) >> 24) & 0x0F) 8445#define C_028C0C_S7_X 0xF0FFFFFF 8446#define S_028C0C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8447#define G_028C0C_S7_Y(x) (((x) >> 28) & 0x0F) 8448#define C_028C0C_S7_Y 0x0FFFFFFF 8449#define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10 8450#define S_028C10_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8451#define G_028C10_S8_X(x) (((x) >> 0) & 0x0F) 8452#define C_028C10_S8_X 0xFFFFFFF0 8453#define S_028C10_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8454#define G_028C10_S8_Y(x) (((x) >> 4) & 0x0F) 8455#define C_028C10_S8_Y 0xFFFFFF0F 8456#define S_028C10_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8457#define G_028C10_S9_X(x) (((x) >> 8) & 0x0F) 8458#define C_028C10_S9_X 0xFFFFF0FF 8459#define S_028C10_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8460#define G_028C10_S9_Y(x) (((x) >> 12) & 0x0F) 8461#define C_028C10_S9_Y 0xFFFF0FFF 8462#define S_028C10_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8463#define G_028C10_S10_X(x) (((x) >> 16) & 0x0F) 8464#define C_028C10_S10_X 0xFFF0FFFF 8465#define S_028C10_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8466#define G_028C10_S10_Y(x) (((x) >> 20) & 0x0F) 8467#define C_028C10_S10_Y 0xFF0FFFFF 8468#define S_028C10_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8469#define G_028C10_S11_X(x) (((x) >> 24) & 0x0F) 8470#define C_028C10_S11_X 0xF0FFFFFF 8471#define S_028C10_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8472#define G_028C10_S11_Y(x) (((x) >> 28) & 0x0F) 8473#define C_028C10_S11_Y 0x0FFFFFFF 8474#define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14 8475#define S_028C14_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8476#define G_028C14_S12_X(x) (((x) >> 0) & 0x0F) 8477#define C_028C14_S12_X 0xFFFFFFF0 8478#define S_028C14_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8479#define G_028C14_S12_Y(x) (((x) >> 4) & 0x0F) 8480#define C_028C14_S12_Y 0xFFFFFF0F 8481#define S_028C14_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8482#define G_028C14_S13_X(x) (((x) >> 8) & 0x0F) 8483#define C_028C14_S13_X 0xFFFFF0FF 8484#define S_028C14_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8485#define G_028C14_S13_Y(x) (((x) >> 12) & 0x0F) 8486#define C_028C14_S13_Y 0xFFFF0FFF 8487#define S_028C14_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8488#define G_028C14_S14_X(x) (((x) >> 16) & 0x0F) 8489#define C_028C14_S14_X 0xFFF0FFFF 8490#define S_028C14_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8491#define G_028C14_S14_Y(x) (((x) >> 20) & 0x0F) 8492#define C_028C14_S14_Y 0xFF0FFFFF 8493#define S_028C14_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8494#define G_028C14_S15_X(x) (((x) >> 24) & 0x0F) 8495#define C_028C14_S15_X 0xF0FFFFFF 8496#define S_028C14_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8497#define G_028C14_S15_Y(x) (((x) >> 28) & 0x0F) 8498#define C_028C14_S15_Y 0x0FFFFFFF 8499#define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18 8500#define S_028C18_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8501#define G_028C18_S0_X(x) (((x) >> 0) & 0x0F) 8502#define C_028C18_S0_X 0xFFFFFFF0 8503#define S_028C18_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8504#define G_028C18_S0_Y(x) (((x) >> 4) & 0x0F) 8505#define C_028C18_S0_Y 0xFFFFFF0F 8506#define S_028C18_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8507#define G_028C18_S1_X(x) (((x) >> 8) & 0x0F) 8508#define C_028C18_S1_X 0xFFFFF0FF 8509#define S_028C18_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8510#define G_028C18_S1_Y(x) (((x) >> 12) & 0x0F) 8511#define C_028C18_S1_Y 0xFFFF0FFF 8512#define S_028C18_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8513#define G_028C18_S2_X(x) (((x) >> 16) & 0x0F) 8514#define C_028C18_S2_X 0xFFF0FFFF 8515#define S_028C18_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8516#define G_028C18_S2_Y(x) (((x) >> 20) & 0x0F) 8517#define C_028C18_S2_Y 0xFF0FFFFF 8518#define S_028C18_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8519#define G_028C18_S3_X(x) (((x) >> 24) & 0x0F) 8520#define C_028C18_S3_X 0xF0FFFFFF 8521#define S_028C18_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8522#define G_028C18_S3_Y(x) (((x) >> 28) & 0x0F) 8523#define C_028C18_S3_Y 0x0FFFFFFF 8524#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C 8525#define S_028C1C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8526#define G_028C1C_S4_X(x) (((x) >> 0) & 0x0F) 8527#define C_028C1C_S4_X 0xFFFFFFF0 8528#define S_028C1C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8529#define G_028C1C_S4_Y(x) (((x) >> 4) & 0x0F) 8530#define C_028C1C_S4_Y 0xFFFFFF0F 8531#define S_028C1C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8532#define G_028C1C_S5_X(x) (((x) >> 8) & 0x0F) 8533#define C_028C1C_S5_X 0xFFFFF0FF 8534#define S_028C1C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8535#define G_028C1C_S5_Y(x) (((x) >> 12) & 0x0F) 8536#define C_028C1C_S5_Y 0xFFFF0FFF 8537#define S_028C1C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8538#define G_028C1C_S6_X(x) (((x) >> 16) & 0x0F) 8539#define C_028C1C_S6_X 0xFFF0FFFF 8540#define S_028C1C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8541#define G_028C1C_S6_Y(x) (((x) >> 20) & 0x0F) 8542#define C_028C1C_S6_Y 0xFF0FFFFF 8543#define S_028C1C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8544#define G_028C1C_S7_X(x) (((x) >> 24) & 0x0F) 8545#define C_028C1C_S7_X 0xF0FFFFFF 8546#define S_028C1C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8547#define G_028C1C_S7_Y(x) (((x) >> 28) & 0x0F) 8548#define C_028C1C_S7_Y 0x0FFFFFFF 8549#define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20 8550#define S_028C20_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8551#define G_028C20_S8_X(x) (((x) >> 0) & 0x0F) 8552#define C_028C20_S8_X 0xFFFFFFF0 8553#define S_028C20_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8554#define G_028C20_S8_Y(x) (((x) >> 4) & 0x0F) 8555#define C_028C20_S8_Y 0xFFFFFF0F 8556#define S_028C20_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8557#define G_028C20_S9_X(x) (((x) >> 8) & 0x0F) 8558#define C_028C20_S9_X 0xFFFFF0FF 8559#define S_028C20_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8560#define G_028C20_S9_Y(x) (((x) >> 12) & 0x0F) 8561#define C_028C20_S9_Y 0xFFFF0FFF 8562#define S_028C20_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8563#define G_028C20_S10_X(x) (((x) >> 16) & 0x0F) 8564#define C_028C20_S10_X 0xFFF0FFFF 8565#define S_028C20_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8566#define G_028C20_S10_Y(x) (((x) >> 20) & 0x0F) 8567#define C_028C20_S10_Y 0xFF0FFFFF 8568#define S_028C20_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8569#define G_028C20_S11_X(x) (((x) >> 24) & 0x0F) 8570#define C_028C20_S11_X 0xF0FFFFFF 8571#define S_028C20_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8572#define G_028C20_S11_Y(x) (((x) >> 28) & 0x0F) 8573#define C_028C20_S11_Y 0x0FFFFFFF 8574#define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24 8575#define S_028C24_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8576#define G_028C24_S12_X(x) (((x) >> 0) & 0x0F) 8577#define C_028C24_S12_X 0xFFFFFFF0 8578#define S_028C24_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8579#define G_028C24_S12_Y(x) (((x) >> 4) & 0x0F) 8580#define C_028C24_S12_Y 0xFFFFFF0F 8581#define S_028C24_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8582#define G_028C24_S13_X(x) (((x) >> 8) & 0x0F) 8583#define C_028C24_S13_X 0xFFFFF0FF 8584#define S_028C24_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8585#define G_028C24_S13_Y(x) (((x) >> 12) & 0x0F) 8586#define C_028C24_S13_Y 0xFFFF0FFF 8587#define S_028C24_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8588#define G_028C24_S14_X(x) (((x) >> 16) & 0x0F) 8589#define C_028C24_S14_X 0xFFF0FFFF 8590#define S_028C24_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8591#define G_028C24_S14_Y(x) (((x) >> 20) & 0x0F) 8592#define C_028C24_S14_Y 0xFF0FFFFF 8593#define S_028C24_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8594#define G_028C24_S15_X(x) (((x) >> 24) & 0x0F) 8595#define C_028C24_S15_X 0xF0FFFFFF 8596#define S_028C24_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8597#define G_028C24_S15_Y(x) (((x) >> 28) & 0x0F) 8598#define C_028C24_S15_Y 0x0FFFFFFF 8599#define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28 8600#define S_028C28_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8601#define G_028C28_S0_X(x) (((x) >> 0) & 0x0F) 8602#define C_028C28_S0_X 0xFFFFFFF0 8603#define S_028C28_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8604#define G_028C28_S0_Y(x) (((x) >> 4) & 0x0F) 8605#define C_028C28_S0_Y 0xFFFFFF0F 8606#define S_028C28_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8607#define G_028C28_S1_X(x) (((x) >> 8) & 0x0F) 8608#define C_028C28_S1_X 0xFFFFF0FF 8609#define S_028C28_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8610#define G_028C28_S1_Y(x) (((x) >> 12) & 0x0F) 8611#define C_028C28_S1_Y 0xFFFF0FFF 8612#define S_028C28_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8613#define G_028C28_S2_X(x) (((x) >> 16) & 0x0F) 8614#define C_028C28_S2_X 0xFFF0FFFF 8615#define S_028C28_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8616#define G_028C28_S2_Y(x) (((x) >> 20) & 0x0F) 8617#define C_028C28_S2_Y 0xFF0FFFFF 8618#define S_028C28_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8619#define G_028C28_S3_X(x) (((x) >> 24) & 0x0F) 8620#define C_028C28_S3_X 0xF0FFFFFF 8621#define S_028C28_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8622#define G_028C28_S3_Y(x) (((x) >> 28) & 0x0F) 8623#define C_028C28_S3_Y 0x0FFFFFFF 8624#define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C 8625#define S_028C2C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8626#define G_028C2C_S4_X(x) (((x) >> 0) & 0x0F) 8627#define C_028C2C_S4_X 0xFFFFFFF0 8628#define S_028C2C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8629#define G_028C2C_S4_Y(x) (((x) >> 4) & 0x0F) 8630#define C_028C2C_S4_Y 0xFFFFFF0F 8631#define S_028C2C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8632#define G_028C2C_S5_X(x) (((x) >> 8) & 0x0F) 8633#define C_028C2C_S5_X 0xFFFFF0FF 8634#define S_028C2C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8635#define G_028C2C_S5_Y(x) (((x) >> 12) & 0x0F) 8636#define C_028C2C_S5_Y 0xFFFF0FFF 8637#define S_028C2C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8638#define G_028C2C_S6_X(x) (((x) >> 16) & 0x0F) 8639#define C_028C2C_S6_X 0xFFF0FFFF 8640#define S_028C2C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8641#define G_028C2C_S6_Y(x) (((x) >> 20) & 0x0F) 8642#define C_028C2C_S6_Y 0xFF0FFFFF 8643#define S_028C2C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8644#define G_028C2C_S7_X(x) (((x) >> 24) & 0x0F) 8645#define C_028C2C_S7_X 0xF0FFFFFF 8646#define S_028C2C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8647#define G_028C2C_S7_Y(x) (((x) >> 28) & 0x0F) 8648#define C_028C2C_S7_Y 0x0FFFFFFF 8649#define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30 8650#define S_028C30_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8651#define G_028C30_S8_X(x) (((x) >> 0) & 0x0F) 8652#define C_028C30_S8_X 0xFFFFFFF0 8653#define S_028C30_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8654#define G_028C30_S8_Y(x) (((x) >> 4) & 0x0F) 8655#define C_028C30_S8_Y 0xFFFFFF0F 8656#define S_028C30_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8657#define G_028C30_S9_X(x) (((x) >> 8) & 0x0F) 8658#define C_028C30_S9_X 0xFFFFF0FF 8659#define S_028C30_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8660#define G_028C30_S9_Y(x) (((x) >> 12) & 0x0F) 8661#define C_028C30_S9_Y 0xFFFF0FFF 8662#define S_028C30_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8663#define G_028C30_S10_X(x) (((x) >> 16) & 0x0F) 8664#define C_028C30_S10_X 0xFFF0FFFF 8665#define S_028C30_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8666#define G_028C30_S10_Y(x) (((x) >> 20) & 0x0F) 8667#define C_028C30_S10_Y 0xFF0FFFFF 8668#define S_028C30_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8669#define G_028C30_S11_X(x) (((x) >> 24) & 0x0F) 8670#define C_028C30_S11_X 0xF0FFFFFF 8671#define S_028C30_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8672#define G_028C30_S11_Y(x) (((x) >> 28) & 0x0F) 8673#define C_028C30_S11_Y 0x0FFFFFFF 8674#define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34 8675#define S_028C34_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8676#define G_028C34_S12_X(x) (((x) >> 0) & 0x0F) 8677#define C_028C34_S12_X 0xFFFFFFF0 8678#define S_028C34_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8679#define G_028C34_S12_Y(x) (((x) >> 4) & 0x0F) 8680#define C_028C34_S12_Y 0xFFFFFF0F 8681#define S_028C34_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8682#define G_028C34_S13_X(x) (((x) >> 8) & 0x0F) 8683#define C_028C34_S13_X 0xFFFFF0FF 8684#define S_028C34_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8685#define G_028C34_S13_Y(x) (((x) >> 12) & 0x0F) 8686#define C_028C34_S13_Y 0xFFFF0FFF 8687#define S_028C34_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8688#define G_028C34_S14_X(x) (((x) >> 16) & 0x0F) 8689#define C_028C34_S14_X 0xFFF0FFFF 8690#define S_028C34_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8691#define G_028C34_S14_Y(x) (((x) >> 20) & 0x0F) 8692#define C_028C34_S14_Y 0xFF0FFFFF 8693#define S_028C34_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8694#define G_028C34_S15_X(x) (((x) >> 24) & 0x0F) 8695#define C_028C34_S15_X 0xF0FFFFFF 8696#define S_028C34_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8697#define G_028C34_S15_Y(x) (((x) >> 28) & 0x0F) 8698#define C_028C34_S15_Y 0x0FFFFFFF 8699#define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38 8700#define S_028C38_AA_MASK_X0Y0(x) (((unsigned)(x) & 0xFFFF) << 0) 8701#define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF) 8702#define C_028C38_AA_MASK_X0Y0 0xFFFF0000 8703#define S_028C38_AA_MASK_X1Y0(x) (((unsigned)(x) & 0xFFFF) << 16) 8704#define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF) 8705#define C_028C38_AA_MASK_X1Y0 0x0000FFFF 8706#define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C 8707#define S_028C3C_AA_MASK_X0Y1(x) (((unsigned)(x) & 0xFFFF) << 0) 8708#define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF) 8709#define C_028C3C_AA_MASK_X0Y1 0xFFFF0000 8710#define S_028C3C_AA_MASK_X1Y1(x) (((unsigned)(x) & 0xFFFF) << 16) 8711#define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF) 8712#define C_028C3C_AA_MASK_X1Y1 0x0000FFFF 8713/* Stoney */ 8714#define R_028C40_PA_SC_SHADER_CONTROL 0x028C40 8715#define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((unsigned)(x) & 0x03) << 0) 8716#define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x03) 8717#define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC 8718/* */ 8719#define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58 8720#define S_028C58_VTX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 8721#define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 8722#define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00 8723#define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C 8724#define S_028C5C_DEALLOC_DIST(x) (((unsigned)(x) & 0x7F) << 0) 8725#define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F) 8726#define C_028C5C_DEALLOC_DIST 0xFFFFFF80 8727#define R_028C60_CB_COLOR0_BASE 0x028C60 8728#define R_028C64_CB_COLOR0_PITCH 0x028C64 8729#define S_028C64_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 8730#define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF) 8731#define C_028C64_TILE_MAX 0xFFFFF800 8732/* CIK */ 8733#define S_028C64_FMASK_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 20) 8734#define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF) 8735#define C_028C64_FMASK_TILE_MAX 0x800FFFFF 8736/* */ 8737#define R_028C68_CB_COLOR0_SLICE 0x028C68 8738#define S_028C68_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 8739#define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 8740#define C_028C68_TILE_MAX 0xFFC00000 8741#define R_028C6C_CB_COLOR0_VIEW 0x028C6C 8742#define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 8743#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) 8744#define C_028C6C_SLICE_START 0xFFFFF800 8745#define S_028C6C_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 8746#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 8747#define C_028C6C_SLICE_MAX 0xFF001FFF 8748#define R_028C70_CB_COLOR0_INFO 0x028C70 8749#define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x03) << 0) 8750#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x03) 8751#define C_028C70_ENDIAN 0xFFFFFFFC 8752#define V_028C70_ENDIAN_NONE 0x00 8753#define V_028C70_ENDIAN_8IN16 0x01 8754#define V_028C70_ENDIAN_8IN32 0x02 8755#define V_028C70_ENDIAN_8IN64 0x03 8756#define S_028C70_FORMAT(x) (((unsigned)(x) & 0x1F) << 2) 8757#define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F) 8758#define C_028C70_FORMAT 0xFFFFFF83 8759#define V_028C70_COLOR_INVALID 0x00 8760#define V_028C70_COLOR_8 0x01 8761#define V_028C70_COLOR_16 0x02 8762#define V_028C70_COLOR_8_8 0x03 8763#define V_028C70_COLOR_32 0x04 8764#define V_028C70_COLOR_16_16 0x05 8765#define V_028C70_COLOR_10_11_11 0x06 8766#define V_028C70_COLOR_11_11_10 0x07 8767#define V_028C70_COLOR_10_10_10_2 0x08 8768#define V_028C70_COLOR_2_10_10_10 0x09 8769#define V_028C70_COLOR_8_8_8_8 0x0A 8770#define V_028C70_COLOR_32_32 0x0B 8771#define V_028C70_COLOR_16_16_16_16 0x0C 8772#define V_028C70_COLOR_32_32_32_32 0x0E 8773#define V_028C70_COLOR_5_6_5 0x10 8774#define V_028C70_COLOR_1_5_5_5 0x11 8775#define V_028C70_COLOR_5_5_5_1 0x12 8776#define V_028C70_COLOR_4_4_4_4 0x13 8777#define V_028C70_COLOR_8_24 0x14 8778#define V_028C70_COLOR_24_8 0x15 8779#define V_028C70_COLOR_X24_8_32_FLOAT 0x16 8780#define S_028C70_LINEAR_GENERAL(x) (((unsigned)(x) & 0x1) << 7) 8781#define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1) 8782#define C_028C70_LINEAR_GENERAL 0xFFFFFF7F 8783#define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x07) << 8) 8784#define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x07) 8785#define C_028C70_NUMBER_TYPE 0xFFFFF8FF 8786#define V_028C70_NUMBER_UNORM 0x00 8787#define V_028C70_NUMBER_SNORM 0x01 8788#define V_028C70_NUMBER_UINT 0x04 8789#define V_028C70_NUMBER_SINT 0x05 8790#define V_028C70_NUMBER_SRGB 0x06 8791#define V_028C70_NUMBER_FLOAT 0x07 8792#define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x03) << 11) 8793#define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x03) 8794#define C_028C70_COMP_SWAP 0xFFFFE7FF 8795#define V_028C70_SWAP_STD 0x00 8796#define V_028C70_SWAP_ALT 0x01 8797#define V_028C70_SWAP_STD_REV 0x02 8798#define V_028C70_SWAP_ALT_REV 0x03 8799#define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) 8800#define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1) 8801#define C_028C70_FAST_CLEAR 0xFFFFDFFF 8802#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 14) 8803#define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1) 8804#define C_028C70_COMPRESSION 0xFFFFBFFF 8805#define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 15) 8806#define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1) 8807#define C_028C70_BLEND_CLAMP 0xFFFF7FFF 8808#define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 16) 8809#define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1) 8810#define C_028C70_BLEND_BYPASS 0xFFFEFFFF 8811#define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 17) 8812#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1) 8813#define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF 8814#define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 18) 8815#define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1) 8816#define C_028C70_ROUND_MODE 0xFFFBFFFF 8817#define S_028C70_CMASK_IS_LINEAR(x) (((unsigned)(x) & 0x1) << 19) 8818#define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1) 8819#define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF 8820#define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((unsigned)(x) & 0x07) << 20) 8821#define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x07) 8822#define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF 8823#define V_028C70_FORCE_OPT_AUTO 0x00 8824#define V_028C70_FORCE_OPT_DISABLE 0x01 8825#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 8826#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 8827#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 8828#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 8829#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 8830#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 8831#define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((unsigned)(x) & 0x07) << 23) 8832#define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x07) 8833#define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF 8834#define V_028C70_FORCE_OPT_AUTO 0x00 8835#define V_028C70_FORCE_OPT_DISABLE 0x01 8836#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 8837#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 8838#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 8839#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 8840#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 8841#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 8842/* CIK */ 8843#define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 8844#define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1) 8845#define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF 8846/* */ 8847/* VI */ 8848#define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((unsigned)(x) & 0x1) << 27) 8849#define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1) 8850#define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF 8851#define S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 8852#define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1) 8853#define C_028C70_DCC_ENABLE 0xEFFFFFFF 8854#define S_028C70_CMASK_ADDR_TYPE(x) (((unsigned)(x) & 0x03) << 29) 8855#define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x03) 8856#define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF 8857/* */ 8858#define R_028C74_CB_COLOR0_ATTRIB 0x028C74 8859#define S_028C74_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 0) 8860#define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F) 8861#define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0 8862#define S_028C74_FMASK_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 5) 8863#define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F) 8864#define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F 8865#define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 10) 8866#define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x03) 8867#define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF 8868#define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) 8869#define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 8870#define C_028C74_NUM_SAMPLES 0xFFFF8FFF 8871#define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x03) << 15) 8872#define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x03) 8873#define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF 8874#define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 17) 8875#define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1) 8876#define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF 8877/* VI */ 8878#define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78 8879#define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 8880#define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 8881#define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 8882#define S_028C78_KEY_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 8883#define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 8884#define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD 8885#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2) 8886#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03) 8887#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3 8888#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4) 8889#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1) 8890#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF 8891#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5) 8892#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03) 8893#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F 8894#define S_028C78_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x03) << 7) 8895#define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x03) 8896#define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F 8897#define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((unsigned)(x) & 0x1) << 9) 8898#define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1) 8899#define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF 8900#define S_028C78_LOSSY_RGB_PRECISION(x) (((unsigned)(x) & 0x0F) << 10) 8901#define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0x0F) 8902#define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF 8903#define S_028C78_LOSSY_ALPHA_PRECISION(x) (((unsigned)(x) & 0x0F) << 14) 8904#define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0x0F) 8905#define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF 8906/* */ 8907#define R_028C7C_CB_COLOR0_CMASK 0x028C7C 8908#define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 8909#define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) 8910#define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF) 8911#define C_028C80_TILE_MAX 0xFFFFC000 8912#define R_028C84_CB_COLOR0_FMASK 0x028C84 8913#define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 8914#define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 8915#define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 8916#define C_028C88_TILE_MAX 0xFFC00000 8917#define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C 8918#define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 8919#define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* VI */ 8920#define R_028C9C_CB_COLOR1_BASE 0x028C9C 8921#define R_028CA0_CB_COLOR1_PITCH 0x028CA0 8922#define R_028CA4_CB_COLOR1_SLICE 0x028CA4 8923#define R_028CA8_CB_COLOR1_VIEW 0x028CA8 8924#define R_028CAC_CB_COLOR1_INFO 0x028CAC 8925#define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0 8926#define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* VI */ 8927#define R_028CB8_CB_COLOR1_CMASK 0x028CB8 8928#define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC 8929#define R_028CC0_CB_COLOR1_FMASK 0x028CC0 8930#define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 8931#define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 8932#define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC 8933#define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* VI */ 8934#define R_028CD8_CB_COLOR2_BASE 0x028CD8 8935#define R_028CDC_CB_COLOR2_PITCH 0x028CDC 8936#define R_028CE0_CB_COLOR2_SLICE 0x028CE0 8937#define R_028CE4_CB_COLOR2_VIEW 0x028CE4 8938#define R_028CE8_CB_COLOR2_INFO 0x028CE8 8939#define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC 8940#define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* VI */ 8941#define R_028CF4_CB_COLOR2_CMASK 0x028CF4 8942#define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 8943#define R_028CFC_CB_COLOR2_FMASK 0x028CFC 8944#define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 8945#define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 8946#define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 8947#define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* VI */ 8948#define R_028D14_CB_COLOR3_BASE 0x028D14 8949#define R_028D18_CB_COLOR3_PITCH 0x028D18 8950#define R_028D1C_CB_COLOR3_SLICE 0x028D1C 8951#define R_028D20_CB_COLOR3_VIEW 0x028D20 8952#define R_028D24_CB_COLOR3_INFO 0x028D24 8953#define R_028D28_CB_COLOR3_ATTRIB 0x028D28 8954#define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* VI */ 8955#define R_028D30_CB_COLOR3_CMASK 0x028D30 8956#define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 8957#define R_028D38_CB_COLOR3_FMASK 0x028D38 8958#define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C 8959#define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 8960#define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 8961#define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* VI */ 8962#define R_028D50_CB_COLOR4_BASE 0x028D50 8963#define R_028D54_CB_COLOR4_PITCH 0x028D54 8964#define R_028D58_CB_COLOR4_SLICE 0x028D58 8965#define R_028D5C_CB_COLOR4_VIEW 0x028D5C 8966#define R_028D60_CB_COLOR4_INFO 0x028D60 8967#define R_028D64_CB_COLOR4_ATTRIB 0x028D64 8968#define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* VI */ 8969#define R_028D6C_CB_COLOR4_CMASK 0x028D6C 8970#define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 8971#define R_028D74_CB_COLOR4_FMASK 0x028D74 8972#define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 8973#define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C 8974#define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 8975#define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* VI */ 8976#define R_028D8C_CB_COLOR5_BASE 0x028D8C 8977#define R_028D90_CB_COLOR5_PITCH 0x028D90 8978#define R_028D94_CB_COLOR5_SLICE 0x028D94 8979#define R_028D98_CB_COLOR5_VIEW 0x028D98 8980#define R_028D9C_CB_COLOR5_INFO 0x028D9C 8981#define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0 8982#define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* VI */ 8983#define R_028DA8_CB_COLOR5_CMASK 0x028DA8 8984#define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC 8985#define R_028DB0_CB_COLOR5_FMASK 0x028DB0 8986#define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 8987#define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 8988#define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC 8989#define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* VI */ 8990#define R_028DC8_CB_COLOR6_BASE 0x028DC8 8991#define R_028DCC_CB_COLOR6_PITCH 0x028DCC 8992#define R_028DD0_CB_COLOR6_SLICE 0x028DD0 8993#define R_028DD4_CB_COLOR6_VIEW 0x028DD4 8994#define R_028DD8_CB_COLOR6_INFO 0x028DD8 8995#define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC 8996#define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* VI */ 8997#define R_028DE4_CB_COLOR6_CMASK 0x028DE4 8998#define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 8999#define R_028DEC_CB_COLOR6_FMASK 0x028DEC 9000#define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 9001#define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 9002#define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 9003#define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* VI */ 9004#define R_028E04_CB_COLOR7_BASE 0x028E04 9005#define R_028E08_CB_COLOR7_PITCH 0x028E08 9006#define R_028E0C_CB_COLOR7_SLICE 0x028E0C 9007#define R_028E10_CB_COLOR7_VIEW 0x028E10 9008#define R_028E14_CB_COLOR7_INFO 0x028E14 9009#define R_028E18_CB_COLOR7_ATTRIB 0x028E18 9010#define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* VI */ 9011#define R_028E20_CB_COLOR7_CMASK 0x028E20 9012#define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 9013#define R_028E28_CB_COLOR7_FMASK 0x028E28 9014#define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C 9015#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 9016#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 9017#define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* VI */ 9018 9019/* SI async DMA packets */ 9020#define SI_DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \ 9021 (((unsigned)(sub_cmd) & 0xFF) << 20) |\ 9022 (((unsigned)(n) & 0xFFFFF) << 0)) 9023/* SI async DMA Packet types */ 9024#define SI_DMA_PACKET_WRITE 0x2 9025#define SI_DMA_PACKET_COPY 0x3 9026#define SI_DMA_COPY_MAX_BYTE_ALIGNED_SIZE 0xfffe0 9027/* The documentation says 0xffff8 is the maximum size in dwords, which is 9028 * 0x3fffe0 in bytes. */ 9029#define SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE 0x3fffe0 9030#define SI_DMA_COPY_DWORD_ALIGNED 0x00 9031#define SI_DMA_COPY_BYTE_ALIGNED 0x40 9032#define SI_DMA_COPY_TILED 0x8 9033#define SI_DMA_PACKET_INDIRECT_BUFFER 0x4 9034#define SI_DMA_PACKET_SEMAPHORE 0x5 9035#define SI_DMA_PACKET_FENCE 0x6 9036#define SI_DMA_PACKET_TRAP 0x7 9037#define SI_DMA_PACKET_SRBM_WRITE 0x9 9038#define SI_DMA_PACKET_CONSTANT_FILL 0xd 9039#define SI_DMA_PACKET_NOP 0xf 9040 9041/* CIK async DMA packets */ 9042#define CIK_SDMA_PACKET(op, sub_op, n) ((((unsigned)(n) & 0xFFFF) << 16) | \ 9043 (((unsigned)(sub_op) & 0xFF) << 8) | \ 9044 (((unsigned)(op) & 0xFF) << 0)) 9045/* CIK async DMA packet types */ 9046#define CIK_SDMA_OPCODE_NOP 0x0 9047#define CIK_SDMA_OPCODE_COPY 0x1 9048#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR 0x0 9049#define CIK_SDMA_COPY_SUB_OPCODE_TILED 0x1 9050#define CIK_SDMA_COPY_SUB_OPCODE_SOA 0x3 9051#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW 0x4 9052#define CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW 0x5 9053#define CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 0x6 9054#define CIK_SDMA_OPCODE_WRITE 0x2 9055#define SDMA_WRITE_SUB_OPCODE_LINEAR 0x0 9056#define SDMA_WRTIE_SUB_OPCODE_TILED 0x1 9057#define CIK_SDMA_OPCODE_INDIRECT_BUFFER 0x4 9058#define CIK_SDMA_PACKET_FENCE 0x5 9059#define CIK_SDMA_PACKET_TRAP 0x6 9060#define CIK_SDMA_PACKET_SEMAPHORE 0x7 9061#define CIK_SDMA_PACKET_CONSTANT_FILL 0xb 9062#define CIK_SDMA_PACKET_SRBM_WRITE 0xe 9063#define CIK_SDMA_COPY_MAX_SIZE 0x3fffe0 9064 9065#endif /* _SID_H */ 9066 9067