1/* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef VC4_PACKET_H 25#define VC4_PACKET_H 26 27enum vc4_packet { 28 VC4_PACKET_HALT = 0, 29 VC4_PACKET_NOP = 1, 30 31 VC4_PACKET_FLUSH = 4, 32 VC4_PACKET_FLUSH_ALL = 5, 33 VC4_PACKET_START_TILE_BINNING = 6, 34 VC4_PACKET_INCREMENT_SEMAPHORE = 7, 35 VC4_PACKET_WAIT_ON_SEMAPHORE = 8, 36 37 VC4_PACKET_BRANCH = 16, 38 VC4_PACKET_BRANCH_TO_SUB_LIST = 17, 39 40 VC4_PACKET_STORE_MS_TILE_BUFFER = 24, 41 VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF = 25, 42 VC4_PACKET_STORE_FULL_RES_TILE_BUFFER = 26, 43 VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER = 27, 44 VC4_PACKET_STORE_TILE_BUFFER_GENERAL = 28, 45 VC4_PACKET_LOAD_TILE_BUFFER_GENERAL = 29, 46 47 VC4_PACKET_GL_INDEXED_PRIMITIVE = 32, 48 VC4_PACKET_GL_ARRAY_PRIMITIVE = 33, 49 50 VC4_PACKET_COMPRESSED_PRIMITIVE = 48, 51 VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE = 49, 52 53 VC4_PACKET_PRIMITIVE_LIST_FORMAT = 56, 54 55 VC4_PACKET_GL_SHADER_STATE = 64, 56 VC4_PACKET_NV_SHADER_STATE = 65, 57 VC4_PACKET_VG_SHADER_STATE = 66, 58 59 VC4_PACKET_CONFIGURATION_BITS = 96, 60 VC4_PACKET_FLAT_SHADE_FLAGS = 97, 61 VC4_PACKET_POINT_SIZE = 98, 62 VC4_PACKET_LINE_WIDTH = 99, 63 VC4_PACKET_RHT_X_BOUNDARY = 100, 64 VC4_PACKET_DEPTH_OFFSET = 101, 65 VC4_PACKET_CLIP_WINDOW = 102, 66 VC4_PACKET_VIEWPORT_OFFSET = 103, 67 VC4_PACKET_Z_CLIPPING = 104, 68 VC4_PACKET_CLIPPER_XY_SCALING = 105, 69 VC4_PACKET_CLIPPER_Z_SCALING = 106, 70 71 VC4_PACKET_TILE_BINNING_MODE_CONFIG = 112, 72 VC4_PACKET_TILE_RENDERING_MODE_CONFIG = 113, 73 VC4_PACKET_CLEAR_COLORS = 114, 74 VC4_PACKET_TILE_COORDINATES = 115, 75 76 /* Not an actual hardware packet -- this is what we use to put 77 * references to GEM bos in the command stream, since we need the u32 78 * int the actual address packet in order to store the offset from the 79 * start of the BO. 80 */ 81 VC4_PACKET_GEM_HANDLES = 254, 82} __attribute__ ((__packed__)); 83 84#define VC4_PACKET_HALT_SIZE 1 85#define VC4_PACKET_NOP_SIZE 1 86#define VC4_PACKET_FLUSH_SIZE 1 87#define VC4_PACKET_FLUSH_ALL_SIZE 1 88#define VC4_PACKET_START_TILE_BINNING_SIZE 1 89#define VC4_PACKET_INCREMENT_SEMAPHORE_SIZE 1 90#define VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE 1 91#define VC4_PACKET_BRANCH_SIZE 5 92#define VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE 5 93#define VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE 1 94#define VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF_SIZE 1 95#define VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE 5 96#define VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE 5 97#define VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE 7 98#define VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE 7 99#define VC4_PACKET_GL_INDEXED_PRIMITIVE_SIZE 14 100#define VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE 10 101#define VC4_PACKET_COMPRESSED_PRIMITIVE_SIZE 1 102#define VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE_SIZE 1 103#define VC4_PACKET_PRIMITIVE_LIST_FORMAT_SIZE 2 104#define VC4_PACKET_GL_SHADER_STATE_SIZE 5 105#define VC4_PACKET_NV_SHADER_STATE_SIZE 5 106#define VC4_PACKET_VG_SHADER_STATE_SIZE 5 107#define VC4_PACKET_CONFIGURATION_BITS_SIZE 4 108#define VC4_PACKET_FLAT_SHADE_FLAGS_SIZE 5 109#define VC4_PACKET_POINT_SIZE_SIZE 5 110#define VC4_PACKET_LINE_WIDTH_SIZE 5 111#define VC4_PACKET_RHT_X_BOUNDARY_SIZE 3 112#define VC4_PACKET_DEPTH_OFFSET_SIZE 5 113#define VC4_PACKET_CLIP_WINDOW_SIZE 9 114#define VC4_PACKET_VIEWPORT_OFFSET_SIZE 5 115#define VC4_PACKET_Z_CLIPPING_SIZE 9 116#define VC4_PACKET_CLIPPER_XY_SCALING_SIZE 9 117#define VC4_PACKET_CLIPPER_Z_SCALING_SIZE 9 118#define VC4_PACKET_TILE_BINNING_MODE_CONFIG_SIZE 16 119#define VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE 11 120#define VC4_PACKET_CLEAR_COLORS_SIZE 14 121#define VC4_PACKET_TILE_COORDINATES_SIZE 3 122#define VC4_PACKET_GEM_HANDLES_SIZE 9 123 124/* Number of multisamples supported. */ 125#define VC4_MAX_SAMPLES 4 126/* Size of a full resolution color or Z tile buffer load/store. */ 127#define VC4_TILE_BUFFER_SIZE (64 * 64 * 4) 128 129#define VC4_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) 130/* Using the GNU statement expression extension */ 131#define VC4_SET_FIELD(value, field) \ 132 ({ \ 133 uint32_t fieldval = (value) << field ## _SHIFT; \ 134 assert((fieldval & ~ field ## _MASK) == 0); \ 135 fieldval & field ## _MASK; \ 136 }) 137 138#define VC4_GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT) 139 140/** @{ 141 * Bits used by packets like VC4_PACKET_STORE_TILE_BUFFER_GENERAL and 142 * VC4_PACKET_TILE_RENDERING_MODE_CONFIG. 143*/ 144#define VC4_TILING_FORMAT_LINEAR 0 145#define VC4_TILING_FORMAT_T 1 146#define VC4_TILING_FORMAT_LT 2 147/** @} */ 148 149/** @{ 150 * 151 * low bits of VC4_PACKET_STORE_FULL_RES_TILE_BUFFER and 152 * VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER. 153 */ 154#define VC4_LOADSTORE_FULL_RES_EOF (1 << 3) 155#define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL (1 << 2) 156#define VC4_LOADSTORE_FULL_RES_DISABLE_ZS (1 << 1) 157#define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR (1 << 0) 158 159/** @{ 160 * 161 * low bits of VC4_PACKET_STORE_FULL_RES_TILE_BUFFER and 162 * VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER. 163 */ 164#define VC4_LOADSTORE_FULL_RES_EOF (1 << 3) 165#define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL (1 << 2) 166#define VC4_LOADSTORE_FULL_RES_DISABLE_ZS (1 << 1) 167#define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR (1 << 0) 168 169/** @{ 170 * 171 * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and 172 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address) 173 */ 174 175#define VC4_LOADSTORE_TILE_BUFFER_EOF (1 << 3) 176#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_VG_MASK (1 << 2) 177#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_ZS (1 << 1) 178#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_COLOR (1 << 0) 179 180/** @} */ 181 182/** @{ 183 * 184 * byte 0-1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and 185 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL 186 */ 187#define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 15) 188#define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 14) 189#define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 13) 190#define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 12) 191 192#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK VC4_MASK(9, 8) 193#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT 8 194#define VC4_LOADSTORE_TILE_BUFFER_RGBA8888 0 195#define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER 1 196#define VC4_LOADSTORE_TILE_BUFFER_BGR565 2 197/** @} */ 198 199/** @{ 200 * 201 * byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and 202 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL 203 */ 204#define VC4_STORE_TILE_BUFFER_MODE_MASK VC4_MASK(7, 6) 205#define VC4_STORE_TILE_BUFFER_MODE_SHIFT 6 206#define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0 (0 << 6) 207#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4 (1 << 6) 208#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16 (2 << 6) 209 210/** The values of the field are VC4_TILING_FORMAT_* */ 211#define VC4_LOADSTORE_TILE_BUFFER_TILING_MASK VC4_MASK(5, 4) 212#define VC4_LOADSTORE_TILE_BUFFER_TILING_SHIFT 4 213 214#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK VC4_MASK(2, 0) 215#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_SHIFT 0 216#define VC4_LOADSTORE_TILE_BUFFER_NONE 0 217#define VC4_LOADSTORE_TILE_BUFFER_COLOR 1 218#define VC4_LOADSTORE_TILE_BUFFER_ZS 2 219#define VC4_LOADSTORE_TILE_BUFFER_Z 3 220#define VC4_LOADSTORE_TILE_BUFFER_VG_MASK 4 221#define VC4_LOADSTORE_TILE_BUFFER_FULL 5 222/** @} */ 223 224#define VC4_INDEX_BUFFER_U8 (0 << 4) 225#define VC4_INDEX_BUFFER_U16 (1 << 4) 226 227/* This flag is only present in NV shader state. */ 228#define VC4_SHADER_FLAG_SHADED_CLIP_COORDS (1 << 3) 229#define VC4_SHADER_FLAG_ENABLE_CLIPPING (1 << 2) 230#define VC4_SHADER_FLAG_VS_POINT_SIZE (1 << 1) 231#define VC4_SHADER_FLAG_FS_SINGLE_THREAD (1 << 0) 232 233/** @{ byte 2 of config bits. */ 234#define VC4_CONFIG_BITS_EARLY_Z_UPDATE (1 << 1) 235#define VC4_CONFIG_BITS_EARLY_Z (1 << 0) 236/** @} */ 237 238/** @{ byte 1 of config bits. */ 239#define VC4_CONFIG_BITS_Z_UPDATE (1 << 7) 240/** same values in this 3-bit field as PIPE_FUNC_* */ 241#define VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT 4 242#define VC4_CONFIG_BITS_COVERAGE_READ_LEAVE (1 << 3) 243 244#define VC4_CONFIG_BITS_COVERAGE_UPDATE_NONZERO (0 << 1) 245#define VC4_CONFIG_BITS_COVERAGE_UPDATE_ODD (1 << 1) 246#define VC4_CONFIG_BITS_COVERAGE_UPDATE_OR (2 << 1) 247#define VC4_CONFIG_BITS_COVERAGE_UPDATE_ZERO (3 << 1) 248 249#define VC4_CONFIG_BITS_COVERAGE_PIPE_SELECT (1 << 0) 250/** @} */ 251 252/** @{ byte 0 of config bits. */ 253#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_NONE (0 << 6) 254#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X (1 << 6) 255#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_16X (2 << 6) 256 257#define VC4_CONFIG_BITS_AA_POINTS_AND_LINES (1 << 4) 258#define VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET (1 << 3) 259#define VC4_CONFIG_BITS_CW_PRIMITIVES (1 << 2) 260#define VC4_CONFIG_BITS_ENABLE_PRIM_BACK (1 << 1) 261#define VC4_CONFIG_BITS_ENABLE_PRIM_FRONT (1 << 0) 262/** @} */ 263 264/** @{ bits in the last u8 of VC4_PACKET_TILE_BINNING_MODE_CONFIG */ 265#define VC4_BIN_CONFIG_DB_NON_MS (1 << 7) 266 267#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_MASK VC4_MASK(6, 5) 268#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_SHIFT 5 269#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 0 270#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64 1 271#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128 2 272#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_256 3 273 274#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_MASK VC4_MASK(4, 3) 275#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_SHIFT 3 276#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32 0 277#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_64 1 278#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128 2 279#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256 3 280 281#define VC4_BIN_CONFIG_AUTO_INIT_TSDA (1 << 2) 282#define VC4_BIN_CONFIG_TILE_BUFFER_64BIT (1 << 1) 283#define VC4_BIN_CONFIG_MS_MODE_4X (1 << 0) 284/** @} */ 285 286/** @{ bits in the last u16 of VC4_PACKET_TILE_RENDERING_MODE_CONFIG */ 287#define VC4_RENDER_CONFIG_DB_NON_MS (1 << 12) 288#define VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE (1 << 11) 289#define VC4_RENDER_CONFIG_EARLY_Z_DIRECTION_G (1 << 10) 290#define VC4_RENDER_CONFIG_COVERAGE_MODE (1 << 9) 291#define VC4_RENDER_CONFIG_ENABLE_VG_MASK (1 << 8) 292 293/** The values of the field are VC4_TILING_FORMAT_* */ 294#define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK VC4_MASK(7, 6) 295#define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT 6 296 297#define VC4_RENDER_CONFIG_DECIMATE_MODE_1X (0 << 4) 298#define VC4_RENDER_CONFIG_DECIMATE_MODE_4X (1 << 4) 299#define VC4_RENDER_CONFIG_DECIMATE_MODE_16X (2 << 4) 300 301#define VC4_RENDER_CONFIG_FORMAT_MASK VC4_MASK(3, 2) 302#define VC4_RENDER_CONFIG_FORMAT_SHIFT 2 303#define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED 0 304#define VC4_RENDER_CONFIG_FORMAT_RGBA8888 1 305#define VC4_RENDER_CONFIG_FORMAT_BGR565 2 306 307#define VC4_RENDER_CONFIG_TILE_BUFFER_64BIT (1 << 1) 308#define VC4_RENDER_CONFIG_MS_MODE_4X (1 << 0) 309 310#define VC4_PRIMITIVE_LIST_FORMAT_16_INDEX (1 << 4) 311#define VC4_PRIMITIVE_LIST_FORMAT_32_XY (3 << 4) 312#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_POINTS (0 << 0) 313#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_LINES (1 << 0) 314#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES (2 << 0) 315#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_RHT (3 << 0) 316 317enum vc4_texture_data_type { 318 VC4_TEXTURE_TYPE_RGBA8888 = 0, 319 VC4_TEXTURE_TYPE_RGBX8888 = 1, 320 VC4_TEXTURE_TYPE_RGBA4444 = 2, 321 VC4_TEXTURE_TYPE_RGBA5551 = 3, 322 VC4_TEXTURE_TYPE_RGB565 = 4, 323 VC4_TEXTURE_TYPE_LUMINANCE = 5, 324 VC4_TEXTURE_TYPE_ALPHA = 6, 325 VC4_TEXTURE_TYPE_LUMALPHA = 7, 326 VC4_TEXTURE_TYPE_ETC1 = 8, 327 VC4_TEXTURE_TYPE_S16F = 9, 328 VC4_TEXTURE_TYPE_S8 = 10, 329 VC4_TEXTURE_TYPE_S16 = 11, 330 VC4_TEXTURE_TYPE_BW1 = 12, 331 VC4_TEXTURE_TYPE_A4 = 13, 332 VC4_TEXTURE_TYPE_A1 = 14, 333 VC4_TEXTURE_TYPE_RGBA64 = 15, 334 VC4_TEXTURE_TYPE_RGBA32R = 16, 335 VC4_TEXTURE_TYPE_YUV422R = 17, 336}; 337 338#define VC4_TEX_P0_OFFSET_MASK VC4_MASK(31, 12) 339#define VC4_TEX_P0_OFFSET_SHIFT 12 340#define VC4_TEX_P0_CSWIZ_MASK VC4_MASK(11, 10) 341#define VC4_TEX_P0_CSWIZ_SHIFT 10 342#define VC4_TEX_P0_CMMODE_MASK VC4_MASK(9, 9) 343#define VC4_TEX_P0_CMMODE_SHIFT 9 344#define VC4_TEX_P0_FLIPY_MASK VC4_MASK(8, 8) 345#define VC4_TEX_P0_FLIPY_SHIFT 8 346#define VC4_TEX_P0_TYPE_MASK VC4_MASK(7, 4) 347#define VC4_TEX_P0_TYPE_SHIFT 4 348#define VC4_TEX_P0_MIPLVLS_MASK VC4_MASK(3, 0) 349#define VC4_TEX_P0_MIPLVLS_SHIFT 0 350 351#define VC4_TEX_P1_TYPE4_MASK VC4_MASK(31, 31) 352#define VC4_TEX_P1_TYPE4_SHIFT 31 353#define VC4_TEX_P1_HEIGHT_MASK VC4_MASK(30, 20) 354#define VC4_TEX_P1_HEIGHT_SHIFT 20 355#define VC4_TEX_P1_ETCFLIP_MASK VC4_MASK(19, 19) 356#define VC4_TEX_P1_ETCFLIP_SHIFT 19 357#define VC4_TEX_P1_WIDTH_MASK VC4_MASK(18, 8) 358#define VC4_TEX_P1_WIDTH_SHIFT 8 359 360#define VC4_TEX_P1_MAGFILT_MASK VC4_MASK(7, 7) 361#define VC4_TEX_P1_MAGFILT_SHIFT 7 362# define VC4_TEX_P1_MAGFILT_LINEAR 0 363# define VC4_TEX_P1_MAGFILT_NEAREST 1 364 365#define VC4_TEX_P1_MINFILT_MASK VC4_MASK(6, 4) 366#define VC4_TEX_P1_MINFILT_SHIFT 4 367# define VC4_TEX_P1_MINFILT_LINEAR 0 368# define VC4_TEX_P1_MINFILT_NEAREST 1 369# define VC4_TEX_P1_MINFILT_NEAR_MIP_NEAR 2 370# define VC4_TEX_P1_MINFILT_NEAR_MIP_LIN 3 371# define VC4_TEX_P1_MINFILT_LIN_MIP_NEAR 4 372# define VC4_TEX_P1_MINFILT_LIN_MIP_LIN 5 373 374#define VC4_TEX_P1_WRAP_T_MASK VC4_MASK(3, 2) 375#define VC4_TEX_P1_WRAP_T_SHIFT 2 376#define VC4_TEX_P1_WRAP_S_MASK VC4_MASK(1, 0) 377#define VC4_TEX_P1_WRAP_S_SHIFT 0 378# define VC4_TEX_P1_WRAP_REPEAT 0 379# define VC4_TEX_P1_WRAP_CLAMP 1 380# define VC4_TEX_P1_WRAP_MIRROR 2 381# define VC4_TEX_P1_WRAP_BORDER 3 382 383#define VC4_TEX_P2_PTYPE_MASK VC4_MASK(31, 30) 384#define VC4_TEX_P2_PTYPE_SHIFT 30 385# define VC4_TEX_P2_PTYPE_IGNORED 0 386# define VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE 1 387# define VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS 2 388# define VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS 3 389 390/* VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE bits */ 391#define VC4_TEX_P2_CMST_MASK VC4_MASK(29, 12) 392#define VC4_TEX_P2_CMST_SHIFT 12 393#define VC4_TEX_P2_BSLOD_MASK VC4_MASK(0, 0) 394#define VC4_TEX_P2_BSLOD_SHIFT 0 395 396/* VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS */ 397#define VC4_TEX_P2_CHEIGHT_MASK VC4_MASK(22, 12) 398#define VC4_TEX_P2_CHEIGHT_SHIFT 12 399#define VC4_TEX_P2_CWIDTH_MASK VC4_MASK(10, 0) 400#define VC4_TEX_P2_CWIDTH_SHIFT 0 401 402/* VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS */ 403#define VC4_TEX_P2_CYOFF_MASK VC4_MASK(22, 12) 404#define VC4_TEX_P2_CYOFF_SHIFT 12 405#define VC4_TEX_P2_CXOFF_MASK VC4_MASK(10, 0) 406#define VC4_TEX_P2_CXOFF_SHIFT 0 407 408#endif /* VC4_PACKET_H */ 409