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Alpha.h11-Jun-20181.3 KiB

Alpha.td11-Jun-20182.4 KiB

AlphaAsmPrinter.cpp11-Jun-20185.4 KiB

AlphaBranchSelector.cpp11-Jun-20181.9 KiB

AlphaCallingConv.td11-Jun-20181.7 KiB

AlphaFrameLowering.cpp11-Jun-20184.9 KiB

AlphaFrameLowering.h11-Jun-20181.2 KiB

AlphaInstrFormats.td11-Jun-20186.9 KiB

AlphaInstrInfo.cpp11-Jun-201812.8 KiB

AlphaInstrInfo.h11-Jun-20183.5 KiB

AlphaInstrInfo.td11-Jun-201858 KiB

AlphaISelDAGToDAG.cpp11-Jun-201815.4 KiB

AlphaISelLowering.cpp11-Jun-201836.9 KiB

AlphaISelLowering.h11-Jun-20185.2 KiB

AlphaLLRP.cpp11-Jun-20185.6 KiB

AlphaMachineFunctionInfo.h11-Jun-20182.2 KiB

AlphaRegisterInfo.cpp11-Jun-20186.3 KiB

AlphaRegisterInfo.h11-Jun-20181.6 KiB

AlphaRegisterInfo.td11-Jun-20184.9 KiB

AlphaRelocations.h11-Jun-2018780

AlphaSchedule.td11-Jun-20183.1 KiB

AlphaSelectionDAGInfo.cpp11-Jun-2018749

AlphaSelectionDAGInfo.h11-Jun-2018832

AlphaSubtarget.cpp11-Jun-20181.1 KiB

AlphaSubtarget.h11-Jun-20181.3 KiB

AlphaTargetMachine.cpp11-Jun-20181.8 KiB

AlphaTargetMachine.h11-Jun-20182.1 KiB

Makefile11-Jun-2018700

MCTargetDesc/11-Jun-20184 KiB

README.txt11-Jun-20181,023

TargetInfo/11-Jun-20184 KiB

README.txt

1***
2
3add gcc builtins for alpha instructions
4
5
6***
7
8custom expand byteswap into nifty 
9extract/insert/mask byte/word/longword/quadword low/high
10sequences
11
12***
13
14see if any of the extract/insert/mask operations can be added
15
16***
17
18match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)
19
20***
21
22lower srem and urem
23
24remq(i,j):  i - (j * divq(i,j)) if j != 0
25remqu(i,j): i - (j * divqu(i,j)) if j != 0
26reml(i,j):  i - (j * divl(i,j)) if j != 0
27remlu(i,j): i - (j * divlu(i,j)) if j != 0
28
29***
30
31add crazy vector instructions (MVI):
32
33(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
34PKWB, UNPKBW pack/unpack word to byte
35PKLB UNPKBL pack/unpack long to byte
36PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))
37
38cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)
39
40this has some good examples for other operations that can be synthesised well 
41from these rather meager vector ops (such as saturating add).
42http://www.alphalinux.org/docs/MVI-full.html
43