1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#ifndef VIXL_DISASM_AARCH32_H_
28#define VIXL_DISASM_AARCH32_H_
29
30extern "C" {
31#include <stdint.h>
32}
33
34#include "aarch32/constants-aarch32.h"
35#include "aarch32/label-aarch32.h"
36#include "aarch32/operands-aarch32.h"
37
38namespace vixl {
39namespace aarch32 {
40
41class ITBlock {
42  Condition first_condition_;
43  Condition condition_;
44  uint16_t it_mask_;
45
46 public:
47  ITBlock() : first_condition_(al), condition_(al), it_mask_(0) {}
48  void Advance() {
49    condition_ = Condition((condition_.GetCondition() & 0xe) | (it_mask_ >> 3));
50    it_mask_ = (it_mask_ << 1) & 0xf;
51  }
52  bool InITBlock() const { return it_mask_ != 0; }
53  bool OutsideITBlock() const { return !InITBlock(); }
54  bool LastInITBlock() const { return it_mask_ == 0x8; }
55  bool OutsideITBlockOrLast() const {
56    return OutsideITBlock() || LastInITBlock();
57  }
58  void Set(Condition first_condition, uint16_t mask) {
59    condition_ = first_condition_ = first_condition;
60    it_mask_ = mask;
61  }
62  Condition GetFirstCondition() const { return first_condition_; }
63  Condition GetCurrentCondition() const { return condition_; }
64};
65
66class Disassembler {
67 public:
68  enum LocationType {
69    kAnyLocation,
70    kCodeLocation,
71    kDataLocation,
72    kCoprocLocation,
73    kLoadByteLocation,
74    kLoadHalfWordLocation,
75    kLoadWordLocation,
76    kLoadDoubleWordLocation,
77    kLoadSignedByteLocation,
78    kLoadSignedHalfWordLocation,
79    kLoadSinglePrecisionLocation,
80    kLoadDoublePrecisionLocation,
81    kStoreByteLocation,
82    kStoreHalfWordLocation,
83    kStoreWordLocation,
84    kStoreDoubleWordLocation,
85    kStoreSinglePrecisionLocation,
86    kStoreDoublePrecisionLocation,
87    kVld1Location,
88    kVld2Location,
89    kVld3Location,
90    kVld4Location,
91    kVst1Location,
92    kVst2Location,
93    kVst3Location,
94    kVst4Location
95  };
96
97  class ConditionPrinter {
98    const ITBlock& it_block_;
99    Condition cond_;
100
101   public:
102    ConditionPrinter(const ITBlock& it_block, Condition cond)
103        : it_block_(it_block), cond_(cond) {}
104    friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) {
105      if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
106          !cond.cond_.IsNone()) {
107        return os << "al";
108      }
109      return os << cond.cond_;
110    }
111  };
112
113  class PrintLabel {
114    LocationType location_type_;
115    Label* label_;
116    Label::Offset position_;
117
118   public:
119    PrintLabel(LocationType location_type, Label* label, Label::Offset position)
120        : location_type_(location_type), label_(label), position_(position) {}
121    LocationType GetLocationType() const { return location_type_; }
122    Label* GetLabel() const { return label_; }
123    Label::Offset GetPosition() const { return position_; }
124    friend inline std::ostream& operator<<(std::ostream& os,
125                                           const PrintLabel& label) {
126      if (label.label_->IsMinusZero()) {
127        os << "[pc, #-0]";
128      } else {
129        os << "0x" << std::hex << std::setw(8) << std::setfill('0')
130           << static_cast<int32_t>(label.label_->GetLocation() +
131                                   label.position_) << std::dec;
132      }
133      return os;
134    }
135  };
136
137  class PrintMemOperand {
138    LocationType location_type_;
139    const MemOperand& operand_;
140
141   public:
142    PrintMemOperand(LocationType location_type, const MemOperand& operand)
143        : location_type_(location_type), operand_(operand) {}
144    LocationType GetLocationType() const { return location_type_; }
145    const MemOperand& GetOperand() const { return operand_; }
146  };
147
148  class PrintAlignedMemOperand {
149    LocationType location_type_;
150    const AlignedMemOperand& operand_;
151
152   public:
153    PrintAlignedMemOperand(LocationType location_type,
154                           const AlignedMemOperand& operand)
155        : location_type_(location_type), operand_(operand) {}
156    LocationType GetLocationType() const { return location_type_; }
157    const AlignedMemOperand& GetOperand() const { return operand_; }
158  };
159
160  class DisassemblerStream {
161    std::ostream& os_;
162    InstructionType current_instruction_type_;
163    InstructionAttribute current_instruction_attributes_;
164
165   public:
166    explicit DisassemblerStream(std::ostream& os)  // NOLINT(runtime/references)
167        : os_(os),
168          current_instruction_type_(kUndefInstructionType),
169          current_instruction_attributes_(kNoAttribute) {}
170    virtual ~DisassemblerStream() {}
171    std::ostream& os() const { return os_; }
172    void SetCurrentInstruction(
173        InstructionType current_instruction_type,
174        InstructionAttribute current_instruction_attributes) {
175      current_instruction_type_ = current_instruction_type;
176      current_instruction_attributes_ = current_instruction_attributes;
177    }
178    InstructionType GetCurrentInstructionType() const {
179      return current_instruction_type_;
180    }
181    InstructionAttribute GetCurrentInstructionAttributes() const {
182      return current_instruction_attributes_;
183    }
184    bool Has(InstructionAttribute attributes) const {
185      return (current_instruction_attributes_ & attributes) == attributes;
186    }
187    template <typename T>
188    DisassemblerStream& operator<<(T value) {
189      os_ << value;
190      return *this;
191    }
192    virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
193      os_ << cond;
194      return *this;
195    }
196    virtual DisassemblerStream& operator<<(Condition cond) {
197      os_ << cond;
198      return *this;
199    }
200    virtual DisassemblerStream& operator<<(const EncodingSize& size) {
201      os_ << size;
202      return *this;
203    }
204    virtual DisassemblerStream& operator<<(const DataType& type) {
205      os_ << type;
206      return *this;
207    }
208    virtual DisassemblerStream& operator<<(Shift shift) {
209      os_ << shift;
210      return *this;
211    }
212    virtual DisassemblerStream& operator<<(Sign sign) {
213      os_ << sign;
214      return *this;
215    }
216    virtual DisassemblerStream& operator<<(Alignment alignment) {
217      os_ << alignment;
218      return *this;
219    }
220    virtual DisassemblerStream& operator<<(const PrintLabel& label) {
221      os_ << label;
222      return *this;
223    }
224    virtual DisassemblerStream& operator<<(const WriteBack& write_back) {
225      os_ << write_back;
226      return *this;
227    }
228    virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) {
229      os_ << immediate;
230      return *this;
231    }
232    virtual DisassemblerStream& operator<<(Register reg) {
233      os_ << reg;
234      return *this;
235    }
236    virtual DisassemblerStream& operator<<(SRegister reg) {
237      os_ << reg;
238      return *this;
239    }
240    virtual DisassemblerStream& operator<<(DRegister reg) {
241      os_ << reg;
242      return *this;
243    }
244    virtual DisassemblerStream& operator<<(QRegister reg) {
245      os_ << reg;
246      return *this;
247    }
248    virtual DisassemblerStream& operator<<(SpecialRegister reg) {
249      os_ << reg;
250      return *this;
251    }
252    virtual DisassemblerStream& operator<<(MaskedSpecialRegister reg) {
253      os_ << reg;
254      return *this;
255    }
256    virtual DisassemblerStream& operator<<(SpecialFPRegister reg) {
257      os_ << reg;
258      return *this;
259    }
260    virtual DisassemblerStream& operator<<(BankedRegister reg) {
261      os_ << reg;
262      return *this;
263    }
264    virtual DisassemblerStream& operator<<(const RegisterList& list) {
265      os_ << list;
266      return *this;
267    }
268    virtual DisassemblerStream& operator<<(const SRegisterList& list) {
269      os_ << list;
270      return *this;
271    }
272    virtual DisassemblerStream& operator<<(const DRegisterList& list) {
273      os_ << list;
274      return *this;
275    }
276    virtual DisassemblerStream& operator<<(const NeonRegisterList& list) {
277      os_ << list;
278      return *this;
279    }
280    virtual DisassemblerStream& operator<<(Coprocessor coproc) {
281      os_ << coproc;
282      return *this;
283    }
284    virtual DisassemblerStream& operator<<(CRegister reg) {
285      os_ << reg;
286      return *this;
287    }
288    virtual DisassemblerStream& operator<<(Endianness endian_specifier) {
289      os_ << endian_specifier;
290      return *this;
291    }
292    virtual DisassemblerStream& operator<<(MemoryBarrier option) {
293      os_ << option;
294      return *this;
295    }
296    virtual DisassemblerStream& operator<<(InterruptFlags iflags) {
297      os_ << iflags;
298      return *this;
299    }
300    virtual DisassemblerStream& operator<<(const Operand& operand) {
301      if (operand.IsImmediate()) {
302        if (Has(kBitwise)) {
303          return *this << "#0x" << std::hex << operand.GetImmediate()
304                       << std::dec;
305        }
306        return *this << "#" << operand.GetImmediate();
307      }
308      if (operand.IsImmediateShiftedRegister()) {
309        if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) &&
310            (operand.GetShiftAmount() == 0)) {
311          return *this << operand.GetBaseRegister();
312        }
313        if (operand.GetShift().IsRRX()) {
314          return *this << operand.GetBaseRegister() << ", rrx";
315        }
316        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
317                     << " #" << operand.GetShiftAmount();
318      }
319      if (operand.IsRegisterShiftedRegister()) {
320        return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
321                     << " " << operand.GetShiftRegister();
322      }
323      VIXL_UNREACHABLE();
324      return *this;
325    }
326    virtual DisassemblerStream& operator<<(const SOperand& operand) {
327      if (operand.IsImmediate()) {
328        return *this << operand.GetNeonImmediate();
329      }
330      return *this << operand.GetRegister();
331    }
332    virtual DisassemblerStream& operator<<(const DOperand& operand) {
333      if (operand.IsImmediate()) {
334        return *this << operand.GetNeonImmediate();
335      }
336      return *this << operand.GetRegister();
337    }
338    virtual DisassemblerStream& operator<<(const QOperand& operand) {
339      if (operand.IsImmediate()) {
340        return *this << operand.GetNeonImmediate();
341      }
342      return *this << operand.GetRegister();
343    }
344    virtual DisassemblerStream& operator<<(const MemOperand& operand) {
345      *this << "[" << operand.GetBaseRegister();
346      if (operand.GetAddrMode() == PostIndex) {
347        *this << "]";
348      }
349      if (operand.IsImmediate()) {
350        if ((operand.GetOffsetImmediate() != 0) ||
351            operand.GetSign().IsMinus() ||
352            ((operand.GetAddrMode() != Offset) && !operand.IsRegisterOnly())) {
353          if (operand.GetOffsetImmediate() == 0) {
354            *this << ", #" << operand.GetSign() << operand.GetOffsetImmediate();
355          } else {
356            *this << ", #" << operand.GetOffsetImmediate();
357          }
358        }
359      } else if (operand.IsPlainRegister()) {
360        *this << ", " << operand.GetSign() << operand.GetOffsetRegister();
361      } else if (operand.IsShiftedRegister()) {
362        *this << ", " << operand.GetSign() << operand.GetOffsetRegister()
363              << ImmediateShiftOperand(operand.GetShift(),
364                                       operand.GetShiftAmount());
365      } else {
366        VIXL_UNREACHABLE();
367        return *this;
368      }
369      if (operand.GetAddrMode() == Offset) {
370        *this << "]";
371      } else if (operand.GetAddrMode() == PreIndex) {
372        *this << "]!";
373      }
374      return *this;
375    }
376    virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) {
377      return *this << operand.GetOperand();
378    }
379    virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) {
380      *this << "[" << operand.GetBaseRegister() << operand.GetAlignment()
381            << "]";
382      if (operand.GetAddrMode() == PostIndex) {
383        if (operand.IsPlainRegister()) {
384          *this << ", " << operand.GetOffsetRegister();
385        } else {
386          *this << "!";
387        }
388      }
389      return *this;
390    }
391    virtual DisassemblerStream& operator<<(
392        const PrintAlignedMemOperand& operand) {
393      return *this << operand.GetOperand();
394    }
395  };
396
397 private:
398  class ITBlockScope {
399    ITBlock* const it_block_;
400    bool inside_;
401
402   public:
403    explicit ITBlockScope(ITBlock* it_block)
404        : it_block_(it_block), inside_(it_block->InITBlock()) {}
405    ~ITBlockScope() {
406      if (inside_) it_block_->Advance();
407    }
408  };
409
410  ITBlock it_block_;
411  DisassemblerStream* os_;
412  bool owns_os_;
413  uint32_t code_address_;
414
415 public:
416  explicit Disassembler(std::ostream& os,  // NOLINT(runtime/references)
417                        uint32_t code_address = 0)
418      : os_(new DisassemblerStream(os)),
419        owns_os_(true),
420        code_address_(code_address) {}
421  explicit Disassembler(DisassemblerStream* os, uint32_t code_address = 0)
422      : os_(os), owns_os_(false), code_address_(code_address) {}
423  virtual ~Disassembler() {
424    if (owns_os_) {
425      delete os_;
426    }
427  }
428  DisassemblerStream& os() const { return *os_; }
429  void SetIT(Condition first_condition, uint16_t it_mask) {
430    it_block_.Set(first_condition, it_mask);
431  }
432  const ITBlock& GetITBlock() const { return it_block_; }
433  bool InITBlock() const { return it_block_.InITBlock(); }
434  bool OutsideITBlock() const { return it_block_.OutsideITBlock(); }
435  bool OutsideITBlockOrLast() const { return it_block_.OutsideITBlockOrLast(); }
436  void CheckNotIT() const { VIXL_ASSERT(it_block_.OutsideITBlock()); }
437  // Return the current condition depending on the IT state for T32.
438  Condition CurrentCond() const {
439    if (it_block_.OutsideITBlock()) return al;
440    return it_block_.GetCurrentCondition();
441  }
442
443  virtual void UnallocatedT32(uint32_t instruction) {
444    if (T32Size(instruction) == 2) {
445      os() << "unallocated " << std::hex << std::setw(4) << std::setfill('0')
446           << (instruction >> 16) << std::dec;
447    } else {
448      os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
449           << instruction << std::dec;
450    }
451  }
452  virtual void UnallocatedA32(uint32_t instruction) {
453    os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
454         << instruction << std::dec;
455  }
456  virtual void UnimplementedT32_16(const char* name, uint32_t instruction) {
457    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(4)
458         << std::setfill('0') << (instruction >> 16) << std::dec;
459  }
460  virtual void UnimplementedT32_32(const char* name, uint32_t instruction) {
461    os() << "unimplemented " << name << " T32:" << std::hex << std::setw(8)
462         << std::setfill('0') << instruction << std::dec;
463  }
464  virtual void UnimplementedA32(const char* name, uint32_t instruction) {
465    os() << "unimplemented " << name << " ARM:" << std::hex << std::setw(8)
466         << std::setfill('0') << instruction << std::dec;
467  }
468  virtual void Unpredictable() { os() << " ; unpredictable"; }
469  virtual void UnpredictableT32(uint32_t /*instr*/) { return Unpredictable(); }
470  virtual void UnpredictableA32(uint32_t /*instr*/) { return Unpredictable(); }
471
472  static bool Is16BitEncoding(uint32_t instr) { return instr < 0xe8000000; }
473  uint32_t GetCodeAddress() const { return code_address_; }
474  void SetCodeAddress(uint32_t code_address) { code_address_ = code_address; }
475
476  // Start of generated code.
477
478  void adc(Condition cond,
479           EncodingSize size,
480           Register rd,
481           Register rn,
482           const Operand& operand);
483
484  void adcs(Condition cond,
485            EncodingSize size,
486            Register rd,
487            Register rn,
488            const Operand& operand);
489
490  void add(Condition cond,
491           EncodingSize size,
492           Register rd,
493           Register rn,
494           const Operand& operand);
495
496  void add(Condition cond, Register rd, const Operand& operand);
497
498  void adds(Condition cond,
499            EncodingSize size,
500            Register rd,
501            Register rn,
502            const Operand& operand);
503
504  void adds(Register rd, const Operand& operand);
505
506  void addw(Condition cond, Register rd, Register rn, const Operand& operand);
507
508  void adr(Condition cond, EncodingSize size, Register rd, Label* label);
509
510  void and_(Condition cond,
511            EncodingSize size,
512            Register rd,
513            Register rn,
514            const Operand& operand);
515
516  void ands(Condition cond,
517            EncodingSize size,
518            Register rd,
519            Register rn,
520            const Operand& operand);
521
522  void asr(Condition cond,
523           EncodingSize size,
524           Register rd,
525           Register rm,
526           const Operand& operand);
527
528  void asrs(Condition cond,
529            EncodingSize size,
530            Register rd,
531            Register rm,
532            const Operand& operand);
533
534  void b(Condition cond, EncodingSize size, Label* label);
535
536  void bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand);
537
538  void bfi(Condition cond,
539           Register rd,
540           Register rn,
541           uint32_t lsb,
542           const Operand& operand);
543
544  void bic(Condition cond,
545           EncodingSize size,
546           Register rd,
547           Register rn,
548           const Operand& operand);
549
550  void bics(Condition cond,
551            EncodingSize size,
552            Register rd,
553            Register rn,
554            const Operand& operand);
555
556  void bkpt(Condition cond, uint32_t imm);
557
558  void bl(Condition cond, Label* label);
559
560  void blx(Condition cond, Label* label);
561
562  void blx(Condition cond, Register rm);
563
564  void bx(Condition cond, Register rm);
565
566  void bxj(Condition cond, Register rm);
567
568  void cbnz(Register rn, Label* label);
569
570  void cbz(Register rn, Label* label);
571
572  void clrex(Condition cond);
573
574  void clz(Condition cond, Register rd, Register rm);
575
576  void cmn(Condition cond,
577           EncodingSize size,
578           Register rn,
579           const Operand& operand);
580
581  void cmp(Condition cond,
582           EncodingSize size,
583           Register rn,
584           const Operand& operand);
585
586  void crc32b(Condition cond, Register rd, Register rn, Register rm);
587
588  void crc32cb(Condition cond, Register rd, Register rn, Register rm);
589
590  void crc32ch(Condition cond, Register rd, Register rn, Register rm);
591
592  void crc32cw(Condition cond, Register rd, Register rn, Register rm);
593
594  void crc32h(Condition cond, Register rd, Register rn, Register rm);
595
596  void crc32w(Condition cond, Register rd, Register rn, Register rm);
597
598  void dmb(Condition cond, MemoryBarrier option);
599
600  void dsb(Condition cond, MemoryBarrier option);
601
602  void eor(Condition cond,
603           EncodingSize size,
604           Register rd,
605           Register rn,
606           const Operand& operand);
607
608  void eors(Condition cond,
609            EncodingSize size,
610            Register rd,
611            Register rn,
612            const Operand& operand);
613
614  void fldmdbx(Condition cond,
615               Register rn,
616               WriteBack write_back,
617               DRegisterList dreglist);
618
619  void fldmiax(Condition cond,
620               Register rn,
621               WriteBack write_back,
622               DRegisterList dreglist);
623
624  void fstmdbx(Condition cond,
625               Register rn,
626               WriteBack write_back,
627               DRegisterList dreglist);
628
629  void fstmiax(Condition cond,
630               Register rn,
631               WriteBack write_back,
632               DRegisterList dreglist);
633
634  void hlt(Condition cond, uint32_t imm);
635
636  void hvc(Condition cond, uint32_t imm);
637
638  void isb(Condition cond, MemoryBarrier option);
639
640  void it(Condition cond, uint16_t mask);
641
642  void lda(Condition cond, Register rt, const MemOperand& operand);
643
644  void ldab(Condition cond, Register rt, const MemOperand& operand);
645
646  void ldaex(Condition cond, Register rt, const MemOperand& operand);
647
648  void ldaexb(Condition cond, Register rt, const MemOperand& operand);
649
650  void ldaexd(Condition cond,
651              Register rt,
652              Register rt2,
653              const MemOperand& operand);
654
655  void ldaexh(Condition cond, Register rt, const MemOperand& operand);
656
657  void ldah(Condition cond, Register rt, const MemOperand& operand);
658
659  void ldm(Condition cond,
660           EncodingSize size,
661           Register rn,
662           WriteBack write_back,
663           RegisterList registers);
664
665  void ldmda(Condition cond,
666             Register rn,
667             WriteBack write_back,
668             RegisterList registers);
669
670  void ldmdb(Condition cond,
671             Register rn,
672             WriteBack write_back,
673             RegisterList registers);
674
675  void ldmea(Condition cond,
676             Register rn,
677             WriteBack write_back,
678             RegisterList registers);
679
680  void ldmed(Condition cond,
681             Register rn,
682             WriteBack write_back,
683             RegisterList registers);
684
685  void ldmfa(Condition cond,
686             Register rn,
687             WriteBack write_back,
688             RegisterList registers);
689
690  void ldmfd(Condition cond,
691             EncodingSize size,
692             Register rn,
693             WriteBack write_back,
694             RegisterList registers);
695
696  void ldmib(Condition cond,
697             Register rn,
698             WriteBack write_back,
699             RegisterList registers);
700
701  void ldr(Condition cond,
702           EncodingSize size,
703           Register rt,
704           const MemOperand& operand);
705
706  void ldr(Condition cond, EncodingSize size, Register rt, Label* label);
707
708  void ldrb(Condition cond,
709            EncodingSize size,
710            Register rt,
711            const MemOperand& operand);
712
713  void ldrb(Condition cond, Register rt, Label* label);
714
715  void ldrd(Condition cond,
716            Register rt,
717            Register rt2,
718            const MemOperand& operand);
719
720  void ldrd(Condition cond, Register rt, Register rt2, Label* label);
721
722  void ldrex(Condition cond, Register rt, const MemOperand& operand);
723
724  void ldrexb(Condition cond, Register rt, const MemOperand& operand);
725
726  void ldrexd(Condition cond,
727              Register rt,
728              Register rt2,
729              const MemOperand& operand);
730
731  void ldrexh(Condition cond, Register rt, const MemOperand& operand);
732
733  void ldrh(Condition cond,
734            EncodingSize size,
735            Register rt,
736            const MemOperand& operand);
737
738  void ldrh(Condition cond, Register rt, Label* label);
739
740  void ldrsb(Condition cond,
741             EncodingSize size,
742             Register rt,
743             const MemOperand& operand);
744
745  void ldrsb(Condition cond, Register rt, Label* label);
746
747  void ldrsh(Condition cond,
748             EncodingSize size,
749             Register rt,
750             const MemOperand& operand);
751
752  void ldrsh(Condition cond, Register rt, Label* label);
753
754  void lsl(Condition cond,
755           EncodingSize size,
756           Register rd,
757           Register rm,
758           const Operand& operand);
759
760  void lsls(Condition cond,
761            EncodingSize size,
762            Register rd,
763            Register rm,
764            const Operand& operand);
765
766  void lsr(Condition cond,
767           EncodingSize size,
768           Register rd,
769           Register rm,
770           const Operand& operand);
771
772  void lsrs(Condition cond,
773            EncodingSize size,
774            Register rd,
775            Register rm,
776            const Operand& operand);
777
778  void mla(Condition cond, Register rd, Register rn, Register rm, Register ra);
779
780  void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra);
781
782  void mls(Condition cond, Register rd, Register rn, Register rm, Register ra);
783
784  void mov(Condition cond,
785           EncodingSize size,
786           Register rd,
787           const Operand& operand);
788
789  void movs(Condition cond,
790            EncodingSize size,
791            Register rd,
792            const Operand& operand);
793
794  void movt(Condition cond, Register rd, const Operand& operand);
795
796  void movw(Condition cond, Register rd, const Operand& operand);
797
798  void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
799
800  void msr(Condition cond,
801           MaskedSpecialRegister spec_reg,
802           const Operand& operand);
803
804  void mul(
805      Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
806
807  void muls(Condition cond, Register rd, Register rn, Register rm);
808
809  void mvn(Condition cond,
810           EncodingSize size,
811           Register rd,
812           const Operand& operand);
813
814  void mvns(Condition cond,
815            EncodingSize size,
816            Register rd,
817            const Operand& operand);
818
819  void nop(Condition cond, EncodingSize size);
820
821  void orn(Condition cond, Register rd, Register rn, const Operand& operand);
822
823  void orns(Condition cond, Register rd, Register rn, const Operand& operand);
824
825  void orr(Condition cond,
826           EncodingSize size,
827           Register rd,
828           Register rn,
829           const Operand& operand);
830
831  void orrs(Condition cond,
832            EncodingSize size,
833            Register rd,
834            Register rn,
835            const Operand& operand);
836
837  void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand);
838
839  void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand);
840
841  void pld(Condition cond, Label* label);
842
843  void pld(Condition cond, const MemOperand& operand);
844
845  void pldw(Condition cond, const MemOperand& operand);
846
847  void pli(Condition cond, const MemOperand& operand);
848
849  void pli(Condition cond, Label* label);
850
851  void pop(Condition cond, EncodingSize size, RegisterList registers);
852
853  void pop(Condition cond, EncodingSize size, Register rt);
854
855  void push(Condition cond, EncodingSize size, RegisterList registers);
856
857  void push(Condition cond, EncodingSize size, Register rt);
858
859  void qadd(Condition cond, Register rd, Register rm, Register rn);
860
861  void qadd16(Condition cond, Register rd, Register rn, Register rm);
862
863  void qadd8(Condition cond, Register rd, Register rn, Register rm);
864
865  void qasx(Condition cond, Register rd, Register rn, Register rm);
866
867  void qdadd(Condition cond, Register rd, Register rm, Register rn);
868
869  void qdsub(Condition cond, Register rd, Register rm, Register rn);
870
871  void qsax(Condition cond, Register rd, Register rn, Register rm);
872
873  void qsub(Condition cond, Register rd, Register rm, Register rn);
874
875  void qsub16(Condition cond, Register rd, Register rn, Register rm);
876
877  void qsub8(Condition cond, Register rd, Register rn, Register rm);
878
879  void rbit(Condition cond, Register rd, Register rm);
880
881  void rev(Condition cond, EncodingSize size, Register rd, Register rm);
882
883  void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
884
885  void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
886
887  void ror(Condition cond,
888           EncodingSize size,
889           Register rd,
890           Register rm,
891           const Operand& operand);
892
893  void rors(Condition cond,
894            EncodingSize size,
895            Register rd,
896            Register rm,
897            const Operand& operand);
898
899  void rrx(Condition cond, Register rd, Register rm);
900
901  void rrxs(Condition cond, Register rd, Register rm);
902
903  void rsb(Condition cond,
904           EncodingSize size,
905           Register rd,
906           Register rn,
907           const Operand& operand);
908
909  void rsbs(Condition cond,
910            EncodingSize size,
911            Register rd,
912            Register rn,
913            const Operand& operand);
914
915  void rsc(Condition cond, Register rd, Register rn, const Operand& operand);
916
917  void rscs(Condition cond, Register rd, Register rn, const Operand& operand);
918
919  void sadd16(Condition cond, Register rd, Register rn, Register rm);
920
921  void sadd8(Condition cond, Register rd, Register rn, Register rm);
922
923  void sasx(Condition cond, Register rd, Register rn, Register rm);
924
925  void sbc(Condition cond,
926           EncodingSize size,
927           Register rd,
928           Register rn,
929           const Operand& operand);
930
931  void sbcs(Condition cond,
932            EncodingSize size,
933            Register rd,
934            Register rn,
935            const Operand& operand);
936
937  void sbfx(Condition cond,
938            Register rd,
939            Register rn,
940            uint32_t lsb,
941            const Operand& operand);
942
943  void sdiv(Condition cond, Register rd, Register rn, Register rm);
944
945  void sel(Condition cond, Register rd, Register rn, Register rm);
946
947  void shadd16(Condition cond, Register rd, Register rn, Register rm);
948
949  void shadd8(Condition cond, Register rd, Register rn, Register rm);
950
951  void shasx(Condition cond, Register rd, Register rn, Register rm);
952
953  void shsax(Condition cond, Register rd, Register rn, Register rm);
954
955  void shsub16(Condition cond, Register rd, Register rn, Register rm);
956
957  void shsub8(Condition cond, Register rd, Register rn, Register rm);
958
959  void smlabb(
960      Condition cond, Register rd, Register rn, Register rm, Register ra);
961
962  void smlabt(
963      Condition cond, Register rd, Register rn, Register rm, Register ra);
964
965  void smlad(
966      Condition cond, Register rd, Register rn, Register rm, Register ra);
967
968  void smladx(
969      Condition cond, Register rd, Register rn, Register rm, Register ra);
970
971  void smlal(
972      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
973
974  void smlalbb(
975      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
976
977  void smlalbt(
978      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
979
980  void smlald(
981      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
982
983  void smlaldx(
984      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
985
986  void smlals(
987      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
988
989  void smlaltb(
990      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
991
992  void smlaltt(
993      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
994
995  void smlatb(
996      Condition cond, Register rd, Register rn, Register rm, Register ra);
997
998  void smlatt(
999      Condition cond, Register rd, Register rn, Register rm, Register ra);
1000
1001  void smlawb(
1002      Condition cond, Register rd, Register rn, Register rm, Register ra);
1003
1004  void smlawt(
1005      Condition cond, Register rd, Register rn, Register rm, Register ra);
1006
1007  void smlsd(
1008      Condition cond, Register rd, Register rn, Register rm, Register ra);
1009
1010  void smlsdx(
1011      Condition cond, Register rd, Register rn, Register rm, Register ra);
1012
1013  void smlsld(
1014      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1015
1016  void smlsldx(
1017      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1018
1019  void smmla(
1020      Condition cond, Register rd, Register rn, Register rm, Register ra);
1021
1022  void smmlar(
1023      Condition cond, Register rd, Register rn, Register rm, Register ra);
1024
1025  void smmls(
1026      Condition cond, Register rd, Register rn, Register rm, Register ra);
1027
1028  void smmlsr(
1029      Condition cond, Register rd, Register rn, Register rm, Register ra);
1030
1031  void smmul(Condition cond, Register rd, Register rn, Register rm);
1032
1033  void smmulr(Condition cond, Register rd, Register rn, Register rm);
1034
1035  void smuad(Condition cond, Register rd, Register rn, Register rm);
1036
1037  void smuadx(Condition cond, Register rd, Register rn, Register rm);
1038
1039  void smulbb(Condition cond, Register rd, Register rn, Register rm);
1040
1041  void smulbt(Condition cond, Register rd, Register rn, Register rm);
1042
1043  void smull(
1044      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1045
1046  void smulls(
1047      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1048
1049  void smultb(Condition cond, Register rd, Register rn, Register rm);
1050
1051  void smultt(Condition cond, Register rd, Register rn, Register rm);
1052
1053  void smulwb(Condition cond, Register rd, Register rn, Register rm);
1054
1055  void smulwt(Condition cond, Register rd, Register rn, Register rm);
1056
1057  void smusd(Condition cond, Register rd, Register rn, Register rm);
1058
1059  void smusdx(Condition cond, Register rd, Register rn, Register rm);
1060
1061  void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1062
1063  void ssat16(Condition cond, Register rd, uint32_t imm, Register rn);
1064
1065  void ssax(Condition cond, Register rd, Register rn, Register rm);
1066
1067  void ssub16(Condition cond, Register rd, Register rn, Register rm);
1068
1069  void ssub8(Condition cond, Register rd, Register rn, Register rm);
1070
1071  void stl(Condition cond, Register rt, const MemOperand& operand);
1072
1073  void stlb(Condition cond, Register rt, const MemOperand& operand);
1074
1075  void stlex(Condition cond,
1076             Register rd,
1077             Register rt,
1078             const MemOperand& operand);
1079
1080  void stlexb(Condition cond,
1081              Register rd,
1082              Register rt,
1083              const MemOperand& operand);
1084
1085  void stlexd(Condition cond,
1086              Register rd,
1087              Register rt,
1088              Register rt2,
1089              const MemOperand& operand);
1090
1091  void stlexh(Condition cond,
1092              Register rd,
1093              Register rt,
1094              const MemOperand& operand);
1095
1096  void stlh(Condition cond, Register rt, const MemOperand& operand);
1097
1098  void stm(Condition cond,
1099           EncodingSize size,
1100           Register rn,
1101           WriteBack write_back,
1102           RegisterList registers);
1103
1104  void stmda(Condition cond,
1105             Register rn,
1106             WriteBack write_back,
1107             RegisterList registers);
1108
1109  void stmdb(Condition cond,
1110             EncodingSize size,
1111             Register rn,
1112             WriteBack write_back,
1113             RegisterList registers);
1114
1115  void stmea(Condition cond,
1116             EncodingSize size,
1117             Register rn,
1118             WriteBack write_back,
1119             RegisterList registers);
1120
1121  void stmed(Condition cond,
1122             Register rn,
1123             WriteBack write_back,
1124             RegisterList registers);
1125
1126  void stmfa(Condition cond,
1127             Register rn,
1128             WriteBack write_back,
1129             RegisterList registers);
1130
1131  void stmfd(Condition cond,
1132             Register rn,
1133             WriteBack write_back,
1134             RegisterList registers);
1135
1136  void stmib(Condition cond,
1137             Register rn,
1138             WriteBack write_back,
1139             RegisterList registers);
1140
1141  void str(Condition cond,
1142           EncodingSize size,
1143           Register rt,
1144           const MemOperand& operand);
1145
1146  void strb(Condition cond,
1147            EncodingSize size,
1148            Register rt,
1149            const MemOperand& operand);
1150
1151  void strd(Condition cond,
1152            Register rt,
1153            Register rt2,
1154            const MemOperand& operand);
1155
1156  void strex(Condition cond,
1157             Register rd,
1158             Register rt,
1159             const MemOperand& operand);
1160
1161  void strexb(Condition cond,
1162              Register rd,
1163              Register rt,
1164              const MemOperand& operand);
1165
1166  void strexd(Condition cond,
1167              Register rd,
1168              Register rt,
1169              Register rt2,
1170              const MemOperand& operand);
1171
1172  void strexh(Condition cond,
1173              Register rd,
1174              Register rt,
1175              const MemOperand& operand);
1176
1177  void strh(Condition cond,
1178            EncodingSize size,
1179            Register rt,
1180            const MemOperand& operand);
1181
1182  void sub(Condition cond,
1183           EncodingSize size,
1184           Register rd,
1185           Register rn,
1186           const Operand& operand);
1187
1188  void sub(Condition cond, Register rd, const Operand& operand);
1189
1190  void subs(Condition cond,
1191            EncodingSize size,
1192            Register rd,
1193            Register rn,
1194            const Operand& operand);
1195
1196  void subs(Register rd, const Operand& operand);
1197
1198  void subw(Condition cond, Register rd, Register rn, const Operand& operand);
1199
1200  void svc(Condition cond, uint32_t imm);
1201
1202  void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1203
1204  void sxtab16(Condition cond,
1205               Register rd,
1206               Register rn,
1207               const Operand& operand);
1208
1209  void sxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1210
1211  void sxtb(Condition cond,
1212            EncodingSize size,
1213            Register rd,
1214            const Operand& operand);
1215
1216  void sxtb16(Condition cond, Register rd, const Operand& operand);
1217
1218  void sxth(Condition cond,
1219            EncodingSize size,
1220            Register rd,
1221            const Operand& operand);
1222
1223  void tbb(Condition cond, Register rn, Register rm);
1224
1225  void tbh(Condition cond, Register rn, Register rm);
1226
1227  void teq(Condition cond, Register rn, const Operand& operand);
1228
1229  void tst(Condition cond,
1230           EncodingSize size,
1231           Register rn,
1232           const Operand& operand);
1233
1234  void uadd16(Condition cond, Register rd, Register rn, Register rm);
1235
1236  void uadd8(Condition cond, Register rd, Register rn, Register rm);
1237
1238  void uasx(Condition cond, Register rd, Register rn, Register rm);
1239
1240  void ubfx(Condition cond,
1241            Register rd,
1242            Register rn,
1243            uint32_t lsb,
1244            const Operand& operand);
1245
1246  void udf(Condition cond, EncodingSize size, uint32_t imm);
1247
1248  void udiv(Condition cond, Register rd, Register rn, Register rm);
1249
1250  void uhadd16(Condition cond, Register rd, Register rn, Register rm);
1251
1252  void uhadd8(Condition cond, Register rd, Register rn, Register rm);
1253
1254  void uhasx(Condition cond, Register rd, Register rn, Register rm);
1255
1256  void uhsax(Condition cond, Register rd, Register rn, Register rm);
1257
1258  void uhsub16(Condition cond, Register rd, Register rn, Register rm);
1259
1260  void uhsub8(Condition cond, Register rd, Register rn, Register rm);
1261
1262  void umaal(
1263      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1264
1265  void umlal(
1266      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1267
1268  void umlals(
1269      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1270
1271  void umull(
1272      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1273
1274  void umulls(
1275      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1276
1277  void uqadd16(Condition cond, Register rd, Register rn, Register rm);
1278
1279  void uqadd8(Condition cond, Register rd, Register rn, Register rm);
1280
1281  void uqasx(Condition cond, Register rd, Register rn, Register rm);
1282
1283  void uqsax(Condition cond, Register rd, Register rn, Register rm);
1284
1285  void uqsub16(Condition cond, Register rd, Register rn, Register rm);
1286
1287  void uqsub8(Condition cond, Register rd, Register rn, Register rm);
1288
1289  void usad8(Condition cond, Register rd, Register rn, Register rm);
1290
1291  void usada8(
1292      Condition cond, Register rd, Register rn, Register rm, Register ra);
1293
1294  void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1295
1296  void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
1297
1298  void usax(Condition cond, Register rd, Register rn, Register rm);
1299
1300  void usub16(Condition cond, Register rd, Register rn, Register rm);
1301
1302  void usub8(Condition cond, Register rd, Register rn, Register rm);
1303
1304  void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1305
1306  void uxtab16(Condition cond,
1307               Register rd,
1308               Register rn,
1309               const Operand& operand);
1310
1311  void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1312
1313  void uxtb(Condition cond,
1314            EncodingSize size,
1315            Register rd,
1316            const Operand& operand);
1317
1318  void uxtb16(Condition cond, Register rd, const Operand& operand);
1319
1320  void uxth(Condition cond,
1321            EncodingSize size,
1322            Register rd,
1323            const Operand& operand);
1324
1325  void vaba(
1326      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1327
1328  void vaba(
1329      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1330
1331  void vabal(
1332      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1333
1334  void vabd(
1335      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1336
1337  void vabd(
1338      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1339
1340  void vabdl(
1341      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1342
1343  void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1344
1345  void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
1346
1347  void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm);
1348
1349  void vacge(
1350      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1351
1352  void vacge(
1353      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1354
1355  void vacgt(
1356      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1357
1358  void vacgt(
1359      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1360
1361  void vacle(
1362      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1363
1364  void vacle(
1365      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1366
1367  void vaclt(
1368      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1369
1370  void vaclt(
1371      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1372
1373  void vadd(
1374      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1375
1376  void vadd(
1377      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1378
1379  void vadd(
1380      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1381
1382  void vaddhn(
1383      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
1384
1385  void vaddl(
1386      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1387
1388  void vaddw(
1389      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
1390
1391  void vand(Condition cond,
1392            DataType dt,
1393            DRegister rd,
1394            DRegister rn,
1395            const DOperand& operand);
1396
1397  void vand(Condition cond,
1398            DataType dt,
1399            QRegister rd,
1400            QRegister rn,
1401            const QOperand& operand);
1402
1403  void vbic(Condition cond,
1404            DataType dt,
1405            DRegister rd,
1406            DRegister rn,
1407            const DOperand& operand);
1408
1409  void vbic(Condition cond,
1410            DataType dt,
1411            QRegister rd,
1412            QRegister rn,
1413            const QOperand& operand);
1414
1415  void vbif(
1416      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1417
1418  void vbif(
1419      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1420
1421  void vbit(
1422      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1423
1424  void vbit(
1425      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1426
1427  void vbsl(
1428      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1429
1430  void vbsl(
1431      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1432
1433  void vceq(Condition cond,
1434            DataType dt,
1435            DRegister rd,
1436            DRegister rm,
1437            const DOperand& operand);
1438
1439  void vceq(Condition cond,
1440            DataType dt,
1441            QRegister rd,
1442            QRegister rm,
1443            const QOperand& operand);
1444
1445  void vceq(
1446      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1447
1448  void vceq(
1449      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1450
1451  void vcge(Condition cond,
1452            DataType dt,
1453            DRegister rd,
1454            DRegister rm,
1455            const DOperand& operand);
1456
1457  void vcge(Condition cond,
1458            DataType dt,
1459            QRegister rd,
1460            QRegister rm,
1461            const QOperand& operand);
1462
1463  void vcge(
1464      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1465
1466  void vcge(
1467      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1468
1469  void vcgt(Condition cond,
1470            DataType dt,
1471            DRegister rd,
1472            DRegister rm,
1473            const DOperand& operand);
1474
1475  void vcgt(Condition cond,
1476            DataType dt,
1477            QRegister rd,
1478            QRegister rm,
1479            const QOperand& operand);
1480
1481  void vcgt(
1482      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1483
1484  void vcgt(
1485      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1486
1487  void vcle(Condition cond,
1488            DataType dt,
1489            DRegister rd,
1490            DRegister rm,
1491            const DOperand& operand);
1492
1493  void vcle(Condition cond,
1494            DataType dt,
1495            QRegister rd,
1496            QRegister rm,
1497            const QOperand& operand);
1498
1499  void vcle(
1500      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1501
1502  void vcle(
1503      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1504
1505  void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm);
1506
1507  void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm);
1508
1509  void vclt(Condition cond,
1510            DataType dt,
1511            DRegister rd,
1512            DRegister rm,
1513            const DOperand& operand);
1514
1515  void vclt(Condition cond,
1516            DataType dt,
1517            QRegister rd,
1518            QRegister rm,
1519            const QOperand& operand);
1520
1521  void vclt(
1522      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1523
1524  void vclt(
1525      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1526
1527  void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm);
1528
1529  void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm);
1530
1531  void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
1532
1533  void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
1534
1535  void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
1536
1537  void vcmp(Condition cond, DataType dt, DRegister rd, double imm);
1538
1539  void vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm);
1540
1541  void vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
1542
1543  void vcmpe(Condition cond, DataType dt, SRegister rd, double imm);
1544
1545  void vcmpe(Condition cond, DataType dt, DRegister rd, double imm);
1546
1547  void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
1548
1549  void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
1550
1551  void vcvt(
1552      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1553
1554  void vcvt(
1555      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1556
1557  void vcvt(Condition cond,
1558            DataType dt1,
1559            DataType dt2,
1560            DRegister rd,
1561            DRegister rm,
1562            int32_t fbits);
1563
1564  void vcvt(Condition cond,
1565            DataType dt1,
1566            DataType dt2,
1567            QRegister rd,
1568            QRegister rm,
1569            int32_t fbits);
1570
1571  void vcvt(Condition cond,
1572            DataType dt1,
1573            DataType dt2,
1574            SRegister rd,
1575            SRegister rm,
1576            int32_t fbits);
1577
1578  void vcvt(
1579      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1580
1581  void vcvt(
1582      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1583
1584  void vcvt(
1585      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
1586
1587  void vcvt(
1588      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
1589
1590  void vcvt(
1591      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1592
1593  void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1594
1595  void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1596
1597  void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1598
1599  void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1600
1601  void vcvtb(
1602      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1603
1604  void vcvtb(
1605      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1606
1607  void vcvtb(
1608      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1609
1610  void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1611
1612  void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1613
1614  void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1615
1616  void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1617
1618  void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1619
1620  void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1621
1622  void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1623
1624  void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1625
1626  void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1627
1628  void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1629
1630  void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1631
1632  void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1633
1634  void vcvtr(
1635      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1636
1637  void vcvtr(
1638      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1639
1640  void vcvtt(
1641      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1642
1643  void vcvtt(
1644      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1645
1646  void vcvtt(
1647      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1648
1649  void vdiv(
1650      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1651
1652  void vdiv(
1653      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1654
1655  void vdup(Condition cond, DataType dt, QRegister rd, Register rt);
1656
1657  void vdup(Condition cond, DataType dt, DRegister rd, Register rt);
1658
1659  void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1660
1661  void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1662
1663  void veor(
1664      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1665
1666  void veor(
1667      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1668
1669  void vext(Condition cond,
1670            DataType dt,
1671            DRegister rd,
1672            DRegister rn,
1673            DRegister rm,
1674            const DOperand& operand);
1675
1676  void vext(Condition cond,
1677            DataType dt,
1678            QRegister rd,
1679            QRegister rn,
1680            QRegister rm,
1681            const QOperand& operand);
1682
1683  void vfma(
1684      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1685
1686  void vfma(
1687      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1688
1689  void vfma(
1690      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1691
1692  void vfms(
1693      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1694
1695  void vfms(
1696      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1697
1698  void vfms(
1699      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1700
1701  void vfnma(
1702      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1703
1704  void vfnma(
1705      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1706
1707  void vfnms(
1708      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1709
1710  void vfnms(
1711      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1712
1713  void vhadd(
1714      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1715
1716  void vhadd(
1717      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1718
1719  void vhsub(
1720      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1721
1722  void vhsub(
1723      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1724
1725  void vld1(Condition cond,
1726            DataType dt,
1727            const NeonRegisterList& nreglist,
1728            const AlignedMemOperand& operand);
1729
1730  void vld2(Condition cond,
1731            DataType dt,
1732            const NeonRegisterList& nreglist,
1733            const AlignedMemOperand& operand);
1734
1735  void vld3(Condition cond,
1736            DataType dt,
1737            const NeonRegisterList& nreglist,
1738            const AlignedMemOperand& operand);
1739
1740  void vld3(Condition cond,
1741            DataType dt,
1742            const NeonRegisterList& nreglist,
1743            const MemOperand& operand);
1744
1745  void vld4(Condition cond,
1746            DataType dt,
1747            const NeonRegisterList& nreglist,
1748            const AlignedMemOperand& operand);
1749
1750  void vldm(Condition cond,
1751            DataType dt,
1752            Register rn,
1753            WriteBack write_back,
1754            DRegisterList dreglist);
1755
1756  void vldm(Condition cond,
1757            DataType dt,
1758            Register rn,
1759            WriteBack write_back,
1760            SRegisterList sreglist);
1761
1762  void vldmdb(Condition cond,
1763              DataType dt,
1764              Register rn,
1765              WriteBack write_back,
1766              DRegisterList dreglist);
1767
1768  void vldmdb(Condition cond,
1769              DataType dt,
1770              Register rn,
1771              WriteBack write_back,
1772              SRegisterList sreglist);
1773
1774  void vldmia(Condition cond,
1775              DataType dt,
1776              Register rn,
1777              WriteBack write_back,
1778              DRegisterList dreglist);
1779
1780  void vldmia(Condition cond,
1781              DataType dt,
1782              Register rn,
1783              WriteBack write_back,
1784              SRegisterList sreglist);
1785
1786  void vldr(Condition cond, DataType dt, DRegister rd, Label* label);
1787
1788  void vldr(Condition cond,
1789            DataType dt,
1790            DRegister rd,
1791            const MemOperand& operand);
1792
1793  void vldr(Condition cond, DataType dt, SRegister rd, Label* label);
1794
1795  void vldr(Condition cond,
1796            DataType dt,
1797            SRegister rd,
1798            const MemOperand& operand);
1799
1800  void vmax(
1801      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1802
1803  void vmax(
1804      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1805
1806  void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1807
1808  void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1809
1810  void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1811
1812  void vmin(
1813      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1814
1815  void vmin(
1816      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1817
1818  void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1819
1820  void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1821
1822  void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1823
1824  void vmla(Condition cond,
1825            DataType dt,
1826            DRegister rd,
1827            DRegister rn,
1828            DRegisterLane rm);
1829
1830  void vmla(Condition cond,
1831            DataType dt,
1832            QRegister rd,
1833            QRegister rn,
1834            DRegisterLane rm);
1835
1836  void vmla(
1837      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1838
1839  void vmla(
1840      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1841
1842  void vmla(
1843      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1844
1845  void vmlal(Condition cond,
1846             DataType dt,
1847             QRegister rd,
1848             DRegister rn,
1849             DRegisterLane rm);
1850
1851  void vmlal(
1852      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1853
1854  void vmls(Condition cond,
1855            DataType dt,
1856            DRegister rd,
1857            DRegister rn,
1858            DRegisterLane rm);
1859
1860  void vmls(Condition cond,
1861            DataType dt,
1862            QRegister rd,
1863            QRegister rn,
1864            DRegisterLane rm);
1865
1866  void vmls(
1867      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1868
1869  void vmls(
1870      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1871
1872  void vmls(
1873      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1874
1875  void vmlsl(Condition cond,
1876             DataType dt,
1877             QRegister rd,
1878             DRegister rn,
1879             DRegisterLane rm);
1880
1881  void vmlsl(
1882      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1883
1884  void vmov(Condition cond, Register rt, SRegister rn);
1885
1886  void vmov(Condition cond, SRegister rn, Register rt);
1887
1888  void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
1889
1890  void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
1891
1892  void vmov(
1893      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
1894
1895  void vmov(
1896      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
1897
1898  void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
1899
1900  void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1901
1902  void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1903
1904  void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
1905
1906  void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
1907
1908  void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm);
1909
1910  void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
1911
1912  void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
1913
1914  void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
1915
1916  void vmul(Condition cond,
1917            DataType dt,
1918            DRegister rd,
1919            DRegister rn,
1920            DRegister dm,
1921            unsigned index);
1922
1923  void vmul(Condition cond,
1924            DataType dt,
1925            QRegister rd,
1926            QRegister rn,
1927            DRegister dm,
1928            unsigned index);
1929
1930  void vmul(
1931      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1932
1933  void vmul(
1934      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1935
1936  void vmul(
1937      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1938
1939  void vmull(Condition cond,
1940             DataType dt,
1941             QRegister rd,
1942             DRegister rn,
1943             DRegister dm,
1944             unsigned index);
1945
1946  void vmull(
1947      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1948
1949  void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1950
1951  void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
1952
1953  void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
1954
1955  void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
1956
1957  void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm);
1958
1959  void vnmla(
1960      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1961
1962  void vnmla(
1963      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1964
1965  void vnmls(
1966      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1967
1968  void vnmls(
1969      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1970
1971  void vnmul(
1972      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1973
1974  void vnmul(
1975      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1976
1977  void vorn(Condition cond,
1978            DataType dt,
1979            DRegister rd,
1980            DRegister rn,
1981            const DOperand& operand);
1982
1983  void vorn(Condition cond,
1984            DataType dt,
1985            QRegister rd,
1986            QRegister rn,
1987            const QOperand& operand);
1988
1989  void vorr(Condition cond,
1990            DataType dt,
1991            DRegister rd,
1992            DRegister rn,
1993            const DOperand& operand);
1994
1995  void vorr(Condition cond,
1996            DataType dt,
1997            QRegister rd,
1998            QRegister rn,
1999            const QOperand& operand);
2000
2001  void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm);
2002
2003  void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm);
2004
2005  void vpadd(
2006      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2007
2008  void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm);
2009
2010  void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
2011
2012  void vpmax(
2013      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2014
2015  void vpmin(
2016      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2017
2018  void vpop(Condition cond, DataType dt, DRegisterList dreglist);
2019
2020  void vpop(Condition cond, DataType dt, SRegisterList sreglist);
2021
2022  void vpush(Condition cond, DataType dt, DRegisterList dreglist);
2023
2024  void vpush(Condition cond, DataType dt, SRegisterList sreglist);
2025
2026  void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
2027
2028  void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
2029
2030  void vqadd(
2031      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2032
2033  void vqadd(
2034      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2035
2036  void vqdmlal(
2037      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2038
2039  void vqdmlal(Condition cond,
2040               DataType dt,
2041               QRegister rd,
2042               DRegister rn,
2043               DRegister dm,
2044               unsigned index);
2045
2046  void vqdmlsl(
2047      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2048
2049  void vqdmlsl(Condition cond,
2050               DataType dt,
2051               QRegister rd,
2052               DRegister rn,
2053               DRegister dm,
2054               unsigned index);
2055
2056  void vqdmulh(
2057      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2058
2059  void vqdmulh(
2060      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2061
2062  void vqdmulh(Condition cond,
2063               DataType dt,
2064               DRegister rd,
2065               DRegister rn,
2066               DRegisterLane rm);
2067
2068  void vqdmulh(Condition cond,
2069               DataType dt,
2070               QRegister rd,
2071               QRegister rn,
2072               DRegisterLane rm);
2073
2074  void vqdmull(
2075      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2076
2077  void vqdmull(Condition cond,
2078               DataType dt,
2079               QRegister rd,
2080               DRegister rn,
2081               DRegisterLane rm);
2082
2083  void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
2084
2085  void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm);
2086
2087  void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
2088
2089  void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
2090
2091  void vqrdmulh(
2092      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2093
2094  void vqrdmulh(
2095      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2096
2097  void vqrdmulh(Condition cond,
2098                DataType dt,
2099                DRegister rd,
2100                DRegister rn,
2101                DRegisterLane rm);
2102
2103  void vqrdmulh(Condition cond,
2104                DataType dt,
2105                QRegister rd,
2106                QRegister rn,
2107                DRegisterLane rm);
2108
2109  void vqrshl(
2110      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2111
2112  void vqrshl(
2113      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2114
2115  void vqrshrn(Condition cond,
2116               DataType dt,
2117               DRegister rd,
2118               QRegister rm,
2119               const QOperand& operand);
2120
2121  void vqrshrun(Condition cond,
2122                DataType dt,
2123                DRegister rd,
2124                QRegister rm,
2125                const QOperand& operand);
2126
2127  void vqshl(Condition cond,
2128             DataType dt,
2129             DRegister rd,
2130             DRegister rm,
2131             const DOperand& operand);
2132
2133  void vqshl(Condition cond,
2134             DataType dt,
2135             QRegister rd,
2136             QRegister rm,
2137             const QOperand& operand);
2138
2139  void vqshlu(Condition cond,
2140              DataType dt,
2141              DRegister rd,
2142              DRegister rm,
2143              const DOperand& operand);
2144
2145  void vqshlu(Condition cond,
2146              DataType dt,
2147              QRegister rd,
2148              QRegister rm,
2149              const QOperand& operand);
2150
2151  void vqshrn(Condition cond,
2152              DataType dt,
2153              DRegister rd,
2154              QRegister rm,
2155              const QOperand& operand);
2156
2157  void vqshrun(Condition cond,
2158               DataType dt,
2159               DRegister rd,
2160               QRegister rm,
2161               const QOperand& operand);
2162
2163  void vqsub(
2164      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2165
2166  void vqsub(
2167      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2168
2169  void vraddhn(
2170      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2171
2172  void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
2173
2174  void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm);
2175
2176  void vrecps(
2177      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2178
2179  void vrecps(
2180      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2181
2182  void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm);
2183
2184  void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm);
2185
2186  void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
2187
2188  void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
2189
2190  void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm);
2191
2192  void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm);
2193
2194  void vrhadd(
2195      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2196
2197  void vrhadd(
2198      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2199
2200  void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2201
2202  void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2203
2204  void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2205
2206  void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2207
2208  void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2209
2210  void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2211
2212  void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2213
2214  void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2215
2216  void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2217
2218  void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2219
2220  void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2221
2222  void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2223
2224  void vrintr(
2225      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2226
2227  void vrintr(
2228      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2229
2230  void vrintx(
2231      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2232
2233  void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2234
2235  void vrintx(
2236      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2237
2238  void vrintz(
2239      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
2240
2241  void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
2242
2243  void vrintz(
2244      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
2245
2246  void vrshl(
2247      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2248
2249  void vrshl(
2250      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2251
2252  void vrshr(Condition cond,
2253             DataType dt,
2254             DRegister rd,
2255             DRegister rm,
2256             const DOperand& operand);
2257
2258  void vrshr(Condition cond,
2259             DataType dt,
2260             QRegister rd,
2261             QRegister rm,
2262             const QOperand& operand);
2263
2264  void vrshrn(Condition cond,
2265              DataType dt,
2266              DRegister rd,
2267              QRegister rm,
2268              const QOperand& operand);
2269
2270  void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
2271
2272  void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
2273
2274  void vrsqrts(
2275      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2276
2277  void vrsqrts(
2278      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2279
2280  void vrsra(Condition cond,
2281             DataType dt,
2282             DRegister rd,
2283             DRegister rm,
2284             const DOperand& operand);
2285
2286  void vrsra(Condition cond,
2287             DataType dt,
2288             QRegister rd,
2289             QRegister rm,
2290             const QOperand& operand);
2291
2292  void vrsubhn(
2293      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2294
2295  void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2296
2297  void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2298
2299  void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2300
2301  void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2302
2303  void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2304
2305  void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2306
2307  void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2308
2309  void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2310
2311  void vshl(Condition cond,
2312            DataType dt,
2313            DRegister rd,
2314            DRegister rm,
2315            const DOperand& operand);
2316
2317  void vshl(Condition cond,
2318            DataType dt,
2319            QRegister rd,
2320            QRegister rm,
2321            const QOperand& operand);
2322
2323  void vshll(Condition cond,
2324             DataType dt,
2325             QRegister rd,
2326             DRegister rm,
2327             const DOperand& operand);
2328
2329  void vshr(Condition cond,
2330            DataType dt,
2331            DRegister rd,
2332            DRegister rm,
2333            const DOperand& operand);
2334
2335  void vshr(Condition cond,
2336            DataType dt,
2337            QRegister rd,
2338            QRegister rm,
2339            const QOperand& operand);
2340
2341  void vshrn(Condition cond,
2342             DataType dt,
2343             DRegister rd,
2344             QRegister rm,
2345             const QOperand& operand);
2346
2347  void vsli(Condition cond,
2348            DataType dt,
2349            DRegister rd,
2350            DRegister rm,
2351            const DOperand& operand);
2352
2353  void vsli(Condition cond,
2354            DataType dt,
2355            QRegister rd,
2356            QRegister rm,
2357            const QOperand& operand);
2358
2359  void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
2360
2361  void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
2362
2363  void vsra(Condition cond,
2364            DataType dt,
2365            DRegister rd,
2366            DRegister rm,
2367            const DOperand& operand);
2368
2369  void vsra(Condition cond,
2370            DataType dt,
2371            QRegister rd,
2372            QRegister rm,
2373            const QOperand& operand);
2374
2375  void vsri(Condition cond,
2376            DataType dt,
2377            DRegister rd,
2378            DRegister rm,
2379            const DOperand& operand);
2380
2381  void vsri(Condition cond,
2382            DataType dt,
2383            QRegister rd,
2384            QRegister rm,
2385            const QOperand& operand);
2386
2387  void vst1(Condition cond,
2388            DataType dt,
2389            const NeonRegisterList& nreglist,
2390            const AlignedMemOperand& operand);
2391
2392  void vst2(Condition cond,
2393            DataType dt,
2394            const NeonRegisterList& nreglist,
2395            const AlignedMemOperand& operand);
2396
2397  void vst3(Condition cond,
2398            DataType dt,
2399            const NeonRegisterList& nreglist,
2400            const AlignedMemOperand& operand);
2401
2402  void vst3(Condition cond,
2403            DataType dt,
2404            const NeonRegisterList& nreglist,
2405            const MemOperand& operand);
2406
2407  void vst4(Condition cond,
2408            DataType dt,
2409            const NeonRegisterList& nreglist,
2410            const AlignedMemOperand& operand);
2411
2412  void vstm(Condition cond,
2413            DataType dt,
2414            Register rn,
2415            WriteBack write_back,
2416            DRegisterList dreglist);
2417
2418  void vstm(Condition cond,
2419            DataType dt,
2420            Register rn,
2421            WriteBack write_back,
2422            SRegisterList sreglist);
2423
2424  void vstmdb(Condition cond,
2425              DataType dt,
2426              Register rn,
2427              WriteBack write_back,
2428              DRegisterList dreglist);
2429
2430  void vstmdb(Condition cond,
2431              DataType dt,
2432              Register rn,
2433              WriteBack write_back,
2434              SRegisterList sreglist);
2435
2436  void vstmia(Condition cond,
2437              DataType dt,
2438              Register rn,
2439              WriteBack write_back,
2440              DRegisterList dreglist);
2441
2442  void vstmia(Condition cond,
2443              DataType dt,
2444              Register rn,
2445              WriteBack write_back,
2446              SRegisterList sreglist);
2447
2448  void vstr(Condition cond,
2449            DataType dt,
2450            DRegister rd,
2451            const MemOperand& operand);
2452
2453  void vstr(Condition cond,
2454            DataType dt,
2455            SRegister rd,
2456            const MemOperand& operand);
2457
2458  void vsub(
2459      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2460
2461  void vsub(
2462      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2463
2464  void vsub(
2465      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2466
2467  void vsubhn(
2468      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2469
2470  void vsubl(
2471      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2472
2473  void vsubw(
2474      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
2475
2476  void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2477
2478  void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2479
2480  void vtbl(Condition cond,
2481            DataType dt,
2482            DRegister rd,
2483            const NeonRegisterList& nreglist,
2484            DRegister rm);
2485
2486  void vtbx(Condition cond,
2487            DataType dt,
2488            DRegister rd,
2489            const NeonRegisterList& nreglist,
2490            DRegister rm);
2491
2492  void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm);
2493
2494  void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm);
2495
2496  void vtst(
2497      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2498
2499  void vtst(
2500      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2501
2502  void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2503
2504  void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2505
2506  void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm);
2507
2508  void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm);
2509
2510  void yield(Condition cond, EncodingSize size);
2511
2512  int T32Size(uint32_t instr);
2513  void DecodeT32(uint32_t instr);
2514  void DecodeA32(uint32_t instr);
2515};
2516
2517DataTypeValue Dt_L_imm6_1_Decode(uint32_t value, uint32_t type_value);
2518DataTypeValue Dt_L_imm6_2_Decode(uint32_t value, uint32_t type_value);
2519DataTypeValue Dt_L_imm6_3_Decode(uint32_t value);
2520DataTypeValue Dt_L_imm6_4_Decode(uint32_t value);
2521DataTypeValue Dt_imm6_1_Decode(uint32_t value, uint32_t type_value);
2522DataTypeValue Dt_imm6_2_Decode(uint32_t value, uint32_t type_value);
2523DataTypeValue Dt_imm6_3_Decode(uint32_t value);
2524DataTypeValue Dt_imm6_4_Decode(uint32_t value, uint32_t type_value);
2525DataTypeValue Dt_op_U_size_1_Decode(uint32_t value);
2526DataTypeValue Dt_op_size_1_Decode(uint32_t value);
2527DataTypeValue Dt_op_size_2_Decode(uint32_t value);
2528DataTypeValue Dt_op_size_3_Decode(uint32_t value);
2529DataTypeValue Dt_U_imm3H_1_Decode(uint32_t value);
2530DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2531DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2532DataTypeValue Dt_imm4_1_Decode(uint32_t value, unsigned* lane);
2533DataTypeValue Dt_B_E_1_Decode(uint32_t value);
2534DataTypeValue Dt_op_1_Decode1(uint32_t value);
2535DataTypeValue Dt_op_1_Decode2(uint32_t value);
2536DataTypeValue Dt_op_2_Decode(uint32_t value);
2537DataTypeValue Dt_op_3_Decode(uint32_t value);
2538DataTypeValue Dt_U_sx_1_Decode(uint32_t value);
2539DataTypeValue Dt_op_U_1_Decode1(uint32_t value);
2540DataTypeValue Dt_op_U_1_Decode2(uint32_t value);
2541DataTypeValue Dt_sz_1_Decode(uint32_t value);
2542DataTypeValue Dt_F_size_1_Decode(uint32_t value);
2543DataTypeValue Dt_F_size_2_Decode(uint32_t value);
2544DataTypeValue Dt_F_size_3_Decode(uint32_t value);
2545DataTypeValue Dt_F_size_4_Decode(uint32_t value);
2546DataTypeValue Dt_U_size_1_Decode(uint32_t value);
2547DataTypeValue Dt_U_size_2_Decode(uint32_t value);
2548DataTypeValue Dt_U_size_3_Decode(uint32_t value);
2549DataTypeValue Dt_size_1_Decode(uint32_t value);
2550DataTypeValue Dt_size_2_Decode(uint32_t value);
2551DataTypeValue Dt_size_3_Decode(uint32_t value);
2552DataTypeValue Dt_size_4_Decode(uint32_t value);
2553DataTypeValue Dt_size_5_Decode(uint32_t value);
2554DataTypeValue Dt_size_6_Decode(uint32_t value);
2555DataTypeValue Dt_size_7_Decode(uint32_t value);
2556DataTypeValue Dt_size_8_Decode(uint32_t value);
2557DataTypeValue Dt_size_9_Decode(uint32_t value, uint32_t type_value);
2558DataTypeValue Dt_size_10_Decode(uint32_t value);
2559DataTypeValue Dt_size_11_Decode(uint32_t value, uint32_t type_value);
2560DataTypeValue Dt_size_12_Decode(uint32_t value, uint32_t type_value);
2561DataTypeValue Dt_size_13_Decode(uint32_t value);
2562DataTypeValue Dt_size_14_Decode(uint32_t value);
2563DataTypeValue Dt_size_15_Decode(uint32_t value);
2564DataTypeValue Dt_size_16_Decode(uint32_t value);
2565// End of generated code.
2566
2567class PrintDisassembler : public Disassembler {
2568 public:
2569  explicit PrintDisassembler(std::ostream& os,  // NOLINT(runtime/references)
2570                             uint32_t code_address = 0)
2571      : Disassembler(os, code_address) {}
2572  explicit PrintDisassembler(DisassemblerStream* os, uint32_t code_address = 0)
2573      : Disassembler(os, code_address) {}
2574
2575  virtual void PrintCodeAddress(uint32_t code_address) {
2576    os() << "0x" << std::hex << std::setw(8) << std::setfill('0')
2577         << code_address << "\t";
2578  }
2579
2580  virtual void PrintOpcode16(uint32_t opcode) {
2581    os() << std::hex << std::setw(4) << std::setfill('0') << opcode << "    "
2582         << std::dec << "\t";
2583  }
2584
2585  virtual void PrintOpcode32(uint32_t opcode) {
2586    os() << std::hex << std::setw(8) << std::setfill('0') << opcode << std::dec
2587         << "\t";
2588  }
2589
2590  const uint32_t* DecodeA32At(const uint32_t* instruction_address) {
2591    DecodeA32(*instruction_address);
2592    return instruction_address + 1;
2593  }
2594
2595  // Returns the address of the next instruction.
2596  const uint16_t* DecodeT32At(const uint16_t* instruction_address,
2597                              const uint16_t* buffer_end);
2598  void DecodeT32(uint32_t instruction);
2599  void DecodeA32(uint32_t instruction);
2600  void DisassembleA32Buffer(const uint32_t* buffer, size_t size_in_bytes);
2601  void DisassembleT32Buffer(const uint16_t* buffer, size_t size_in_bytes);
2602};
2603
2604}  // namespace aarch32
2605}  // namespace vixl
2606
2607#endif  // VIXL_DISASM_AARCH32_H_
2608