1/*
2// Copyright (c) 2014 Intel Corporation 
3//
4// Licensed under the Apache License, Version 2.0 (the "License");
5// you may not use this file except in compliance with the License.
6// You may obtain a copy of the License at
7//
8//      http://www.apache.org/licenses/LICENSE-2.0
9//
10// Unless required by applicable law or agreed to in writing, software
11// distributed under the License is distributed on an "AS IS" BASIS,
12// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13// See the License for the specific language governing permissions and
14// limitations under the License.
15*/
16#include <HwcTrace.h>
17#include <Drm.h>
18#include <Hwcomposer.h>
19#include <common/VsyncControl.h>
20
21namespace android {
22namespace intel {
23
24VsyncControl::VsyncControl()
25    : IVsyncControl(),
26      mInitialized(false)
27{
28}
29
30VsyncControl::~VsyncControl()
31{
32    WARN_IF_NOT_DEINIT();
33}
34
35bool VsyncControl::initialize()
36{
37    mInitialized = true;
38    return true;
39}
40
41void VsyncControl::deinitialize()
42{
43    mInitialized = false;
44}
45
46bool VsyncControl::control(int disp, bool enabled)
47{
48    ATRACE("disp = %d, enabled = %d", disp, enabled);
49
50    struct drm_psb_vsync_set_arg arg;
51    memset(&arg, 0, sizeof(struct drm_psb_vsync_set_arg));
52
53    // pipe equals to disp
54    arg.vsync.pipe = disp;
55
56    if (enabled) {
57        arg.vsync_operation_mask = VSYNC_ENABLE;
58    } else {
59        arg.vsync_operation_mask = VSYNC_DISABLE;
60    }
61    Drm *drm = Hwcomposer::getInstance().getDrm();
62    return drm->writeReadIoctl(DRM_PSB_VSYNC_SET, &arg, sizeof(arg));
63}
64
65bool VsyncControl::wait(int disp, int64_t& timestamp)
66{
67    ATRACE("disp = %d", disp);
68
69    struct drm_psb_vsync_set_arg arg;
70    memset(&arg, 0, sizeof(struct drm_psb_vsync_set_arg));
71
72    arg.vsync_operation_mask = VSYNC_WAIT;
73
74    // pipe equals to disp
75    arg.vsync.pipe = disp;
76
77    Drm *drm = Hwcomposer::getInstance().getDrm();
78    bool ret = drm->writeReadIoctl(DRM_PSB_VSYNC_SET, &arg, sizeof(arg));
79    timestamp = (int64_t)arg.vsync.timestamp;
80    return ret;
81}
82
83} // namespace intel
84} // namespace android
85