1#ifndef __UAPI_MSMB_PPROC_H
2#define __UAPI_MSMB_PPROC_H
3
4#include <linux/videodev2.h>
5#include <linux/types.h>
6#include <media/msmb_generic_buf_mgr.h>
7
8/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
9#define MAX_PLANES VIDEO_MAX_PLANES
10/* PARTIAL_FRAME_STRIPE_COUNT must be even */
11#define PARTIAL_FRAME_STRIPE_COUNT 4
12
13#define MAX_NUM_CPP_STRIPS 8
14#define MSM_CPP_MAX_NUM_PLANES 3
15#define MSM_CPP_MIN_FRAME_LENGTH 13
16#define MSM_CPP_MAX_FRAME_LENGTH 4096
17#define MSM_CPP_MAX_FW_NAME_LEN 32
18#define MAX_FREQ_TBL 10
19
20enum msm_cpp_frame_type {
21	MSM_CPP_OFFLINE_FRAME,
22	MSM_CPP_REALTIME_FRAME,
23};
24
25enum msm_vpe_frame_type {
26	MSM_VPE_OFFLINE_FRAME,
27	MSM_VPE_REALTIME_FRAME,
28};
29
30struct msm_cpp_buffer_info_t {
31	int32_t fd;
32	uint32_t index;
33	uint32_t offset;
34	uint8_t native_buff;
35	uint8_t processed_divert;
36	uint32_t identity;
37};
38
39struct msm_cpp_stream_buff_info_t {
40	uint32_t identity;
41	uint32_t num_buffs;
42	struct msm_cpp_buffer_info_t *buffer_info;
43};
44
45enum msm_cpp_batch_mode_t {
46	BATCH_MODE_NONE,
47	BATCH_MODE_VIDEO,
48	BATCH_MODE_PREVIEW
49};
50
51struct msm_cpp_batch_info_t {
52	enum msm_cpp_batch_mode_t  batch_mode;
53	uint32_t batch_size;
54	uint32_t intra_plane_offset[MAX_PLANES];
55	uint32_t pick_preview_idx;
56	uint32_t cont_idx;
57};
58
59struct msm_cpp_frame_info_t {
60	int32_t frame_id;
61	struct timeval timestamp;
62	uint32_t inst_id;
63	uint32_t identity;
64	uint32_t client_id;
65	enum msm_cpp_frame_type frame_type;
66	uint32_t num_strips;
67	uint32_t msg_len;
68	uint32_t *cpp_cmd_msg;
69	int src_fd;
70	int dst_fd;
71	struct timeval in_time, out_time;
72	void __user *cookie;
73	int32_t *status;
74	int32_t duplicate_output;
75	uint32_t duplicate_identity;
76	uint32_t feature_mask;
77	uint8_t we_disable;
78	struct msm_cpp_buffer_info_t input_buffer_info;
79	struct msm_cpp_buffer_info_t output_buffer_info[8];
80	struct msm_cpp_buffer_info_t duplicate_buffer_info;
81	struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2];
82	uint32_t reserved;
83	uint8_t partial_frame_indicator;
84	/* the followings are used only for partial_frame type
85	 * and is only used for offline frame processing and
86	 * only if payload big enough and need to be split into partial_frame
87	 * if first_payload, kernel acquires output buffer
88	 * first payload must have the last stripe
89	 * buffer addresses from 0 to last_stripe_index are updated.
90	 * kernel updates payload with msg_len and stripe_info
91	 * kernel sends top level, plane level, then only stripes
92	 * starting with first_stripe_index and
93	 * ends with last_stripe_index
94	 * kernel then sends trailing flag at frame done,
95	 * if last payload, kernel queues the output buffer to HAL
96	 */
97	uint8_t first_payload;
98	uint8_t last_payload;
99	uint32_t first_stripe_index;
100	uint32_t last_stripe_index;
101	uint32_t stripe_info_offset;
102	uint32_t stripe_info;
103	struct msm_cpp_batch_info_t  batch_info;
104};
105
106struct msm_cpp_pop_stream_info_t {
107	int32_t frame_id;
108	uint32_t identity;
109};
110
111struct cpp_hw_info {
112	uint32_t cpp_hw_version;
113	uint32_t cpp_hw_caps;
114	unsigned long freq_tbl[MAX_FREQ_TBL];
115	uint32_t freq_tbl_count;
116};
117
118struct msm_vpe_frame_strip_info {
119	uint32_t src_w;
120	uint32_t src_h;
121	uint32_t dst_w;
122	uint32_t dst_h;
123	uint32_t src_x;
124	uint32_t src_y;
125	uint32_t phase_step_x;
126	uint32_t phase_step_y;
127	uint32_t phase_init_x;
128	uint32_t phase_init_y;
129};
130
131struct msm_vpe_buffer_info_t {
132	int32_t fd;
133	uint32_t index;
134	uint32_t offset;
135	uint8_t native_buff;
136	uint8_t processed_divert;
137};
138
139struct msm_vpe_stream_buff_info_t {
140	uint32_t identity;
141	uint32_t num_buffs;
142	struct msm_vpe_buffer_info_t *buffer_info;
143};
144
145struct msm_vpe_frame_info_t {
146	int32_t frame_id;
147	struct timeval timestamp;
148	uint32_t inst_id;
149	uint32_t identity;
150	uint32_t client_id;
151	enum msm_vpe_frame_type frame_type;
152	struct msm_vpe_frame_strip_info strip_info;
153	unsigned long src_fd;
154	unsigned long dst_fd;
155	struct ion_handle *src_ion_handle;
156	struct ion_handle *dest_ion_handle;
157	unsigned long src_phyaddr;
158	unsigned long dest_phyaddr;
159	unsigned long src_chroma_plane_offset;
160	unsigned long dest_chroma_plane_offset;
161	struct timeval in_time, out_time;
162	void *cookie;
163
164	struct msm_vpe_buffer_info_t input_buffer_info;
165	struct msm_vpe_buffer_info_t output_buffer_info;
166};
167
168struct msm_pproc_queue_buf_info {
169	struct msm_buf_mngr_info buff_mgr_info;
170	uint8_t is_buf_dirty;
171};
172
173struct msm_cpp_clock_settings_t {
174	unsigned long clock_rate;
175	uint64_t avg;
176	uint64_t inst;
177};
178
179#define VIDIOC_MSM_CPP_CFG \
180	_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
181
182#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
183	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
184
185#define VIDIOC_MSM_CPP_GET_INST_INFO \
186	_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
187
188#define VIDIOC_MSM_CPP_LOAD_FIRMWARE \
189	_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
190
191#define VIDIOC_MSM_CPP_GET_HW_INFO \
192	_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
193
194#define VIDIOC_MSM_CPP_FLUSH_QUEUE \
195	_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
196
197#define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO \
198	_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl_t)
199
200#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO \
201	_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t)
202
203#define VIDIOC_MSM_VPE_CFG \
204	_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
205
206#define VIDIOC_MSM_VPE_TRANSACTION_SETUP \
207	_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
208
209#define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD \
210	_IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
211
212#define VIDIOC_MSM_VPE_GET_INST_INFO \
213	_IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t)
214
215#define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO \
216	_IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl_t)
217
218#define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO \
219	_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl_t)
220
221#define VIDIOC_MSM_CPP_QUEUE_BUF \
222	_IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t)
223
224#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO \
225	_IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t)
226
227#define VIDIOC_MSM_CPP_SET_CLOCK \
228	_IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl_t)
229
230#define VIDIOC_MSM_CPP_POP_STREAM_BUFFER \
231	_IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl_t)
232
233#define VIDIOC_MSM_CPP_IOMMU_ATTACH \
234	_IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl_t)
235
236#define VIDIOC_MSM_CPP_IOMMU_DETACH \
237	_IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t)
238
239#define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF\
240	_IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl_t)
241
242
243#define V4L2_EVENT_CPP_FRAME_DONE  (V4L2_EVENT_PRIVATE_START + 0)
244#define V4L2_EVENT_VPE_FRAME_DONE  (V4L2_EVENT_PRIVATE_START + 1)
245
246struct msm_camera_v4l2_ioctl_t {
247	uint32_t id;
248	size_t len;
249	int32_t trans_code;
250	void __user *ioctl_ptr;
251};
252
253#endif
254
255