1/* 2 * Copyright (C) 2017 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#include <stdint.h> 18 19#include <gtest/gtest.h> 20 21#include <unwindstack/Elf.h> 22#include <unwindstack/ElfInterface.h> 23#include <unwindstack/MapInfo.h> 24#include <unwindstack/Regs.h> 25 26#include "MemoryFake.h" 27 28namespace unwindstack { 29 30class ElfFake : public Elf { 31 public: 32 ElfFake(Memory* memory) : Elf(memory) { valid_ = true; } 33 virtual ~ElfFake() = default; 34 35 void set_elf_interface(ElfInterface* interface) { interface_.reset(interface); } 36}; 37 38class ElfInterfaceFake : public ElfInterface { 39 public: 40 ElfInterfaceFake(Memory* memory) : ElfInterface(memory) {} 41 virtual ~ElfInterfaceFake() = default; 42 43 void set_load_bias(uint64_t load_bias) { load_bias_ = load_bias; } 44 45 bool Init() override { return false; } 46 void InitHeaders() override {} 47 bool GetSoname(std::string*) override { return false; } 48 bool GetFunctionName(uint64_t, std::string*, uint64_t*) override { return false; } 49 bool Step(uint64_t, Regs*, Memory*) override { return false; } 50}; 51 52template <typename TypeParam> 53class RegsTestImpl : public RegsImpl<TypeParam> { 54 public: 55 RegsTestImpl(uint16_t total_regs, uint16_t regs_sp) 56 : RegsImpl<TypeParam>(total_regs, regs_sp, Regs::Location(Regs::LOCATION_UNKNOWN, 0)) {} 57 RegsTestImpl(uint16_t total_regs, uint16_t regs_sp, Regs::Location return_loc) 58 : RegsImpl<TypeParam>(total_regs, regs_sp, return_loc) {} 59 virtual ~RegsTestImpl() = default; 60 61 uint64_t GetAdjustedPc(uint64_t, Elf*) override { return 0; } 62 void SetFromRaw() override {} 63 bool StepIfSignalHandler(uint64_t, Elf*, Memory*) override { return false; } 64}; 65 66class RegsTest : public ::testing::Test { 67 protected: 68 void SetUp() override { 69 memory_ = new MemoryFake; 70 elf_.reset(new ElfFake(memory_)); 71 elf_interface_ = new ElfInterfaceFake(elf_->memory()); 72 elf_->set_elf_interface(elf_interface_); 73 } 74 75 template <typename AddressType> 76 void RegsReturnAddressRegister(); 77 78 ElfInterfaceFake* elf_interface_; 79 MemoryFake* memory_; 80 std::unique_ptr<ElfFake> elf_; 81}; 82 83TEST_F(RegsTest, regs32) { 84 RegsTestImpl<uint32_t> regs32(50, 10); 85 ASSERT_EQ(50U, regs32.total_regs()); 86 ASSERT_EQ(10U, regs32.sp_reg()); 87 88 uint32_t* raw = reinterpret_cast<uint32_t*>(regs32.RawData()); 89 for (size_t i = 0; i < 50; i++) { 90 raw[i] = 0xf0000000 + i; 91 } 92 regs32.set_pc(0xf0120340); 93 regs32.set_sp(0xa0ab0cd0); 94 95 for (size_t i = 0; i < 50; i++) { 96 ASSERT_EQ(0xf0000000U + i, regs32[i]) << "Failed comparing register " << i; 97 } 98 99 ASSERT_EQ(0xf0120340U, regs32.pc()); 100 ASSERT_EQ(0xa0ab0cd0U, regs32.sp()); 101 102 regs32[32] = 10; 103 ASSERT_EQ(10U, regs32[32]); 104} 105 106TEST_F(RegsTest, regs64) { 107 RegsTestImpl<uint64_t> regs64(30, 12); 108 ASSERT_EQ(30U, regs64.total_regs()); 109 ASSERT_EQ(12U, regs64.sp_reg()); 110 111 uint64_t* raw = reinterpret_cast<uint64_t*>(regs64.RawData()); 112 for (size_t i = 0; i < 30; i++) { 113 raw[i] = 0xf123456780000000UL + i; 114 } 115 regs64.set_pc(0xf123456780102030UL); 116 regs64.set_sp(0xa123456780a0b0c0UL); 117 118 for (size_t i = 0; i < 30; i++) { 119 ASSERT_EQ(0xf123456780000000U + i, regs64[i]) << "Failed reading register " << i; 120 } 121 122 ASSERT_EQ(0xf123456780102030UL, regs64.pc()); 123 ASSERT_EQ(0xa123456780a0b0c0UL, regs64.sp()); 124 125 regs64[8] = 10; 126 ASSERT_EQ(10U, regs64[8]); 127} 128 129template <typename AddressType> 130void RegsTest::RegsReturnAddressRegister() { 131 RegsTestImpl<AddressType> regs(20, 10, Regs::Location(Regs::LOCATION_REGISTER, 5)); 132 133 regs[5] = 0x12345; 134 uint64_t value; 135 ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); 136 ASSERT_EQ(0x12345U, value); 137} 138 139TEST_F(RegsTest, regs32_return_address_register) { 140 RegsReturnAddressRegister<uint32_t>(); 141} 142 143TEST_F(RegsTest, regs64_return_address_register) { 144 RegsReturnAddressRegister<uint64_t>(); 145} 146 147TEST_F(RegsTest, regs32_return_address_sp_offset) { 148 RegsTestImpl<uint32_t> regs(20, 10, Regs::Location(Regs::LOCATION_SP_OFFSET, -2)); 149 150 regs.set_sp(0x2002); 151 memory_->SetData32(0x2000, 0x12345678); 152 uint64_t value; 153 ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); 154 ASSERT_EQ(0x12345678U, value); 155} 156 157TEST_F(RegsTest, regs64_return_address_sp_offset) { 158 RegsTestImpl<uint64_t> regs(20, 10, Regs::Location(Regs::LOCATION_SP_OFFSET, -8)); 159 160 regs.set_sp(0x2008); 161 memory_->SetData64(0x2000, 0x12345678aabbccddULL); 162 uint64_t value; 163 ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); 164 ASSERT_EQ(0x12345678aabbccddULL, value); 165} 166 167TEST_F(RegsTest, rel_pc) { 168 RegsArm64 arm64; 169 ASSERT_EQ(0xcU, arm64.GetAdjustedPc(0x10, elf_.get())); 170 ASSERT_EQ(0x0U, arm64.GetAdjustedPc(0x4, elf_.get())); 171 ASSERT_EQ(0x3U, arm64.GetAdjustedPc(0x3, elf_.get())); 172 ASSERT_EQ(0x2U, arm64.GetAdjustedPc(0x2, elf_.get())); 173 ASSERT_EQ(0x1U, arm64.GetAdjustedPc(0x1, elf_.get())); 174 ASSERT_EQ(0x0U, arm64.GetAdjustedPc(0x0, elf_.get())); 175 176 RegsX86 x86; 177 ASSERT_EQ(0xffU, x86.GetAdjustedPc(0x100, elf_.get())); 178 ASSERT_EQ(0x1U, x86.GetAdjustedPc(0x2, elf_.get())); 179 ASSERT_EQ(0x0U, x86.GetAdjustedPc(0x1, elf_.get())); 180 ASSERT_EQ(0x0U, x86.GetAdjustedPc(0x0, elf_.get())); 181 182 RegsX86_64 x86_64; 183 ASSERT_EQ(0xffU, x86_64.GetAdjustedPc(0x100, elf_.get())); 184 ASSERT_EQ(0x1U, x86_64.GetAdjustedPc(0x2, elf_.get())); 185 ASSERT_EQ(0x0U, x86_64.GetAdjustedPc(0x1, elf_.get())); 186 ASSERT_EQ(0x0U, x86_64.GetAdjustedPc(0x0, elf_.get())); 187} 188 189TEST_F(RegsTest, rel_pc_arm) { 190 RegsArm arm; 191 192 // Check fence posts. 193 elf_interface_->set_load_bias(0); 194 ASSERT_EQ(3U, arm.GetAdjustedPc(0x5, elf_.get())); 195 ASSERT_EQ(4U, arm.GetAdjustedPc(0x4, elf_.get())); 196 ASSERT_EQ(3U, arm.GetAdjustedPc(0x3, elf_.get())); 197 ASSERT_EQ(2U, arm.GetAdjustedPc(0x2, elf_.get())); 198 ASSERT_EQ(1U, arm.GetAdjustedPc(0x1, elf_.get())); 199 ASSERT_EQ(0U, arm.GetAdjustedPc(0x0, elf_.get())); 200 201 elf_interface_->set_load_bias(0x100); 202 ASSERT_EQ(0xffU, arm.GetAdjustedPc(0xff, elf_.get())); 203 ASSERT_EQ(0x103U, arm.GetAdjustedPc(0x105, elf_.get())); 204 ASSERT_EQ(0x104U, arm.GetAdjustedPc(0x104, elf_.get())); 205 ASSERT_EQ(0x103U, arm.GetAdjustedPc(0x103, elf_.get())); 206 ASSERT_EQ(0x102U, arm.GetAdjustedPc(0x102, elf_.get())); 207 ASSERT_EQ(0x101U, arm.GetAdjustedPc(0x101, elf_.get())); 208 ASSERT_EQ(0x100U, arm.GetAdjustedPc(0x100, elf_.get())); 209 210 // Check thumb instructions handling. 211 elf_interface_->set_load_bias(0); 212 memory_->SetData32(0x2000, 0); 213 ASSERT_EQ(0x2003U, arm.GetAdjustedPc(0x2005, elf_.get())); 214 memory_->SetData32(0x2000, 0xe000f000); 215 ASSERT_EQ(0x2001U, arm.GetAdjustedPc(0x2005, elf_.get())); 216 217 elf_interface_->set_load_bias(0x400); 218 memory_->SetData32(0x2100, 0); 219 ASSERT_EQ(0x2503U, arm.GetAdjustedPc(0x2505, elf_.get())); 220 memory_->SetData32(0x2100, 0xf111f111); 221 ASSERT_EQ(0x2501U, arm.GetAdjustedPc(0x2505, elf_.get())); 222} 223 224TEST_F(RegsTest, elf_invalid) { 225 Elf invalid_elf(new MemoryFake); 226 RegsArm regs_arm; 227 RegsArm64 regs_arm64; 228 RegsX86 regs_x86; 229 RegsX86_64 regs_x86_64; 230 MapInfo map_info{.start = 0x1000, .end = 0x2000}; 231 232 regs_arm.set_pc(0x1500); 233 ASSERT_EQ(0x500U, invalid_elf.GetRelPc(regs_arm.pc(), &map_info)); 234 ASSERT_EQ(0x500U, regs_arm.GetAdjustedPc(0x500U, &invalid_elf)); 235 236 regs_arm64.set_pc(0x1600); 237 ASSERT_EQ(0x600U, invalid_elf.GetRelPc(regs_arm64.pc(), &map_info)); 238 ASSERT_EQ(0x600U, regs_arm64.GetAdjustedPc(0x600U, &invalid_elf)); 239 240 regs_x86.set_pc(0x1700); 241 ASSERT_EQ(0x700U, invalid_elf.GetRelPc(regs_x86.pc(), &map_info)); 242 ASSERT_EQ(0x700U, regs_x86.GetAdjustedPc(0x700U, &invalid_elf)); 243 244 regs_x86_64.set_pc(0x1800); 245 ASSERT_EQ(0x800U, invalid_elf.GetRelPc(regs_x86_64.pc(), &map_info)); 246 ASSERT_EQ(0x800U, regs_x86_64.GetAdjustedPc(0x800U, &invalid_elf)); 247} 248 249TEST_F(RegsTest, arm_set_from_raw) { 250 RegsArm arm; 251 uint32_t* regs = reinterpret_cast<uint32_t*>(arm.RawData()); 252 regs[13] = 0x100; 253 regs[15] = 0x200; 254 arm.SetFromRaw(); 255 EXPECT_EQ(0x100U, arm.sp()); 256 EXPECT_EQ(0x200U, arm.pc()); 257} 258 259TEST_F(RegsTest, arm64_set_from_raw) { 260 RegsArm64 arm64; 261 uint64_t* regs = reinterpret_cast<uint64_t*>(arm64.RawData()); 262 regs[31] = 0xb100000000ULL; 263 regs[32] = 0xc200000000ULL; 264 arm64.SetFromRaw(); 265 EXPECT_EQ(0xb100000000U, arm64.sp()); 266 EXPECT_EQ(0xc200000000U, arm64.pc()); 267} 268 269TEST_F(RegsTest, x86_set_from_raw) { 270 RegsX86 x86; 271 uint32_t* regs = reinterpret_cast<uint32_t*>(x86.RawData()); 272 regs[4] = 0x23450000; 273 regs[8] = 0xabcd0000; 274 x86.SetFromRaw(); 275 EXPECT_EQ(0x23450000U, x86.sp()); 276 EXPECT_EQ(0xabcd0000U, x86.pc()); 277} 278 279TEST_F(RegsTest, x86_64_set_from_raw) { 280 RegsX86_64 x86_64; 281 uint64_t* regs = reinterpret_cast<uint64_t*>(x86_64.RawData()); 282 regs[7] = 0x1200000000ULL; 283 regs[16] = 0x4900000000ULL; 284 x86_64.SetFromRaw(); 285 EXPECT_EQ(0x1200000000U, x86_64.sp()); 286 EXPECT_EQ(0x4900000000U, x86_64.pc()); 287} 288 289} // namespace unwindstack 290