89ff8b23f7c4189ba82407d95c3100c2f397cf19 |
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20-Nov-2017 |
Artem Serov <artem.serov@linaro.org> |
ARM64: Workaround for the callee saved FP registers and SIMD. Treat as scheduling barriers those vector instructions whose live ranges exceed the vectorized loop boundaries. This is a workaround for the lack of notion of SIMD register in the compiler; around a call we have to save/restore all live SIMD&FP registers (only lower 64 bits of SIMD&FP registers are callee saved) so don't reorder such vector instructions. Test: 706-checker-scheduler, test-art-host, test-art-target Bug: 69667779 Change-Id: I31e57518339d41545a0c519f7299afe381a8286c
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e764d2e50c544c2cb98ee61a15d613161ac6bd17 |
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05-Oct-2017 |
Vladimir Marko <vmarko@google.com> |
Use ScopedArenaAllocator for register allocation. Memory needed to compile the two most expensive methods for aosp_angler-userdebug boot image: BatteryStats.dumpCheckinLocked() : 25.1MiB -> 21.1MiB BatteryStats.dumpLocked(): 49.6MiB -> 42.0MiB This is because all the memory previously used by Scheduler is reused by the register allocator; the register allocator has a higher peak usage of the ArenaStack. And continue the "arena"->"allocator" renaming. Test: m test-art-host-gtest Test: testrunner.py --host Bug: 64312607 Change-Id: Idfd79a9901552b5147ec0bf591cb38120de86b01
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ca6fff898afcb62491458ae8bcd428bfb3043da1 |
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03-Oct-2017 |
Vladimir Marko <vmarko@google.com> |
ART: Use ScopedArenaAllocator for pass-local data. Passes using local ArenaAllocator were hiding their memory usage from the allocation counting, making it difficult to track down where memory was used. Using ScopedArenaAllocator reveals the memory usage. This changes the HGraph constructor which requires a lot of changes in tests. Refactor these tests to limit the amount of work needed the next time we change that constructor. Test: m test-art-host-gtest Test: testrunner.py --host Test: Build with kArenaAllocatorCountAllocations = true. Bug: 64312607 Change-Id: I34939e4086b500d6e827ff3ef2211d1a421ac91a
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0148de41a5c77c2f61252c219f1a02413c7c4a32 |
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05-Sep-2017 |
Aart Bik <ajcbik@google.com> |
Basic SIMD reduction support. Rationale: Enables vectorization of x += .... for very basic (simple, same-type) constructs. Paves the way for more complex (narrower and/or mixed-type) constructs, which will be handled by the next CL. This is a revert of Icb5d6c805516db0a1d911c3ede9a246ccef89a22 and thus a revert^2 of I2454778dd0ef1da915c178c7274e1cf33e271d0f and thus a revert^3 of I1c1c87b6323e01442e8fbd94869ddc9e760ea1fc and thus a revert^4 of I7880c135aee3ed0a39da9ae5b468cbf80e613766 PS1-2 shows what needed to change Test: test-art-host test-art-target Bug: 64091002 Change-Id: I647889e0da0959ca405b70081b79c7d3c9bcb2e9
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982334cef17d47ef2477d88a97203a9587a4b86f |
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02-Sep-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Basic SIMD reduction support." Fails 530-checker-lse on arm64. Bug: 64091002, 65212948 This reverts commit cfa59b49cde265dc5329a7e6956445f9f7a75f15. Change-Id: Icb5d6c805516db0a1d911c3ede9a246ccef89a22
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cfa59b49cde265dc5329a7e6956445f9f7a75f15 |
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31-Aug-2017 |
Aart Bik <ajcbik@google.com> |
Basic SIMD reduction support. Rationale: Enables vectorization of x += .... for very basic (simple, same-type) constructs. Paves the way for more complex (narrower and/or mixed-type) constructs, which will be handled by the next CL. This is a revert^2 of I7880c135aee3ed0a39da9ae5b468cbf80e613766 and thus a revert of I1c1c87b6323e01442e8fbd94869ddc9e760ea1fc PS1-2 shows what needed to change, with regression tests Test: test-art-host test-art-target Bug: 64091002, 65212948 Change-Id: I2454778dd0ef1da915c178c7274e1cf33e271d0f
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a57b4ee7b15ce6abfb5fa88c8dc8a516fe40e0d9 |
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30-Aug-2017 |
Aart Bik <ajcbik@google.com> |
Revert "Basic SIMD reduction support." This reverts commit 9879d0eac8fe2aae19ca6a4a2a83222d6383afc2. Getting these type check failures in some builds. Need time to look at this better, so reverting for now :-( dex2oatd F 08-30 21:14:29 210122 226218 code_generator.cc:115] Check failed: CheckType(instruction->GetType(), locations->InAt(0)) PrimDouble C Change-Id: I1c1c87b6323e01442e8fbd94869ddc9e760ea1fc
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9879d0eac8fe2aae19ca6a4a2a83222d6383afc2 |
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15-Aug-2017 |
Aart Bik <ajcbik@google.com> |
Basic SIMD reduction support. Rationale: Enables vectorization of x += .... for very basic (simple, same-type) constructs. Paves the way for more complex (narrower and/or mixed-type) constructs, which will be handled by the next CL. Test: test-art-host test-art-target Bug: 64091002 Change-Id: I7880c135aee3ed0a39da9ae5b468cbf80e613766
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f0fc4c6c9cedbd8665a2f98c4a649a62aaf3ac19 |
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03-May-2017 |
Artem Serov <artem.serov@linaro.org> |
ARM64: SIMD instruction scheduling. Enables scheduling for SIMD loops; the patch gives 4.1% perf gain on Linpack benchmark. Test: test-art-target, test-art-host. Change-Id: I5e728b5218fc6640ac583594ba08f69330b01e21
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74234daabb28a4b9c804bf8bf908e7334bd4d400 |
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13-Jan-2017 |
Anton Kirilov <anton.kirilov@linaro.org> |
ARM: Merge data-processing instructions and shifts/(un)signed extensions This commit mirrors the work that has already been done for ARM64. Test: m test-art-target-run-test-551-checker-shifter-operand Change-Id: Iec8c1563b035f40f0e18dcffde28d91dc21922f8
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22aa54bf8469689c7c6c33f15ff4df2ffba8fa15 |
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18-Oct-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Add HInstruction scheduling support. This commit adds a new `HInstructionScheduling` pass that performs basic scheduling on the `HGraph`. Currently, scheduling is performed at the block level, so no `HInstruction` ever leaves its block in this pass. The scheduling process iterates through blocks in the graph. For blocks that we can and want to schedule: 1) Build a dependency graph for instructions. It includes data dependencies (inputs/uses), but also environment dependencies and side-effect dependencies. 2) Schedule the dependency graph. This is a topological sort of the dependency graph, using heuristics to decide what node to schedule first when there are multiple candidates. Currently the heuristics only consider instruction latencies and schedule first the instructions that are on the critical path. Test: m test-art-host Test: m test-art-target Change-Id: Iec103177d4f059666d7c9626e5770531fbc5ccdc
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