57943810cfc789da890d73621741729da5feaaf8 |
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07-Dec-2017 |
Andreas Gampe <agampe@google.com> |
ART: Replace base/logging with android-base/logging Replace wherever possible. ART's base/logging is now mainly VLOG and initialization code that is unnecessary to pull in and makes changes to verbose logging more painful than they have to be. Test: m test-art-host Change-Id: I3e3a4672ba5b621e57590a526c7d1c8b749e4f6e
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e764d2e50c544c2cb98ee61a15d613161ac6bd17 |
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05-Oct-2017 |
Vladimir Marko <vmarko@google.com> |
Use ScopedArenaAllocator for register allocation. Memory needed to compile the two most expensive methods for aosp_angler-userdebug boot image: BatteryStats.dumpCheckinLocked() : 25.1MiB -> 21.1MiB BatteryStats.dumpLocked(): 49.6MiB -> 42.0MiB This is because all the memory previously used by Scheduler is reused by the register allocator; the register allocator has a higher peak usage of the ArenaStack. And continue the "arena"->"allocator" renaming. Test: m test-art-host-gtest Test: testrunner.py --host Bug: 64312607 Change-Id: Idfd79a9901552b5147ec0bf591cb38120de86b01
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0d127e10de0b06ec22d8e855d1d62773c4ede101 |
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05-Jul-2017 |
Roland Levillain <rpl@google.com> |
Do not refresh the Marking Register in CriticalNative methods. CriticalNative methods shall not be suspended and hence do not require MR to be refreshed in compiled JNI code. This change is for ARM and ARM64 only. Impact on Critical Native benchmarks times (median of 10 runs, lower is better): * angler-userdebug - ARMv7 ** All cores NativeDowncallStaticCritical -2.78% NativeDowncallStaticCritical6 -1.79% ** Little cores only NativeDowncallStaticCritical -1.66% NativeDowncallStaticCritical6 -1.27% ** Big cores only NativeDowncallStaticCritical -2.66% NativeDowncallStaticCritical6 -1.70% * angler-userdebug - ARMv8 ** All cores NativeDowncallStaticCritical -3.52% NativeDowncallStaticCritical6 -1.79% ** Little cores only NativeDowncallStaticCritical -1.63% NativeDowncallStaticCritical6 -1.27% ** Big cores only NativeDowncallStaticCritical -3.87% NativeDowncallStaticCritical6 -1.75% Test: m test-art-target Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false Test: m test-art-host-gtest Test: ARM64 device boot test Test: ARM device boot test Bug: b/37707231 Change-Id: I95d61b9ecde0afffdd5fd44763b19caa06025ec8
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2b03a1f24600c8c9558fb13d3f8bca1ef0f8ee40 |
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06-Jun-2017 |
Roland Levillain <rpl@google.com> |
Instrument ARM64 generated code to check the Marking Register. Generate run-time code in the Optimizing compiler checking that the Marking Register's value matches `self.tls32_.is.gc_marking` in debug mode (on target; and on host with JIT, or with AOT when compiling the core image). If a check fails, abort. Test: m test-art-target Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false Test: ARM64 device boot test with libartd. Bug: 37707231 Change-Id: Ie9b322b22b3d26654a06821e1db71dbda3c43061
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ae7ff92c430aa12484ff8258ee4ed13421ac7934 |
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06-Oct-2016 |
Igor Murashkin <iam@google.com> |
jni: Add read barrier fast path to jni compiler Static method dispatch via JNI requires a read barrier for the ArtMethod::GetDeclaringClass() load before adding it to the JNI StackHandleScope. We used to call ReadBarrierJni unconditionally but add a branch to skip calling it if the GC is not currently in the marking phase. Test: ART_USE_READ_BARRIER=true make test-art-host test-art-target Bug: 30437917 Change-Id: I4f505ebde17c0a67209c7bb51b3f39e37a06373a
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d9c90373d640a5e08072cf469c372e24a8c0fc35 |
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14-Sep-2016 |
David Brazdil <dbrazdil@google.com> |
Move ArrayRef to runtime/base Will be used in upcoming CLs regarding VDEX and VerifierDeps. Test: m test-art-host Change-Id: I68e611a4a52246c2bdf45eab7c61f3212908afd4
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3b165bc53c2f063e3a9c644d0edc7bc30c634884 |
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02-Aug-2016 |
Andreas Gampe <agampe@google.com> |
ART: Extract macro assembler Extract macro assembler functionality used by the JNI compiler from the assembler interface. Templatize the new interface so that type safety ensures correct usage. Change-Id: Idb9f56e5b87e43ee6a7378853d8a9f01abe156b2 Test: m test-art-host
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