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12-Oct-2016 |
Heyi Guo <heyi.guo@linaro.org> |
Hisilicon/PCIe: support different memory address in PCIe domain
Most of PCIe memory BARs can only be mapped to 4G above system address,
for there is not enough address space under 4G. However, some legacy
PCIe devices may require to be mapped into 32bit address. To support
such devices, a pair of new parameters is introduced to expose memory
address under 4G in PCIe domain, which can be different from the address
in system domain, by setting iATU accordingly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
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