| e35a3fb5b7879eb63c606a02f514f847530106f4 |
|
11-Oct-2017 |
Soby Mathew <soby.mathew@arm.com> |
ARM platforms: enable GICv3 state save/restore
Provides GICv3 save/restore feature to arm_system_pwr_domain_resume and
arm_system_pwr_domain_save functions.
Introduce FVP PSCI power level 3 (System level) support. This is solely
done to provide example code on how to use the GICv3 save and restore
helpers.
Also make CSS GICv3 platforms power off the Redistributor on SYSTEM
SUSPEND as its state is saved and restored.
Change-Id: I0d852f3af8824edee1a17c085cf593ddd33a4e77
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Co-Authored-by: Douglas Raillard <douglas.raillard@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| f145403c2a1a7064cb55670ac0674dc6586398ab |
|
03-Aug-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
mem_protect: Add mem_protect support in Juno and FVP for DRAM1
mem_protect needs some kind of non-volatile memory because it has
to remember its state across reset and power down events.
The most suitable electronic part for this feature is a NVRAM
which should be only accesible from the secure world. Juno and
FVP lack such hardware and for this reason the MEM_PROTECT
functionality is implemented with Flash EEPROM memory on both
boards, even though this memory is accesible from the non-secure
world. This is done only to show a full implementation of
these PSCI features, but an actual system shouldn't use a
non-secure NVRAM to implement it.
The EL3 runtime software will write the mem_protect flag and BL2
will read and clear the memory ranges if enabled. It is done in
BL2 because it reduces the time that TF needs access to the full
non-secure memory.
The memory layout of both boards is defined using macros which
take different values in Juno and FVP platforms. Generic platform
helpers are added that use the platform specific macros to generate
a mem_region_t that is valid for the platform.
Change-Id: I2c6818ac091a2966fa07a52c5ddf8f6fde4941e9
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 4adb10c1ede9773ce018ddb3b56f5eb900f220f8 |
|
14-Jul-2017 |
Isla Mitchell <isla.mitchell@arm.com> |
Fix order of ARM platform #includes
This fix modifies the order of #includes in ARM standard platforms
to meet the ARM TF coding standard.
Change-Id: Ide19aad6233babda4eea2d17d49e523645fed1b2
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| d832aee900a92d14a08a6a2a552894188404b6a4 |
|
23-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
aarch64: Enable Statistical Profiling Extensions for lower ELs
SPE is only supported in non-secure state. Accesses to SPE specific
registers from SEL1 will trap to EL3. During a world switch, before
`TTBR` is modified the SPE profiling buffers are drained. This is to
avoid a potential invalid memory access in SEL1.
SPE is architecturally specified only for AArch64.
Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 0851cb2468e76c5274d6cb8a98139a50a9091fcd |
|
02-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
fvp: Remove unnecessary default case
The default case is impossible to hit as the `power_level`
is already checked earlier. Avoids a clang warning.
Change-Id: I707463c843adc748ee9aa1d2313f9ab7dab3a8ab
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 82cb2c1ad9897473743f08437d0a3995bed561b9 |
|
03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 74a9578c209fc96eaed4ffdd26fd0e5fe94e21a9 |
|
09-Dec-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
FVP: Avail GIC Redistributor power management
Earlier patches introduced GIC Redistributor power management for ARM
platforms. This patch modifies FVP power management to power down
Redistributor during CPU power on/off.
Change-Id: I2adb9c50a7dd750019fe3b4e576b5d5fc364bffb
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 5486a9653bb7608ce4d39da44e73f40d82a3dbfb |
|
21-Oct-2016 |
Soby Mathew <soby.mathew@arm.com> |
Allow ARM Standard platforms to dynamically define PSCI capability
The capabilities exposed by the PSCI generic layer depends on the hooks
populated by the platform in `plat_arm_psci_pm_ops`. Currently ARM
Standard platforms statically define this structure. However, some
platforms may want to modify the hooks at runtime before registering
them with the generic layer.
This patch introduces a new ARM platform layer API
`plat_arm_psci_override_pm_ops` which allows the platform to probe
the power controller and modify `plat_arm_psci_pm_ops` if required.
Consequently, 'plat_arm_psci_pm_ops' is no longer qualified as
`const` on ARM Standard platforms.
Change-Id: I7dbb44b7bd36c20ec14ded5ee45a96816ca2ab9d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 1298ae023484077dcab596eb8e963cef96fe9605 |
|
04-Aug-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
FVP: Implement support for NODE_HW_STATE
This patch implements FVP platform hook to support NODE_HW_STATE PSCI
API. The platform hook validates the given MPIDR and reads corresponding
status from FVP power controller, and returns expected values for the
PSCI call.
Change-Id: I286c92637da11858db2c8aba8ba079389032de6d
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 6355f2347aec8bf6ad74867c2b0c996e10546ad4 |
|
15-Feb-2016 |
Vikram Kanigiri <vikram.kanigiri@arm.com> |
Rework use of interconnect drivers
ARM Trusted Firmware supports 2 different interconnect peripheral
drivers: CCI and CCN. ARM platforms are implemented using either of the
interconnect peripherals.
This patch adds a layer of abstraction to help ARM platform ports to
choose the right interconnect driver and corresponding platform support.
This is as described below:
1. A set of ARM common functions have been implemented to initialise an
interconnect and for entering/exiting a cluster from coherency. These
functions are prefixed as "plat_arm_interconnect_". Weak definitions of
these functions have been provided for each type of driver.
2.`plat_print_interconnect_regs` macro used for printing CCI registers is
moved from a common arm_macros.S to cci_macros.S.
3. The `ARM_CONFIG_HAS_CCI` flag used in `arm_config_flags` structure
is renamed to `ARM_CONFIG_HAS_INTERCONNECT`.
Change-Id: I02f31184fbf79b784175892d5ce1161b65a0066c
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 0f09c8f74846e1ad841b86af4b1266f023ca648a |
|
08-Dec-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Remove out-dated comment in FVP PWRC code
fvp_pwr_domain_on() used to program the CPUs mailbox. This changed
with commit 804040d10 but the comment documenting this code still
refers to the mailbox programming. This patch removes this out-dated
information.
Change-Id: Ibfe2a426bdda6e71f20c83a99cb223ceca9c559c
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 27573c59a6bf16c2330b41453f87bdd60afb2144 |
|
03-Nov-2015 |
Achin Gupta <achin.gupta@arm.com> |
Rework use of ARM GIC drivers on ARM platforms
Suport for ARM GIC v2.0 and v3.0 drivers has been reworked to create three
separate drivers instead of providing a single driver that can work on both
versions of the GIC architecture. These drivers correspond to the following
software use cases:
1. A GICv2 only driver that can run only on ARM GIC v2.0 implementations
e.g. GIC-400
2. A GICv3 only driver that can run only on ARM GIC v3.0 implementations
e.g. GIC-500 in a mode where all interrupt regimes use GICv3 features
3. A deprecated GICv3 driver that operates in legacy mode. This driver can
operate only in the GICv2 mode in the secure world. On a GICv3 system, this
driver allows normal world to run in either GICv3 mode (asymmetric mode)
or in the GICv2 mode. Both modes of operation are deprecated on GICv3
systems.
ARM platforms implement both versions of the GIC architecture. This patch adds a
layer of abstraction to help ARM platform ports chose the right GIC driver and
corresponding platform support. This is as described below:
1. A set of ARM common functions have been introduced to initialise the GIC and
the driver during cold and warm boot. These functions are prefixed as
"plat_arm_gic_". Weak definitions of these functions have been provided for
each type of driver.
2. Each platform includes the sources that implement the right functions
directly into the its makefile. The FVP can be instantiated with different
versions of the GIC architecture. It uses the FVP_USE_GIC_DRIVER build option
to specify which of the three drivers should be included in the build.
3. A list of secure interrupts has to be provided to initialise each of the
three GIC drivers. For GIC v3.0 the interrupt ids have to be further
categorised as Group 0 and Group 1 Secure interrupts. For GIC v2.0, the two
types are merged and treated as Group 0 interrupts.
The two lists of interrupts are exported from the platform_def.h. The lists
are constructed by adding a list of board specific interrupt ids to a list of
ids common to all ARM platforms and Compute sub-systems.
This patch also makes some fields of `arm_config` data structure in FVP redundant
and these unused fields are removed.
Change-Id: Ibc8c087be7a8a6b041b78c2c3bd0c648cd2035d8
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| f14d188681b2c6f49ccd22595b112da7b02798f8 |
|
26-Oct-2015 |
Soby Mathew <soby.mathew@arm.com> |
Prepare platforms to use refactored ARM GIC drivers
This patch adds platform helpers for the new GICv2 and GICv3 drivers in
plat_gicv2.c and plat_gicv3.c. The platforms can include the appropriate
file in their build according to the GIC driver to be used. The existing
plat_gic.c is only meant for the legacy GIC driver.
In the case of ARM platforms, the major changes are as follows:
1. The crash reporting helper macro `arm_print_gic_regs` that prints the GIC CPU
interface register values has been modified to detect the type of CPU
interface being used (System register or memory mappped interface) before
using the right interface to print the registers.
2. The power management helper function that is called after a core is powered
up has been further refactored. This is to highlight that the per-cpu
distributor interface should be initialised only when the core was originally
powered down using the CPU_OFF PSCI API and not when the CPU_SUSPEND PSCI API
was used.
3. In the case of CSS platforms, the system power domain restore helper
`arm_system_pwr_domain_resume()` is now only invoked in the `suspend_finish`
handler as the system power domain is always expected to be initialized when
the `on_finish` handler is invoked.
Change-Id: I7fc27d61fc6c2a60cea2436b676c5737d0257df6
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 785fb92b8a021369348da2316b99b7e143c2806f |
|
29-Sep-2015 |
Soby Mathew <soby.mathew@arm.com> |
Reorganise PSCI PM handler setup on ARM Standard platforms
This patch does the following reorganization to psci power management (PM)
handler setup for ARM standard platform ports :
1. The mailbox programming required during `plat_setup_psci_ops()` is identical
for all ARM platforms. Hence the implementation of this API is now moved
to the common `arm_pm.c` file. Each ARM platform now must define the
PLAT_ARM_TRUSTED_MAILBOX_BASE macro, which in current platforms is the same
as ARM_SHARED_RAM_BASE.
2. The PSCI PM handler callback structure, `plat_psci_ops`, must now be
exported via `plat_arm_psci_pm_ops`. This allows the common implementation
of `plat_setup_psci_ops()` to return a platform specific `plat_psci_ops`.
In the case of CSS platforms, a default weak implementation of the same is
provided in `css_pm.c` which can be overridden by each CSS platform.
3. For CSS platforms, the PSCI PM handlers defined in `css_pm.c` are now
made library functions and a new header file `css_pm.h` is added to export
these generic PM handlers. This allows the platform to reuse the
adequate CSS PM handlers and redefine others which need to be customized
when overriding the default `plat_arm_psci_pm_ops` in `css_pm.c`.
Change-Id: I277910f609e023ee5d5ff0129a80ecfce4356ede
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| f9e858b1f7b27d8e0b89cc7e12e7a90755d0dd00 |
|
15-Jul-2015 |
Soby Mathew <soby.mathew@arm.com> |
PSCI: Validate non secure entrypoint on ARM platforms
This patch implements the platform power managment handler to verify
non secure entrypoint for ARM platforms. The handler ensures that the
entry point specified by the normal world during CPU_SUSPEND, CPU_ON
or SYSTEM_SUSPEND PSCI API is a valid address within the non secure
DRAM.
Change-Id: I4795452df99f67a24682b22f0e0967175c1de429
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 804040d106184a93a9fe188743d1d8a8571dea71 |
|
10-Jul-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
PSCI: Use a single mailbox for warm reset for FVP and Juno
Since there is a unique warm reset entry point, the FVP and Juno
port can use a single mailbox instead of maintaining one per core.
The mailbox gets programmed only once when plat_setup_psci_ops()
is invoked during PSCI initialization. This means mailbox is not
zeroed out during wakeup.
Change-Id: Ieba032a90b43650f970f197340ebb0ce5548d432
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 2204afded5cf9557ef1bb934fd15a74b9fb42244 |
|
16-Apr-2015 |
Soby Mathew <soby.mathew@arm.com> |
PSCI: Demonstrate support for composite power states
This patch adds support to the Juno and FVP ports for composite power states
with both the original and extended state-id power-state formats. Both the
platform ports use the recommended state-id encoding as specified in
Section 6.5 of the PSCI specification (ARM DEN 0022C). The platform build flag
ARM_RECOM_STATE_ID_ENC is used to include this support.
By default, to maintain backwards compatibility, the original power state
parameter format is used and the state-id field is expected to be zero.
Change-Id: Ie721b961957eaecaca5bf417a30952fe0627ef10
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 38dce70f51fb83b27958ba3e2ad15f5635cb1061 |
|
01-Jul-2015 |
Soby Mathew <soby.mathew@arm.com> |
PSCI: Migrate ARM reference platforms to new platform API
This patch migrates ARM reference platforms, Juno and FVP, to the new platform
API mandated by the new PSCI power domain topology and composite power state
frameworks. The platform specific makefiles now exports the build flag
ENABLE_PLAT_COMPAT=0 to disable the platform compatibility layer.
Change-Id: I3040ed7cce446fc66facaee9c67cb54a8cd7ca29
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|
| 3fc4124c7513554dc14a83a0b94010ce771e7e1c |
|
27-Apr-2015 |
Dan Handley <dan.handley@arm.com> |
Move FVP port to plat/arm/board/fvp
Move the FVP port from plat/fvp to plat/arm/board/fvp. Also rename
some of the files so they are consistently prefixed with fvp_.
Update the platform makefiles accordingly.
Change-Id: I7569affc3127d66405f1548fc81b878a858e61b7
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
|