| 8c8874eafbe5f7cbb5d413ae1be660c9f001ced5 |
|
05-Sep-2016 |
Ilia Mirkin <imirkin@alum.mit.edu> |
nir: fix definition of pack_uvec2_to_uint
Found by inspection. Untested beyond compilation. This also matches the
logic used in nir_lower_alu_to_scalar.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| 38b719d6244e831effe93a5d10e932aad2100984 |
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20-May-2016 |
Iago Toral Quiroga <itoral@igalia.com> |
nir: handle double-precision in fsign, fsat, fnot and frcp
I think these are not strictly necessary since the floats in them
should be automatically promoted to doubles when operated with
double sources, but it makes things more explicit at least.
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| 3f73039adec1fb0f35a98c05f5622e74baf93a12 |
|
20-May-2016 |
Iago Toral Quiroga <itoral@igalia.com> |
nir: handle double-precision in fabs, frsq and fsqrt
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| 8b24f7b440f80cc2cba272b3b479ddd14a07602b |
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13-May-2016 |
Rob Clark <robclark@freedesktop.org> |
nir: fix comment typo about f2d/d2f
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| f0af5b87ec140875dbc99d579b9b17ab935e27be |
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27-Apr-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
nir/opcodes: Make ldexp take an explicitly 32-bit int
There is no sense in having the double version of ldexp take a 64-bit
integer. Instead, let's just take a 32-bit int all the time. This also
matches what GLSL does where both variants of ldexp take a regular integer
for the exponent argument.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| bee40dd7309a1ed3acaa7c92fde199548047318d |
|
27-Apr-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
nir/opcodes: Simplify the expressions for [un]pack_double
The new expressions are more explicit in terms of where the bits go so it's
a little easier to tell what's going on. This is the way GLSL specifies
things so it's a bit easier to verify too. It also has the benifit that
the new expressions easily vectorize so we can constant-fold vector forms
of the _split versions correctly.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 745b3d295e0c432b95d43f979c74f9e91baaf6de |
|
25-Mar-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
nir: Add more modulus opcodes
These are all needed for SPIR-V
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 663e6421df9bb94cf9b46bb0b41f0d5331aa02fe |
|
07-Aug-2015 |
Connor Abbott <connor.w.abbott@intel.com> |
nir: add split versions of (un)pack_double_2x32
v2 (Sam):
- Use uint64 instead of float64 for sources and destinations. (Connor)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 9e31e0a21bd462b5a06e187bbaf95d3752052ef0 |
|
14-Aug-2015 |
Connor Abbott <connor.w.abbott@intel.com> |
nir: add support for (un)pack_double_2x32
v2 (Sam):
- Use uint64 instead of float64 for sources and destinations. (Connor)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| d5d6260329ed2df4aaffffac18d8998d4ad3676b |
|
12-Jan-2016 |
Iago Toral Quiroga <itoral@igalia.com> |
nir: add i2d and u2d opcodes
v2:
- Assert supports_int and don't fallback to nir_fmov (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
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| b16d06252e9179f5c279da69ee194cc0400ae403 |
|
12-Jan-2016 |
Iago Toral Quiroga <itoral@igalia.com> |
nir: add d2i, d2u, d2b opcodes
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| a4bce07dc6ebbd74dfb47394962d573ed01ee482 |
|
30-Jul-2015 |
Connor Abbott <connor.w.abbott@intel.com> |
nir: add support for d2f and f2d
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| de60e250f5095a9237727a3188eb0c092a4e6a05 |
|
25-Mar-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
nir: Add an opcode for stomping a 32-bit value to 16-bit precision
This correlates directly to the SPIR-V opcode OpQuantizeToF16
Reviewed-by: Rob Clark <robdclark@gmail.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 9076c4e289de0debf1fb2a7237bdeb9c11002347 |
|
14-Aug-2015 |
Connor Abbott <connor.w.abbott@intel.com> |
nir: update opcode definitions for different bit sizes
Some opcodes need explicit bitsizes, and sometimes we need to use the
double version when constant folding.
v2: fix output type for u2f (Iago)
v3: do not change vecN opcodes to be float. The next commit will add
infrastructure to enable 64-bit integer constant folding so this is isn't
really necessary. Also, that created problems with source modifiers in
some cases (Iago)
v4 (Jason):
- do not change bcsel to work in terms of floats
- leave ldexp generic
Squashed changes to handle different bit sizes when constant
folding since otherwise we would break the build.
v2:
- Use the bit-size information from the opcode information if defined (Iago)
- Use helpers to get type size and base type of nir_alu_type enum (Sam)
- Do not fallback to sized types to guess bit-size information. (Jason)
Squashed changes in i965 and gallium/nir drivers to support sized types.
These functions should only see sized types, but we can't make that change
until we make sure that nir uses the sized versions in all the relevant places.
A later commit will address this.
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 9b8786eba95532d53c45d52059a44abd7ee93530 |
|
25-Jan-2016 |
Matt Turner <mattst88@gmail.com> |
nir: Add lowering support for packing opcodes.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 68f8c5730bef7b93fd235ae2f3c87cc9403b5b4c |
|
21-Jan-2016 |
Matt Turner <mattst88@gmail.com> |
nir: Add opcodes to extract bytes or words.
The uint versions zero extend while the int versions sign extend.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| 140a886c41be764677114e631b6912e016ab7695 |
|
21-Jan-2016 |
Matt Turner <mattst88@gmail.com> |
nir: Make argument order of unop_convert match binop_convert.
Strangely the return and parameter types were reversed.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|
| a39a8fbbaa129f4e52f2a3ad2747182e9a74d910 |
|
17-Jan-2016 |
Emil Velikov <emil.velikov@collabora.com> |
nir: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
/external/mesa3d/src/compiler/nir/nir_opcodes.py
|