Cross Reference: /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit

History log of /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
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84e946380b2d5ddc62a107b667be39abf1932704	26-Oct-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nvc0/ir: fix emission of IMAD with NEG modifiers The emitter tried to emit sub instead of subr when src0 has actually a NEG modifier. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0 12.0 13.0" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
1ec7227d44dceae8de7b93f846bbd33d66007909	21-Oct-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nvc0/ir: fix emission of SHLADD with NEG modifiers This affects GF100:GK110 chipsets, but not GM107+ where the logic is a bit different. The emitters tried to emit sub instead of subr when src0 has a NEG modifier. This fixes the following piglit tests glsl-fs-loop-nested and glsl-vs-loop-nested. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "13.0" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
6e08f3e96c6c3f269ea3ee79bb7e10940e6a13be	21-Oct-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nvc0/ir: remove outdated comment about SHLADD Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
31545b64b80aa939a693723e07f06fe45160ae62	15-Sep-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nvc0/ir: add emission for SHLADD Unfortunately, we can't use the emit helpers for GF100/GK110 because src1 and src2 are swapped. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
d8b4f5fcca2ce299b8ef248b6f57896c7b85d18c	18-Sep-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: fix wrong emission of OP_NOT This should emit src0 instead of src1. Found by inspection. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
61e978524a0e5de4f8570b44bcb9b907a9187684	05-Sep-2016	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix quadop dall emission We recently starting to always emit the NDV (== dall) bit for quadops. However it was folded into the wrong code word. Fixes: e0a067ed48 (nv50/ir: always emit the NDV bit for OP_QUADOP) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
e0a067ed484698ff62dd8c8750aeb46f18988b17	25-Aug-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nv50/ir: always emit the NDV bit for OP_QUADOP This silences a divergent error found with F1 2015. Basically, the NDV bit has to be set when a FSWZ instruction is inside divergent code, but it's not needed otherwise. The correct fix should be to set it only in divergent code situations. GM107 emitter already sets that bit. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
704bc0f0e98f3bbdef33cad12646d4e1bf01e8aa	29-May-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nvc0: add support for VOTE tgsi opcodes Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
c7731a07408c5d4169625d4a78962d2887419080	28-May-2016	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix unspilling of predicates from registers Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96258 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.2 11.1" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
df2881381ac67c42aa8ec9e0ed28f21a1d253785	26-May-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nvc0/ir: handle a load's reg result not being used for locked variants For a load locked, we might not use the first result but the second result is the predicate result of the locking. In that case the load splitting logic doesn't apply (which is designed for splitting 128-bit loads). Instead we take the predicate and move it into the first position (as having a dead result in first def's position upsets all sorts of things including RA). Update the emitters to deal with this as well. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Tested-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
ba3f0b6d5920165c735d51500544da8c29b09060	09-Apr-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nvc0: fix gl_SampleMaskIn computation The SAMPLEMASK semantic should only return the bits set covered by the current invocation. However we were always retrieving the covmask, which returns the covered samples of the whole pixel. When not doing per-sample invocation, this is precisely what we want. However when doing per-sample invocation, we have to select the sampleid'th bit and only return that. Furthermore, this means that we have to have a 1:1 correlation for invocations and samples. This fixes most dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.* tests. A few failures remain due to disagreements about nr_samples==1 logic as well as what happens with MSAA x2 RTs when the shading fraction is 0.5. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
f5fe9030021af830e6c4453f4ad1521cbb697c81	07-May-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nv50/ir: generalize interp fixups to be able to fixup anything Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
2daaa5d657910239833dc796dc1ac6f4b168e3df	20-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for VSHL Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
af5925209d730f917431b603b031085c7c96c773	19-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for OP_SUEAU, OP_SUBFM and OP_SUCLAMP Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
1f8900a8e0c344c17dafd9ab57c7fb24c0eec588	18-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for OP_SULDB and OP_SUSTx Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
fddd8523d48f456d3fd614179ecd66e46625c774	18-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for OP_MADSP Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
c2ce22ca4641343e9bad446811a882c5c3930419	18-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for OP_PERMT Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
c62b1b92f7da2563511581a2a74048334585da27	26-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add emission for (a OP b) OP c This is pretty similar to NVC0 except that offsets have changed. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
d30768025a2283d4cc57930b784798bf278969da	20-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: make use of IMUL32I for all immediates Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
17a37c78fc16505f717a44aa22551285d1cd8c9e	20-Apr-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: do not overwrite def value with zero for EXCH ops This is only valid for other atomic operations (including CAS). This fixes an invalid opcode error from dmesg. While we are it, make sure to initialize global addr to 0 for other atomic operations. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
71e315475c780311fea205ab8c9a898a67da683b	15-Mar-2016	Hans de Goede <hdegoede@redhat.com>	nouveau: codegen: gk110: Make emitSTORE offset handling identical to emitLOAD Make the store offset handling in CodeEmitterGK110::emitSTORE identical to the one in CodeEmitterGK110::emitLOAD handling. This is just a cleanup, it does not cause any functional changes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
8a109c0375ba1faa987329ab6355f7bcb497bd78	28-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add missing src predicate emission for BAR.RED Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
f4d2d491522aea8c7de46311c3f5e9c588307dd2	28-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: allow to emit immediates for BAR Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
cba89fdaa1e7360808cef0f6871930c90ca3ef4d	28-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: fix wrong emission of BAR.SYNC Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
b94a46aa8e34de790724bbc0f823fd56555d0cdc	02-Mar-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: fix wrong emission of NOT modifier for VOTE Spotted by Coverity. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reported-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
07ed003faf3199a3e95852e7a34763aeaf76503d	28-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nv50/ir: emit VOTE instruction Changes from v2: - add missing NOT modifier for GK110/GM107 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
b3efa0a59e02e20ccd9ed51c6e503d020f619043	28-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	gk110/ir: add ld lock/st unlock emission Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
6526225f888a08b301e8c39ec70b4e739081e490	21-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nv50/ir: restore OP_SELP to be a regular instruction Actually OP_SELP doesn't need to be a compare instruction. Instead we just need to set the NOT modifier when building the instruction. While we are at it, fix the dst register type and use a GPR. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
e0371e63df173be38a086a5d816eeaf0e8cbe7eb	05-Feb-2016	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nv50/ir: make OP_SELP a compare instruction This OP_SELP insn will be used to handle compare and swap subops. Changes from v2: - fix logic for GK110+ Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
ca23c8081f1f9f709df7a63b9e6de379c0b8df44	16-Feb-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nv50/ir: fix quadop emission in the presence of predication When there's a predicate, it just goes onto the sources list. If the quadop only has a single regular source, we will end up thinking that the predicate is the second source. Check explicitly for the predSrc so that we don't accidentally emit the wrong thing. This fixes a bunch of dEQP-GLES3.functional.shaders.derivate.* tests. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
1a0fde1f52c59e0dbada03f387c8e25d9475ebbe	05-Feb-2016	Ilia Mirkin <imirkin@alum.mit.edu>	nvc0/ir: fix converting between predicate and gpr The spill logic will insert convert ops when moving between files. It seems like the emission logic wasn't quite ready for these converts. Tested on fermi, and visually looked at nvdisasm output for maxwell. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
c0b66d96d77b646282f7e732c4c25761431336c3	19-Jan-2016	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: allow carry to be set/read by imad Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
2e533ab74be1f997ddfaaf01798e7e3018138ac2	28-Dec-2015	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix double-wide vm address /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
8c2dfe05c5db9946d2d30546920e98bcfb8e3eb9	23-Sep-2015	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: add OP_CCTL handling /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
7d9a97d6beee8878ac57448af8c41b8af3f189b1	22-Sep-2015	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: add atomic op emission, fix gmem loads Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
3a635761685e839447fec2e5f84ce8bb8682dbc7	20-Jan-2016	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix load from shared memory It was accidentally using the store opcode. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
9f23007a7a56d576c8f20b76583ca2416e94a75d	20-Jan-2016	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: add partial BAR support This is enough for the plain TGSI BARRIER implementation. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
1d708aacb7631833b0f04e704481854428f60ba3	07-Dec-2015	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix imad sat/hi flag emission for immediate args According to nvdisasm both the immediate and non-imm cases use the same bits. Both of these flags are quite rarely set though. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
db072d20867426958153279575dfdc2049b5f595	07-Dec-2015	Ilia Mirkin <imirkin@alum.mit.edu>	gk110/ir: fix imul hi emission with limm arg The elemental demo hits this case. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
8482763d35d8bbf596a7cce84bb53f4b73d5fa6f	02-Dec-2015	Samuel Pitoiset <samuel.pitoiset@gmail.com>	nv50/ir/gk110: add memory barriers support for GK110 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> /external/mesa3d/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp