| 8e68f35d3208b313a106853a85994792446d0b72 |
|
28-Jul-2016 |
Matt Turner <mattst88@gmail.com> |
r600g: Avoid aliasing violations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8636a718b543939b02217b7b503bb73e72c16548 |
|
12-Jul-2016 |
Marek Olšák <marek.olsak@amd.com> |
r600g: add support for B5G6R5 PBO uploads via texture buffers (v2)
v2: set endian swap to 16
untested
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ada3d8f31ef3aeeb73d6d365738a2d1968ced596 |
|
31-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/u_suballoc: allow different alignment for each allocation
Just move the alignment parameter from u_suballocator_create
to u_suballocator_alloc.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| af249a7da9bf2621ab836d5074ef692677b11bbf |
|
16-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*
Acked-by: Jose Fonseca <jfonseca@vmware.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| cf811faeff1eaa1aef817ae45314cc3419c44222 |
|
07-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove radeon_winsys_cs_handle
"radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf".
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e7ce9e3bb8540433c511b481bae0faa5ef2c3249 |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600/asm: enable nstack check for tess ctrl/eval shaders.
This just makes sure they register at least one stack
usage frame like vertex shaders.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| bb44c1f036f053c2099df00184f27aee6dece444 |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600/asm: handle lds read operations.
Reads from the queue shouldn't be merged for now read operations.
Reads from the queue shouldn't be merged for now, or put in
T slots.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8ec2cb13e5a950b298935acabcac4346b3e63cd4 |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600/asm: add LDS ops and barrier to the once per group restriction.
LDS ops must be scheduled in X slot, and barrier should be on its
own in a group.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 816bb30245b9e4be78cc24228ada450a425b948d |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600: add support for LDS instruction encoding.
These are used in tessellation shaders to read/write values
between VS/TCS/TES.
This splits the eg alu assembler out to handle these
instructions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2b25d9ac7f364259058bf8098ebd40c7c484bcd7 |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600: add support for GDS clause to the assembler.
This just adds enough for the tessellation shaders,
which require TF_WRITE to work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 13eb5f596bc8ece3d1805b388aa53917e6158d7b |
|
04-Dec-2015 |
Edward O'Callaghan <eocallaghan@alterapraxis.com> |
gallium/drivers: Sanitize NULL checks into canonical form
Use NULL tests of the form `if (ptr)' or `if (!ptr)'.
They do not depend on the definition of the symbol NULL.
Further, they provide the opportunity for the accidental
assignment, are clear and succinct.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 25b3d554c4403b3b63f58cea6f0fc0cf3232a1c0 |
|
04-Dec-2015 |
Edward O'Callaghan <eocallaghan@alterapraxis.com> |
gallium/drivers: Trivial code-style cleanup
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 58e0122d86c824c67ac72c8ac4f1c1de4f53eb06 |
|
30-Nov-2015 |
Dave Airlie <airlied@redhat.com> |
r600: split out common alu_writes pattern.
This just splits out a common pattern into an inline function
to make things cleaner to read.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f75f21a24ae2dd83507f3d4d8007f0fcfe6db802 |
|
25-Oct-2015 |
Ivan Kalvachev <ikalvachev@gmail.com> |
r600g: Fix special negative immediate constants when using ABS modifier.
Some constants (like 1.0 and 0.5) could be inlined as immediate inputs
without using their literal value. The r600_bytecode_special_constants()
function emulates the negative of these constants by using NEG modifier.
However some shaders define -1.0 constant and want to use it as 1.0.
They do so by using ABS modifier. But r600_bytecode_special_constants()
set NEG in addition to ABS. Since NEG modifier have priority over ABS one,
we get -|1.0| as result, instead of |1.0|.
The patch simply prevents the additional switching of NEG when ABS is set.
[According to Ivan Kalvachev, this bug was fond via
https://github.com/iXit/Mesa-3D/issues/126 and
https://github.com/iXit/Mesa-3D/issues/127]
Signed-off-by: Ivan Kalvachev <ikalvachev@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 3be5ee1574e0a3494c0550f4b7ae09117855d749 |
|
20-Feb-2015 |
Dave Airlie <airlied@redhat.com> |
r600g: add doubles support for CAYMAN
Only a subset of AMD GPUs supported by r600g support doubles,
CAYMAN and CYPRESS are probably all we'll try and support, however
I don't have a CYPRESS so ignore that for now.
This disables SB support for doubles, as we think we need to
make the scheduler smarter to introduce delay slots.
[airlied: pushing this to avoid pain of rebasing, it mostly
works on cayman only so far, Glenn has some ideas about
delay slot issues we need to look into. turned off by
default for now]
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d503bbbf3082b5b301019721466d6fd2b41da03a |
|
09-Jul-2015 |
Dave Airlie <airlied@redhat.com> |
r600g: add support for streams to the assembler.
This just adds support to the assembler dumper and allows
stream instructions to be generated. Also fix up the stream
debugging to add stream info.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a830225adbb77073272961df409885cca6b861ee |
|
27-Aug-2015 |
Glenn Kennard <glenn.kennard@gmail.com> |
r600g/sb: Don't read junk after EOP
Shaders that contain instruction data after an instruction with EOP could end
up parsing that as an instruction, leading to various crashes and asserts in
SB as it gets very confused if it sees for instance a loop start instruction
jumping off to some random point.
Add a couple of asserts, and print EOP bit if set in old asm printer.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d80701df8af4a5d74c4f4eb09a4b3cef6970104b |
|
24-Feb-2015 |
Glenn Kennard <glenn.kennard@gmail.com> |
r600g: Implement GL_ARB_draw_indirect for EG/CM
Requires Evergreen/Cayman and radeon kernel module
2.41.0 or newer.
Expected piglit fails due to hardware limitations:
* arb_draw_indirect-draw-arrays-prim-restart
Restarts not applied for DrawArrays commands
* arb_draw_indirect-vertexid
Base vertex offset is not included in vertex id
Marek: bump vgt_state num_dw by 3 (= space needed for one register write)
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| acef65503e79ce61a16bdba92462f0ed8a7b52c2 |
|
28-Jan-2015 |
Xavier Bouchoux <xavierb@gmail.com> |
r600g: fix abs() support on ALU 3 source operands instructions
Since alu does not support abs() modifier on source operands, spill
and apply the modifiers to a temp register when needed.
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff |
|
15-Oct-2014 |
Glenn Kennard <glenn.kennard@gmail.com> |
r600g: Implement sm5 UBO/sampler indexing
Caveat: Shaders using UBO/sampler indexing will
not be optimized by SB, due to SB not currently
supporting the necessary CF_INDEX_[01] index
registers.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c35f14f36880eb20f5e54480444e343520e9bec5 |
|
03-Sep-2014 |
Carl Worth <cworth@cworth.org> |
Eliminate several cases of multiplication in arguments to calloc
In commit 32f2fd1c5d6088692551c80352b7d6fa35b0cd09, several calls to
_mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly
equivalent to what the code was doing previously.
But for cases where "x" involves multiplication, now that we are explicitly
using the two-argument calloc, we can do one step better and replace:
calloc(1, A * B);
with:
calloc(A, B);
The advantage of the latter is that calloc will detect any overflow that would
have resulted from the multiplication and will fail the allocation, (whereas
the former would return a small allocation). So this fix can change
potentially exploitable buffer overruns into segmentation faults.
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d5bcb5e8dea3dc949ff6b093af7f46585b94b63e |
|
23-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g: switch SNORM conversion to DX and GLES behavior
it also matches GL 4.2
further discussion:
http://lists.freedesktop.org/archives/mesa-dev/2013-August/042680.html
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 476aaf8b8ee77d84c295e1429035e92ecf3a7349 |
|
17-May-2014 |
Christoph Bumiller <christoph.bumiller@speed.at> |
r600g: HW bug workaround for TGSI_OPCODE_BREAKC
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8f3bcedde216e79be3f7bf9ac2e73dd5188240ee |
|
20-Feb-2014 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Use util_cpu_to_le32() instead of bswap32() on big-endian systems
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 79ea0f4506995c010320d56cd9dbfbefa34ab6f2 |
|
30-Jan-2014 |
Dave Airlie <airlied@redhat.com> |
r600g: add support for geom shaders to r600/r700 chipsets (v2)
This is my first attempt at enabling r600/r700 geometry shaders,
the basic tests pass on both my rv770 and my rv635,
It requires this kernel patch:
http://www.spinics.net/lists/dri-devel/msg52745.html
v2: address Alex comments.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 1371d65a7fbd695d3516861fe733685569d890d0 |
|
02-Aug-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: initial support for geometry shaders on evergreen (v2)
This is Vadim's initial work with a few regression fixes squashed in.
v2: (airlied)
fix regression in glsl-max-varyings - need to use vs and ps_dirty
fix regression in shader exports from rebasing.
whitespace fixing.
v2.1: squash fix assert
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ae29a098eaaa9f061cc82a28b8e258e44f03902b |
|
13-Jan-2014 |
Dave Airlie <airlied@redhat.com> |
r600g/bc: add support for indexed memory writes.
It looks like we need these for geom shaders in the future.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 552aae7e47e93ada58649a92ae9e7da37afb05c3 |
|
31-Jul-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: move barrier and end_of_program bits from output to cf struct (v2)
v2: fix regression on r600 NOP instructions.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 03065ea05cd601021dc20b9d809ec75e63621e31 |
|
12-Dec-2013 |
Siavash Eliasi <siavashserver@gmail.com> |
r600g: Removed unnecessary positivity check for unsigned int variable.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e420fb887f26cf275996f8c0f1a6659a4ed1238f |
|
07-Nov-2013 |
Fredrik Höglund <fredrik@kde.org> |
r600g: Add support for PIPE_FORMAT_R11G11B10_FLOAT vertex elements
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ef6680d3eee621bbb207ca0eda2e142bcc099ed3 |
|
23-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g: move the low-level buffer functions for multiple rings to drivers/radeon
Also slightly optimize r600_buffer_map_sync_with_rings.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ba650ccf91a103d90d45b5927a8a9220e222cfc5 |
|
22-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g: move some debug options to drivers/radeon
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d5b23dfc1c07f98afe749053b9cb4b69829fe3d4 |
|
13-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g: move streamout state to drivers/radeon
This streamout state code will be used by radeonsi.
There are new structures r600_common_context and r600_common_screen.
What is inherited by what is shown here:
pipe_context -> r600_common_context -> r600_context
pipe_screen -> r600_common_screen -> r600_screen
The common structures reside in drivers/radeon. Currently they only contain
enough functionality to be able to handle streamout. Eventually I'd like
the whole pipe_screen implementation to be shared and some of the context
stuff too.
This is quite big, but most changes are because of the new structures and
the fact r600_write_value is replaced by radeon_emit.
Thanks to Tom Stellard for fixing the build for r600g/compute.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f7217b99f243738f941a5d009c68387dfadcb50a |
|
23-Aug-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: enable SB backend by default
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ebd68dd02998a8595cb10844c37a6b02dc3078a8 |
|
16-Jun-2013 |
Jonathan Gray <jsg@jsg.id.au> |
gallium: replace bswap_32 calls with util_bswap32
byteswap.h and bswap_32 aren't portable, replace them with calls to
gallium's util_bswap32 as suggested by Mark Kettenis. Lets these files
build on OpenBSD.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5a3fac4d2667b5d46058564151142fec158f5f82 |
|
11-Apr-2013 |
Marek Olšák <maraeo@gmail.com> |
r600g: cleanup MSAA texture support checking
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4ca67dbf0cc4cd509c225c5feb5e45387739a48b |
|
02-May-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: use old shader disassembler by default
New disassembler is not completely isolated yet from further processing
in r600g/sb that is not required for printing the dump, so it has higher
probability to fail in case of any unexpected features in the bytecode.
This patch adds "sbdisasm" flag for R600_DEBUG that allows to use new
disassembler in r600g/sb for shader dumps when shader optimization
is not enabled.
If shader optimization is enabled, new disassembler is used by default.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ad1df471d083630106da8c39ec076f49e779e965 |
|
30-Apr-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: plug in optimizing backend
Optimization is enabled with "R600_DEBUG=sb".
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 34c3f986419340ae695d75103bcc7907a97d0f13 |
|
05-Apr-2013 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix valgrind warning on Cayman
Warning: "Conditional jump or move depends on uninitialised value(s)".
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5019af21453d0e9fc5b0f8c1c2bfeb29029882c1 |
|
06-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
r600g/llvm: Add support for native isa for pre EG
This fixes bug 62756 :
https://bugs.freedesktop.org/show_bug.cgi?id=62756#c12
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 159d9340662a70df3dcc9da1681f5b0a8e7650cf |
|
03-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
r600g/llvm: Do not override llvm provided stack_size
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9be624b3ef32ae6311010cf05531e12051b647dc |
|
02-Apr-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: don't reserve more stack space than required v5
Reduced stack size allows to run more threads in some cases,
improving performance for the shaders that use stack (that is, for the
shaders with control flow instructions). E.g. with unigine-based apps.
v4: implement exact computation taking into account wavefront size
v5: add cases for RV620, RS880
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| af38695f5105a2f766f3df393c3e42067c3706f2 |
|
26-Mar-2013 |
Vincent Lejeune <vljn@ovi.com> |
r600g/llvm: Add support for cf_alu native encode
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 65b2a449bc75937b94a05bebeea8c2d0f2fd247a |
|
01-Mar-2013 |
Marek Olšák <maraeo@gmail.com> |
r600g: dump vertex elements state along with the fetch shader
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 3832059b1078ef3aa6921066ad2521ca85881ef8 |
|
01-Mar-2013 |
Marek Olšák <maraeo@gmail.com> |
r600g: remove bytecode dumping
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4bf0ebdd4fc8dbcab9333ff8805af35a91e6848b |
|
01-Mar-2013 |
Marek Olšák <maraeo@gmail.com> |
r600g: use a single env var R600_DEBUG, disable bytecode dumping
Only the disassembler is used to dump shaders. Here's a few examples
how to use R600_DEBUG.
Log compute info:
R600_DEBUG=compute
Dump all shaders:
R600_DEBUG=fs,vs,gs,ps,cs
Dump pixel shaders only:
R600_DEBUG=ps
Disable Hyper-Z:
R600_DEBUG=nohyperz
Disable the LLVM backend:
R600_DEBUG=nollvm
Or use any combination of the above, or print all options:
R600_DEBUG=help
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 83e7d111afd8d340ce8fe13ea139271400eb362e |
|
03-Mar-2013 |
Vincent Lejeune <vljn@ovi.com> |
r600g: Check comp_mask before merging export instructions
Fixes a llvm uncovered (rare) bug where consecutive exports were
merged even if they have incompatible mask.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 138b5b9a12b7e1537494aac556589ac9981b557b |
|
26-Feb-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix check_and_set_bank_swizzle for cayman
Tested-by: Vincent Lejeune <vljn at ovi.com>
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e42111ecbaca8b6dab3c8a7a8cbc295bb6b404eb |
|
01-Feb-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: implement shader disassembler v3
R600_DUMP_SHADERS environment var now allows to choose dump method:
0 (default) - no dump
1 - full dump (old dump)
2 - disassemble
3 - both
v2: fix output for burst_count > 1
v3: use more human-readable output for kcache data in CF_ALU_xxx clauses,
improve output for ALU_EXTENDED, other minor fixes
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 022122ee63b8a00afc23eaa347df934a79fb1d4c |
|
01-Feb-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: use tables with ISA info v3
v3: added some flags including condition codes for ALU,
fixed issue with CF reverse lookup (overlapping ranges of CF_ALU_xxx
and other CF instructions)
rebased on current master
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 33dc412b8901ec6b693644a40b1cd62a2cde2e99 |
|
22-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Add ar_chan member to struct r600_bytecode
r600_bytecode::ar_chan stores the register channel for the value that
will be loaded into the AR register.
At the moment, this field is only used by the LLVM backend. The default
backend always sets ar_chan = 0.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0ba0926861f489261e45404cd57d8f92add9e1ee |
|
22-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: More robust checks for MOVA_INT instructions
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| bff07638a86d36ac826fb287214eda9ce31c02ad |
|
07-Jan-2013 |
Jerome Glisse <jglisse@redhat.com> |
r600g: add multi ring support with dma as first second ring v4
We keep track of ring emission order in a stack, whenever we need to
flush we empty the stack in a fifo order. There is few helpers function
for bo mapping and other ring activities that will make sure that
the ring stack is properly flush and submitted.
v2: fix st flush path, and other flush path to properly flush all
rings if necessary
v3: - improve name of ring helpers
- make sure that each time a cs is gona be written it endup at
top of the stack to avoid any issue such as :
STACK[0] = dma (withbo A,B)
STACK[1] = gfx (withbo C,D)
Now if code try to emit a dma command relative to bo C or D
it will start writting cmd stream into the cs and once it
reach the point where it adds relocation it will flush.
At that point the cs will have cmd that don't have proper
relocation into the relocation buffer and kernel will just
refuse to run.
v4: - Drop the stack idea as it turn out there is no way to use it
or benefit from it. Any time the driver start command on other
ring, it always need to flush the previous ring. So make code
simpler by not using a stack.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7b205264667f5b5b59dfb721cfc701d1f482de99 |
|
11-Jan-2013 |
Vincent Lejeune <vljn@ovi.com> |
r600g/llvm: tgsi to llvm emits stream output intrinsics.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d23aa650015ec017649f5a4ce8cb12d8c314bd3a |
|
16-Dec-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: texture buffer object + glsl 1.40 enable support (v2)
This adds TBO support to r600g, and with GLSL 1.40 enabled,
we now get 3.1 core profiles advertised for r600g.
The r600/700 implementation is a bit different from the evergreen one,
as r6/7 hw lacks vertex fetch swizzles. So we implement it by passing 5
constants per sampler to the shader, the shader uses the first 4 as masks
for each component and the 5th as the alpha value to OR in.
Now TXQ is also broken so we have to pass a constant for the buffer size,
on evergreen we just pass this, on r6/7 we pass it as the 6th element
in the const info buffer.
v1.1: drop return as DDX doesn't use a texture type
v2: add r600/700 support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| b37930f309a2e04f242a171152cb7c6c4300266a |
|
09-Jan-2013 |
Vinson Lee <vlee@freedesktop.org> |
r600g: Fix memory leak in r600_bytecode_add_vtx.
Fixes resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ca474f98f2cda5cb333e9f851c7e0e31c9a6f823 |
|
04-Jan-2013 |
Jerome Glisse <jglisse@redhat.com> |
radeon/winsys: move radeon family/class identification to winsys
Upcoming async dma support rely on winsys knowing about GPU families.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d225d076a9807083ea065462390981b9514b6cfc |
|
09-Dec-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: suballocate memory for fetch shaders from a large buffer
Fetch shaders are usually destroyed at the context destruction by the state
tracker, so we can put them all in a large buffer without wasting memory.
This reduces the number of relocations sent to the kernel a little bit.
Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e6b3858c89e5a8ba27bfdad18cd883f43489b924 |
|
07-Nov-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: fix pre eg export with llvm
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 84b437213294ff4e1a3bcae2f9cbb36a9b4955c4 |
|
29-Sep-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: make tgsi-to-llvm generates store.pixel* intrinsic for fs
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 96ed6c90eff58ce030c39c2b4db6daf512586b34 |
|
12-Oct-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: implement texturing with 8x MSAA compressed surfaces for Evergreen
The 2x and 4x MSAA cases are completely broken. The lfdptr instruction returns
garbage there.
The 8x MSAA case is broken on Cayman, though at least the result looks somewhat
correct.
Only the 8x MSAA case works on Evergreen and is enabled.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0f35702d798ead24497928af36236aa4c7e4b87b |
|
19-Oct-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: force bank_swizzle if already set
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 555c8d500a4a09445a892316610a428d408318ed |
|
12-Oct-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: move shader structures into r600_shader.h
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a50edc8ed84c4c48c0dc8e1a079e8d5e8f1c3a0e |
|
05-Oct-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: atomize fetch shader
The state object is actually a buffer, it's literally a buffer containing
the shader code.
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 836325bf7edd797e02ab0717a05ca5c51aa1ac93 |
|
25-Sep-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix instance divisor on Cayman
Not sure if this is the best way to fix it.
NOTE: This is a candidate for the stable branches.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 810345492eca34c2ad12728b5491a4691cc62ec2 |
|
17-Sep-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Use LOOP_START_DX10 for loops
LOOP_START_DX10 ignores the LOOP_CONFIG* registers, so it is not limited
to 4096 iterations like the other LOOP_* instructions. Compute shaders
need to use this instruction, and since we aren't optimizing loops with
the LOOP_CONFIG* registers for pixel and vertex shaders, it seems like
we should just use it for everything.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0e0c21e00ee80bcff67e37ec86b97d6c25db066a |
|
12-Sep-2012 |
Michal Sciubidlo <michal.sciubidlo@gmail.com> |
radeon/llvm: Emit ISA for ALU instructions in the R600 code emitter
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 999b7f66655c86eb8e8e1686631511e27f50cc98 |
|
27-Aug-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix relative addressing on RS780 and RS880
They should be treated like RV670.
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 72f7632c6bbbfc062ac7d90290e99f71272f6059 |
|
01-Aug-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: Fix instruction group merge when there are predicated insts.
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 56227f875bdff6ef4fd53b09ba267c786ae9dac2 |
|
01-Aug-2012 |
Vincent Lejeune <vljn@ovi.com> |
radeon/llvm: Do not use PV/PS if PRED_SEL does not match
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| da676eab93e7dad30b574b4eb4cffd4df952e819 |
|
01-Aug-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: Add support for predicates
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 39323e8f792a33f4fe3028c286a1638dc16a38a4 |
|
28-Jun-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Update number of gprs when adding a vertex instruction
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 482041a53862f45afd88536b5a615501cbb6ce25 |
|
25-May-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: add RECIP_INT, PRED_SETE_INT to r600_bytecode_get_num_operands
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=50315
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5187948bc2b16df70ee6696a8702a898b38a2d63 |
|
17-May-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Handle MUL_IEEE in r600_bytecode_get_num_operands
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 6ae12bac596ce3a6aa8e09f638ad2cb4a7c18e5c |
|
05-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
gallium/drivers: handle TGSI_OPCODE_CEIL
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a2e08a40f5144a3533de9c3ede422a34b7a44255 |
|
27-Apr-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Print integer values of literal constants in shader dumps
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 18617d7423b2c12aac9adbb8354fbf5d0c8ddfea |
|
27-Apr-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Add support for reading BREAK_LOGICALZ_i32 from bytestream
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4731f1f52d4085f2ff35dcf58cb129f79d97a0b6 |
|
17-Apr-2012 |
Adam Rak <adam.rak@streamnovation.com> |
r600g: fixed the bug with VTX fetches in TEX clauses for evergreen
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 94a6a363792e8cb57a9f15778a3f3440d5b754ab |
|
27-Feb-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Add FC_NATIVE instruction
This is a pseudo instruction that enables the LLVM backend to encode
instructions and pass it through r600_bytecode_build()
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0a6120244e66494db070ce875c0a464fbc5b15a1 |
|
26-Apr-2012 |
Marek Olšák <maraeo@gmail.com> |
winsys/radeon: simplify buffer map/unmap functions
The idea is not to use pb_map and pb_unmap wrappers, calling straight
into the winsys.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 65b35b63d377a1a74627d60ea6f8f1caae6a01a9 |
|
16-Dec-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix gpr number calculation
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5c03d1fa0fbe130153a2e4c937f684c680ca20b2 |
|
30-Mar-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: kill off the fallback for crazy src_offset values
st/mesa doesn't allow src_offset to be greater than stride and the maximum
stride r600 supports is 2047.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 330b6c85c961b32f704ce8ec7dbf8cb7fc0b80a8 |
|
05-Mar-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: cleanup includes
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 370c8b5ee7666f4f515d63603afe8282b1b3c682 |
|
24-Feb-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: remove obsolete todo comments
Also use XXX in the other ones, because it's the most used word for that
purpose in Mesa.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e4340c1908a6a3b09e1a15d5195f6da7d00494d0 |
|
29-Jan-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: merge r600_context with r600_pipe_context
The split made no sense.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 78293b99b23268e6698f1267aaf40647c17d95a5 |
|
29-Jan-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: remove u8,u16,u32,u64 types
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 738334e80cf8a7b9fbf573f3a77cbf767ce81095 |
|
24-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix inconsistency with INTERP* opcode definitions
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 65c0f77bcc418494ca339996652a8e74198bb82f |
|
24-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: replace raw opcodes with names in the is_alu_trans/vector
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| b9c706c8c51c15af31814904d5fa1afe96b0496a |
|
22-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: shift integer ops are trans unit only on r600.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9733a89f6dc8ea3a7a3b9152351203b0e5939d1a |
|
21-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: replace trans/vector-only instruction lists with ranges (v2)
airlied : assert on cayman cases to keep compiler happy
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 38ffc23e7b68f26672ead6c3d00aa882121fcc4e |
|
22-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
Revert "r600g: replace trans/vector-only instruction lists with ranges"
This reverts commit 946309067c835d35a85ab2ad774df6698e6669ab.
Until we check the cayman bits out properly
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 840a342cd0ac4a9937798a2137122387c0d3d7f6 |
|
21-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: take into account kcache banks for bank swizzle check
Due to the changes for multiple kcache banks support, now we are assigning
final SRCx_SEL values for kcache access at the later stage, when building the
bytecode. So we need to take into account kcache banks to distinguish
the constants with the same address but different bank index.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 946309067c835d35a85ab2ad774df6698e6669ab |
|
21-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: replace trans/vector-only instruction lists with ranges
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d649bf51ec787021f7872e2a4c09fb2188c0891b |
|
20-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: improve kcache line sets handling v2
Add support for multiple kcache banks (constant buffers).
Lock the required lines only.
Allow up to 4 kcache line sets in the alu clause by using ALU_EXTENDED on eg+.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8b1471f8ca2933a5a4f55be9d0a4db83bdee0435 |
|
21-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: make INTERP_LOAD_P0 vector-only
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c96b9834032952492efbd2d1f5511fe225704918 |
|
18-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: fixup AR handling (v5)
So it appears R600s (except rv670) do AR handling different using a different
opcode. This patch fixes up r600g to work properly on r600.
This fixes ~100 piglit tests here (in GLSL1.30 mode) on rv610.
v3: add index_mode as per the docs.
This still fails any dst relative tests for some reason I can't quite see yet,
but it passes a lot more tests than without.
v4: add a nop after dst.rel this could be improved using a second pass,
where we only insert nops if two instructions are sure to collide.
The docs say r600, rv610, rv630 needs this, and not rv670, rs780, rs880,
need AMD to confirm rv620, rv635.
v5: add is_nop_inst.
NOTE: This is a candidate for stable branches.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ba59a1a0d817566576e20e66d74f1917d958119e |
|
17-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: fix recip_uint on r600.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4ba4853c0a613f771b44806cd5ce376838479802 |
|
17-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: rework IDIV/UDIV and implement MOD/UMOD (v2)
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d84ab821c5f5bfe9f6a57e434af9ca06d54f45b3 |
|
15-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: add support for ISHR/USHR/SHL on r600-evergreen
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5d97c5033bcf3696fb1608f6b75e5125aeab10bb |
|
15-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: add FLT_TO_UINT opcode for evergreen
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| faa90abfe0b6f55ab69768eb930b4ab5ef21cb06 |
|
14-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: add r600 version of UINT_TO_FLT conversion.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 55bd1c8365baa5f21e79eace2bbce1413e38bfb8 |
|
14-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: add missing case for uint->flt conversion.
fixes some piglits like vs-decrement-uint.shader_test
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 543b2331d7b45a29ccd3530daa2389e87e65d89b |
|
08-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: implement transform feedback
r600: DONE.
r700: MOSTLY (done but locks up).
Evergreen: MOSTLY (done but doesn't work for an unknown reason).
The kernel support will come soon.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0cddea37b2d79e4353347621cd2849cde682084a |
|
17-Nov-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: don't change the order of writes in merge_inst_group
Merge may produce incorrect order of operations for r600-eg:
x: inst1 R0.x, ... ; //from current group
...
t: inst0 R0.x, ... ; //from previous group, same destination
Result of inst1 will be lost.
So compare destinations and don't allow this.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4f7c21899ad449be2bc1157ce1d2d99296a34499 |
|
14-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix the representation of control-flow instructions
We need something that looks like a compiler and not like some hacker
put some functions together. /rant
This is a band-aid for these two problems:
- The R600 and EG control-flow instructions appear in switch statements
next to each other, causing conflicts when adding new instructions.
- The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29
to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST
is 22:29.
To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23,
or 26 (directly in the definitions), such that it can be just or'd when making
bytecode without any shifting. All switch statements have been divided into
two, one for R600 and the other for EG.
Of course, there is a better way to do this, but that is left for future
work.
Tested on RV730 and REDWOOD with no regressions.
v2: minor cleanup as per Alex's comment.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| dcdc062dda62212d09f522e07530ed79871ba481 |
|
06-Oct-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix op3 & write in merge_inst_groups
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ebecbbc2e68673a49c3d0394c2f591f7a605110f |
|
14-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
r600g: set max max tex/vtx instructions count to 16 for cayman
Cayman is 16 as well.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c32ca6d9c1328339a9e6341d875142acd23bc9c1 |
|
15-Oct-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: set max tex/vtx instructions count to 16 for evergreen
According to evergreen-isa doc 16 is max value for evergreen.
More than 16 doesn't work for me.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 579c04e42ef1bb449fe86d7224ccfe0c2d569595 |
|
13-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
r600g: properly handle cayman in is_alu_vec_unit_inst()
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8e366dc365d01213b71b87ace47d30938db74845 |
|
13-Nov-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: lazy load for AR register
Emit MOVA* instruction only when AR is used.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 88a140cd199d585d15ce9b0b3ca27815bedf0d63 |
|
13-Nov-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: include INTERP_[XY|ZW] in is_alu_vec_unit_inst
This will disallow moving them to the trans slot in merge_inst_groups
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c6a302647200cb0bbc0d0d7680ad4e9fc5dd94bf |
|
12-Oct-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: more integer support
just some more trivial integer changes for r600/r700.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d5bfcf73fd2c86c3fdd959a212719f101ad76a76 |
|
23-Oct-2011 |
Mathias Fröhlich <Mathias.Froehlich@web.de> |
r600g: make r[67]00 not bail out on PRED_SETNE_INT.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8b36958ceb23b8a40a622f950ddf8fe94583c143 |
|
22-Oct-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: make if's use PRED_SETNE_INT no matter what.
This is more correct for TGSI if, and with native ints enabled
it fixes 25 piglit fails.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d54407040b7bfa345b76bfb578beab953c57592b |
|
22-Oct-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: print inst in hex in dumps
since we have them as hex in the headers.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9b34cea7e91f90023ca3490603155d758cbdee1c |
|
25-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: uarl fixes.
Not 100% sure these are correct yet
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0110aa09e5898987ee86586e438ac571075eba3a |
|
26-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
r600g/eg: add integer types support
adds handling for int texture/vertices to evergreen.
TODO r600/700 support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 6101b6d442b06a347c001fe85848d636ab7df260 |
|
11-Sep-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: merge r600_bo with r600_resource
I have moved 'last_flush' and 'binding' from r600_bo to winsys/radeon.
The other members are now part of r600_resource.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 21c5607e64ca4ef68730d8e846d8e7744ecdd024 |
|
15-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add flat non-interpolation support.
TGSI CONSTANT interpolation is just flat, and we just read the values
direct from the LDS into the GPR without doing any interpolation on them.
This is needed to pass integer types into the fragment shader.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| cdeffbfddceaccaad5d78f5c95426f41dec74fe5 |
|
05-Aug-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial evergreen integer opcode support
This just adds the opcodes for evergreen, need to work on r600 and cayman
implementations.
don't advertise nativeintegers yet until we work out all the regressions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f9b7d3bd4a744537db29f8688cf4c4109fb19ab1 |
|
05-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add 10/10/10/2 vertex format conversion.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| fdb62ef3f5b0fadd3cbac610f5b612bcfad5af1a |
|
24-Aug-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix replace_gpr_with_pv_ps
Instructions with 3 source operands have no write mask, so we may replace their
destinations with PV/PS in the next group even if their dst.write is 0.
Note: This is a candidate for the 7.11 branch.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 6ba68c7654ee9c2e90b99b4ba653287684904c74 |
|
24-Aug-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: fix check_and_set_bank_swizzle
Need to do full check when not all bank swizzles in the group are forced
(e.g. when trying to merge interp_* group with the next instruction)
Note: This is a candidate for the 7.11 branch.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4a47662beaa2092447939db7880531fb706afedd |
|
16-Aug-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: rename bc -> bytecode
It took me a while to figure out what it stands for.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 041ed559e11ee99d720c8132428c07d8fe57ec81 |
|
04-Aug-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: remove an unused parameter from r600_bo_destroy
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ab630b5768b0bfa4d7729d110ce4fb8f42e0cfb9 |
|
04-Aug-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: use buffer_map/unmap from radeon_winsys
This also drops the unneeded bo_busy/wait functions.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| df7859be6b6b6c227e7a4e0b7fbfafcd0800f4f8 |
|
07-Aug-2011 |
Lauri Kasanen <cand@gmx.com> |
r600g: Add support for ROUND, v2
This is a GLSL 1.3 feature, but also used by MLAA.
Signed-off-by: Lauri Kasanen <cand@gmx.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2b5b289a570c699403f115cf3ad094ce92eba2fb |
|
09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store the chip class directly in r600_bc.
Instead of deriving it from the family again.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 89dc31a28d8e5607989ec11cfd29310c1c97f6ac |
|
09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Replace the CHIPREV_* defines with the chip_class enum.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| b3b946b0ab88c1d7edeab183d8ad5125ba223392 |
|
09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store the chip class in r600_pipe_context.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| feec48114b261f43c8dc94c06cfccea3b6ef1689 |
|
25-Jun-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: eg+ support for FS_COLOR0_WRITES_ALL_CBUFS
Evergreen+ don't support multi-writes so we need to emulate
it in the shader. Fixes the following piglit tests:
fbo-drawbuffers-fragcolor
ati_draw_buffers-arbfp-no-option
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 13c9a8552bc83b1ad91442caacf847cb6cead2b5 |
|
15-Jun-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add TXD support.
This at least passes the piglit arb_shader_texture_lod-texgrad test,
the AMD shader analyzer seems to multiply the V component by an unspecified
constant value no idea why.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2f0b44f981d1715b62b189f465546d865b10d0f3 |
|
04-Jun-2011 |
Mathias Fröhlich <Mathias.Froehlich@web.de> |
r600g: Put shaders into immutable buffers.
Put the shader programs into an immutable buffer object.
Also make sure that those object can be taken from the user
space buffer object pool.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5f2deba9f3f3f9230a9fdd2848e20c1e23e98b8f |
|
08-Jun-2011 |
Brian Paul <brianp@vmware.com> |
gallium: s/bool/boolean/
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7f6672f6a737bc1c47e36c9567bd6d908855ce4d |
|
02-Jun-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: prepare for passing ctx into _r600_pipe_state_add_reg
This moves the functions down the file, and also adds a ctx parameter.
This is precursor patch just moving stuff around and getting it ready.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 414cd5df50435f475d92b02c229453d037369c0f |
|
04-Apr-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: add llano support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7779f6d1dffde2c0501e44adc342e52803de08d4 |
|
09-Mar-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial cayman acceleration support.
Cayman is the RadeonHD 69xx series of GPUs. This adds support for
3D acceleration to the r600g driver.
Major changes:
Some context registers moved around - mainly MSAA and clipping/guardband related.
GPR allocation is all dynamic
no vertex cache - all unified in texture cache.
5-wide to 4-wide shader engines (no scalar or trans slot)
- some changes to how instructions are placed into slots
- removal of END_OF_PROGRAM bit in favour of END flow control clause
- no vertex fetch clause - TC accepts vertex or texture
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| b2a98c3531c276b76024bb9b10fdd6c3360cb0c9 |
|
25-Apr-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Unify comment style somewhat.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d7577ae3a6d6e174ab36d244f6bd4dedd63c3d1d |
|
25-Apr-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Cleanup the big endian support a bit.
In particular, make sure the code is at least compiled on little endian
systems.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 77dc4c154cc6a8c3bc2369112c46f0be6ac444ae |
|
24-Apr-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: fix bank swizzle calcs for scalar only operations.
In the initial code if we had nothing in the vector slots r would
never get reset to 0, so we'd fail to compile shaders, after the previous
commit this would happen for the LIT tests. When I fixed that we did a lot
of unnecessary loops through all the vector states when we had no vector
slots filled. So this patch optimises thing for the scalar only state.
This fixes the 3 LIT piglit tests on r600g.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 22d5a71e4dedfc047e1a14082b7d0d287cfe910e |
|
24-Apr-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: PV/PS have cycle restrictions in scalar operations
In the R600 ISA document:
Section 4.7.5 Cycle restrictions for the ALU.trans states that
PV/PS have cycle restrictions wrt constants.
This is part of a fix for the LIT tests
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 843dfe3206c4f397c7911b748373dde5540392a4 |
|
19-Apr-2011 |
Cédric Cano <ccano@interfaceconcept.com> |
r600g: add big endian support for r6xx/r7xx
Signed-off-by: Cedric Cano <ccano@interfaceconcept.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8d7c12de1e3bce6c14ed6b79b64c2bce48e560a5 |
|
03-Mar-2011 |
Fabian Bieler <der.fabe@gmx.net> |
r600g: Check for relative addressing in destination register when trying to merge instruction groups
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| df3d11f6cab5dd5b4ff3cb0f10c8fe3e5954a16d |
|
15-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: FLT_TO_INT_FLOOR and FLT_TO_INT_RPI are vector-only instructions on Evergreen.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a2ef38368b638caba26418a68c157d52b6bcf797 |
|
14-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| bb4f2a0f3513a20fc3bd27ad4c278e370e5491a8 |
|
09-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: remove some now unneeded code from r600_bc_vtx_build
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2ed56d317046ed07f6a357905d89f0db54da80ad |
|
09-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: R700+ can do more than 8 tex and vtx clause in one CF inst
Reviewed-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8dc1dfc9f0b1c98d3bcad63c4a70a0952b865a9e |
|
09-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: split R600 and R700 CF generation for VTX and TEX
Reviewed-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e0cf8471a17ca47ed561b3a2ca8c604183213d6b |
|
06-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: use long long integers for instance addr calculation
Using a long for instance addr calculation isn't
big enough on 32bit systems, use a long long int instead.
Thanks to Rafael Monica for fixing this.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 17b9b757b704e0dcf370f7ae6e72c6e22601363d |
|
05-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: simplify instance addr calculation
Use MULHI_UINT instead of the more complex
INT_TO_FLT->MUL->TRUNC->FLT_TO_INT
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| fd2409ca2736dcc9339fd2ed7c021976a170d787 |
|
05-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: fix fragment shader size calculation
bc.ndw is altered in r600_bc_build, respect that
in fragment shader size calculation.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8d9ea4c4e7d0aa28ca86e0f620cde187b0c6c96b |
|
02-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: correct mega_fetch_count in fetch shader
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 5f44fab5a6ba99c287da8d01fa584763bff2565b |
|
28-Feb-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: add missing evergreen INT_TO_FLT to r600_bc_get_num_operands
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c33e091d17b90df61f7b3873a2f124c4f26adf06 |
|
28-Feb-2011 |
Jerome Glisse <jglisse@redhat.com> |
r600g: indentation fixes
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 96bbc627f369c0100b950f81531b1fe9ef586c34 |
|
28-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: implement instanced drawing support
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8b5119aab30828edbc4310694c09fe02fdbb0552 |
|
16-Feb-2011 |
Fabian Bieler <der.fabe@gmx.net> |
r600g: Start a new TEX clause if the texture lookup address was fetched in the current clause
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 51cc14471cffcec9c44eeee947be7533352ac62a |
|
15-Feb-2011 |
Fabian Bieler <der.fabe@gmx.net> |
r600g: Add support to dump vertex- and texture-fetch clauses
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 871460eb149b9868e5750f13b8206e271743c4a2 |
|
07-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Set the fetch type in r600_bc_vtx_build().
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4c30a80e384d523803d70ead3403cf3ca30b8868 |
|
07-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Handle the ADD_INT instruction in r600_bc_get_num_operands().
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a77e813de32643ae2dfffd7ad12abed596172cab |
|
07-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Split r600_bc_alu_src.
The r600_bc_alu_src structure is used in two different ways, as a vector and
for the individual channels of that same vector. This is somewhat fragile,
and probably confusing.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| aa8a2224a3df111a1613f0baefebc00883e1b70b |
|
07-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: use the new vertex buffer manager
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a6a710cbe7425819e1cd5ad5f2085311c092f2e7 |
|
03-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Make some more things static.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d06b99009699f8bc1d7a1d711bee8edc92dfb1a9 |
|
03-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Get rid of the unused r600_cf_vtx_tc() function.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8ca3b140eb53fd8063337a5a2a54a35987d597bc |
|
02-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: use burst exports in shaders
Join multiple exports into just one instruction
instead of exporting each register separately.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 065c8696e7b8290f9361ae88b8a7d99be9e2d0ef |
|
31-Jan-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: fix regression in cubemap tests since eea1d8199b376f37027c14669e0bdf991a22872d
Although CUBE is a reduction inst, it writes to more than just PV.X
so we need to keep the dst channel.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 70e656b4ebdd3cd2962ce66544ae9af349ecd59a |
|
29-Jan-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix vertex format fallback
This fixes:
- piglit/draw-vertices
- piglit/draw-vertices-half-float
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 1af59b28b57f460b2944f803251a297fd4f7a769 |
|
25-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: FLT_TO_INT* are vector instructions on Evergreen.
FLT_TO_INT is a vector instruction, despite what the (current) documentation
says. FLT_TO_INT_FLOOR and FLT_TO_INT_RPI aren't explicitly mentioned in the
documentation, but those are vector instructions too.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4b3789427f5eaef8560b9cb4845a6b1c92228f02 |
|
21-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: FLT_TO_INT_FLOOR is trans instruction
Add missing evergreen FLT_TO_INT_FLOOR instruction.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ba700d2ead3ae629ff29599455176fee72706698 |
|
18-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: fix reserve_cfile for R700+
According to R700 ISA we have only two channels for cfile constants.
This patch makes piglit tests "glsl1-constant array with constant
indexing" happy on RV710.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9e964baaf34fedec385a750b97fd6684fc52584a |
|
18-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Kill trailing whitespace.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| b61afe13f1a272bfe8230ed5d8658f4b4f58ed71 |
|
16-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: fix alu inst group merging for relative adressing
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ac6334145ec8eef42505cdd727aed7fae0831e12 |
|
16-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600d: fix some bugs added reworking literal handling
If a literal slot isn't used it should be set
to 0 instead of an uninitialized value. Also the
channels for pre R700 trig functions were incorrect.
And most important literals were not counted against ndw,
resulting in an invalid force_add_cf detection.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 634dece281c6f7eb3bb210fdd386c2afe8f7e895 |
|
14-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: compiler helper opcode fixes for evergreen
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9dfc68314de575ba7f0f936d5d0c9efe117fd535 |
|
14-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: pass r600_bc to some addition compiler helper functions
needed for asic specific opcodes
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4c6d6dd8fc61239ac2008267f3c5cf76f4124d11 |
|
14-Jan-2011 |
Vinson Lee <vlee@vmware.com> |
r600g: Disable V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR case.
The usage of macro V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR was
introduced by commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c but the
macro is undefined. Disable this case to fix the build for now.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 323ef3a1f07ba4333dadebab571ddcd49d95f45c |
|
14-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: add more missing instructions to r600_bc_get_num_operands
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a2ab929ab2d7dd4fcbbc5f32c8feabf42cad4d34 |
|
13-Jan-2011 |
Vinson Lee <vlee@vmware.com> |
r600g: Move declaration before code in r600_asm.c.
Fixes SCons build.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 96f8f8db7bcddec7ef0fce62cf0e23f1c2fb8c8d |
|
22-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: rework literal handling
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d7342f6a81a0d13acb6486a24bffa8e5987d5410 |
|
20-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: merge alu groups
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| eea1d8199b376f37027c14669e0bdf991a22872d |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: implement replacing gpr with pv and ps
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0448f73f06b92dfd04e553147cac0e240dbabbdd |
|
13-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: add missing RECIPSQRT_CLAMPED to r600_bc_get_num_operands
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a25b91c2c2118741389f418a66de7ca145b8600b |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: rework bank swizzle code
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 89275c0b36f1104ac05f13e930f7fb99595607a1 |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: fix alu slot assignment
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 236e99fe05a8d301f81ca4330bf4ded80cf501a2 |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: optimize away CF ALU instructions even if type doesn't match
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| eb70e58caf773f9a89aa16109705b84f0aa2a6f7 |
|
13-Jan-2011 |
Vinson Lee <vlee@vmware.com> |
r600g: Silence uninitialized variable warnings.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 6881262eff2154e4252359c104e8c90052537eb5 |
|
12-Jan-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: also look at tex inst when for maximum gpu count
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c60cb25bfb15fc83e78d9f2c74646dcc5ad07792 |
|
16-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: implement output modifiers and use them to further optimize LRP
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8813842121d46d1be476807c98b0ba0b771f0c91 |
|
14-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: optimize away CF_INST_POP
If last instruction is an CF_INST_ALU we don't need to emit an
additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 95a2b265facfb8c6e50895326c90f7fd75d5c1d6 |
|
17-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: fix alu dumping
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 47e7c6f57149975939b8519c45b793a30364dd79 |
|
16-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: improve r600_bc_dump
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| cc0f604241ee7b536f4c9867573024b8673b0998 |
|
16-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: fix tex and vtx joining
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 97e2aa31c6e735d5f6bd1d67a4dd8da2605aedc8 |
|
07-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Split ALU clauses based on used constant cache lines.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2a134534a60f1aff463918c6b27dea5741cf247f |
|
07-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Consistently use the copy of the alu instruction in r600_bc_add_alu_type().
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8273921b7a41251f3f5a87df995913cb291902ca |
|
07-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store kcache settings as an array.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f54366bcf61a414885abb9f7f47e897598a80859 |
|
07-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: add support for NI (Northern Islands) GPUs
This adds support for Barts, Turks, and Caicos asics.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f28bb6bdd1e98be11bbcaef545575a22db638d5a |
|
04-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: support up to 64 shader constants
From the r600 ISA:
Each ALU clause can lock up to four sets of constants
into the constant cache. Each set (one cache line) is
16 128-bit constants. These are split into two groups.
Each group can be from a different constant buffer
(out of 16 buffers). Each group of two constants consists
of either [Line] and [Line+1] or [line + loop_ctr]
and [line + loop_ctr +1].
For supporting more than 64 constants, we need to
break the code into multiple ALU clauses based
on what sets of constants are needed in that clause.
Note: This is a candidate for the 7.10 branch.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 69251fc4cd5f71be403e08398bc43d19052a640d |
|
07-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: remove dead code
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| fa86fc564aea4e40c89f6fc889e6a5bf817634b3 |
|
04-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: build fetch shader from vertex elements
Vertex elements change are less frequent than draw call, those to
avoid rebuilding fetch shader to often build the fetch shader along
vertex elements. This also allow to move vertex buffer setup out
of draw path and make update to it less frequent.
Shader update can still be improved to only update SPI regs (based
on some rasterizer state like flat shading or point sprite ...).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 833f3a488a7ba0fa59e25f1e518f6b4616270143 |
|
03-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: dump raw shader output for debugging
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 0e4c5f63b9023b292b88b2f0d5d0f6154e8ad263 |
|
22-Nov-2010 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: add support for ontario APUs
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 4afd0683854ac1cfbe7118232b5e344c83d4b0c2 |
|
19-Nov-2010 |
Alex Deucher <alexdeucher@gmail.com> |
r600g: use meaningful defines for chiprev
Makes the code much clearer.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f609b2ab0342d77a8beca9efb5fbc5b66ff98295 |
|
18-Nov-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: add fetch shader capabilities
Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7ffd4e976fd11b8c083c2927effd25a2f79ac841 |
|
17-Nov-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: code cleanup (indent, trailing space, empty line ...)
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d674ee2a4dfeda55d3f4780e97a26f73d855c448 |
|
27-Oct-2010 |
Vinson Lee <vlee@vmware.com> |
r600g: Silence uninitialized variable warnings.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d1acb920163ab0f39ff2fc72b85fc7bf16c37262 |
|
25-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add assembler support for all the kcache fields.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f4a2c62af56ce10e43688e8283f8defeb05cef1a |
|
23-Oct-2010 |
Tilman Sauerbeck <tilman@code-monkey.de> |
r600g: Also clear bc data when we're destroying a shader.
[airlied: remove unused vars]
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| d2c06b5037fe9282cbbc0c7acd84a1b286716507 |
|
05-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: drop use_mem_constant.
since we plan on using dx10 constant buffers everywhere.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e973221538d5edfad62abedf5b37a4fb774d71fc |
|
01-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add assembler support for other vtx fetch fields.
this shouldn't change behaviour, just push the choice of what
to do out to the shader.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 9c284b5cae916a083d17d1039d2f2da128b47882 |
|
29-Sep-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: delete old path
Lot of clean can now happen.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8b63ed4e6cb4ecea57e2bc622124056341844c56 |
|
24-Sep-2010 |
Andre Maasikas <amaasikas@gmail.com> |
r600g: break alu clause earlier
we still have constants to add and next int may need also 6 slots
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 8e8b60588b37e2d9cce7c0c04cdae73ce8206d09 |
|
21-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: deal with overflow of VTX/TEX CF clauses.
running piglit's texrect-many caused the vtx to overflow.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| ed4f740127d6896506a91c8c5b9c527a971e982b |
|
19-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: only emit uses waterfall on r6xx hw.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| c5edfcc410bdf3dbe4f37418de8f0009746c9578 |
|
19-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g; add uses waterfall to asm cf for r6xx.
On r6xx if an MOVA instruction is emitted we should set this bit.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| e0b6df4fcce0964ea7930efeb40cb487b4c53337 |
|
15-Sep-2010 |
John Doe <glisse@localhost.localdomain> |
r600g: misc cleanup
Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7290c5982cc60f3a9658512a99db6cc08a29e77f |
|
15-Sep-2010 |
Vinson Lee <vlee@vmware.com> |
r600g: Silence uninitialized variable warning.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| cc1b3b1013d1fb1f1f25ade20a68d8bdfe14f5f7 |
|
10-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: fix warning in r600 pipe driver
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 50526e094f4c66957c7f74c190c35903bc82fb62 |
|
03-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial evergreen support
adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| bf346f065c65e15e5757d5b1a14dbc6638051860 |
|
08-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial bank swizzle support.
this is ported from r600c mostly, bank swizzling is real messy and I don't think
I got enough sleep last night to fully understand it.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| a3a94554f5a12f0626d9712ddcdc81b1e21d36c2 |
|
08-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: split opcodes out and add wrapper around usage.
This splits the r600 opcodes out of the sq file and adds a wrapper
so we can convert to evergreen opcodes later without touching these functions
too much.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| d42efb9e8df6ef872ab4f142e3daf1b6cb9eff11 |
|
08-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add support for constants in memory buffers.
DX9 constants were in the constant file, and evergreen no longer support
cfile. r600/700 can also use constants in memory buffers, so add the code
(disabled for now) to enable that as precursor for evergreen.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| 6ec0fff822f66170f190515fc5e718142f6a5e28 |
|
06-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add missing printf operand
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| 5ea238b7991331c854e66a16911d616d36965dc9 |
|
31-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add missing literals
Also add an error if we hit this problem again, we need to do this better
possibly tying the literal addition to the last flag.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| 47d5a19df1e7760c4f5f0e340bfc56355c2e428b |
|
30-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial relative support to assembler
passes another ~20 piglits.
/me starts to run out low hanging fruit around now.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
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| cb08b9fa84bf432dcca2e685daadd2df651b3025 |
|
30-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: fix SSG and op3 neg writing
8 more piglits, mainly the two SSG tests.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 09547e1bcee7df3444dd8682770d1b31da1a5822 |
|
27-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g : add basic loop support.
Adds BGNLOOP, BRK, CONT, ENDLOOP support, ported from r600c.
17 piglits more on r300g.tests.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| a03d456f5a41926e39194de70b2d50776e64b8a2 |
|
25-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial if/else/endif support
this adds handling for some more CF instructions and conditions
also adds parameter for stack size emission
These seem to pass on VS with the stack size hack but not on FS,
TODO: fix FS + stack size calcs
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 098064e8cb6950f60c51a44e280cb335f07920b1 |
|
19-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add a chiprev type for r600/r700/evergreen instead of using family
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 481b65abaedb271d0da24c75b8c60f7bcf6d8ce9 |
|
11-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: accept empty frag prog shader
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 72f8edfc0bb8613ac7c0decfd4199e83c8d8a737 |
|
10-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: avoid reemiting literal, avoid scheduling empty cs
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 2cad5350f9691d4d2c18a637548735925fa0ee97 |
|
09-Aug-2010 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix some warnings
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7e42b7e5d2aebcda0e6bf081b6661411731e6df2 |
|
03-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: fix LIT + fix multiple constant one ALU + fix ALU block splitting
Make sure LIT fills all slot for instruction (can't do W instruction
without having the Z slot filled with at least a NOP).
ALU instruction can't access more than 4 constant, move constant to
temporary reg if we reach the limit.
Fix ALU block splitting, only split ALU after ALU with last instruction
bit sets.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| f031817450fe75d3224f767d79938813287ac445 |
|
02-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: split alu block to conform to limit + RCP opcode
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 7a73390f9126fd270d9891cd9d2bf38ef56d9b80 |
|
29-Jul-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: mipmap early support + EX2/ABS instruction + culling
Add mipmap support (demos/src/redbook/mipmap is working)
Add EX2/ABS shader instruction support.
Add face culling support.
Misc fixes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| 33241134e6e3d5bf19141eceff90fd854b23386a |
|
24-Jul-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: first pass at texture support
This add texture support to the assembler, generated code is
wrong (tested against working dump).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|
| de553d906b4a205d811a9e1651f14212ec284e29 |
|
23-Jul-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: drop compiler stuff and switch over dumb tgsi assembler
Writing a compiler is time consuming and error prone in
order to allow r600g to further progress in the meantime
i wrote a simple tgsi assembler, it does stupid thing but
i would rather keep the code simple than having people
trying to optimize code it does.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.c
|