| e16245b3393911d703b688adb3ebf161e0b9ba8a |
|
27-Dec-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: turn SDMA IBs into de-facto preambles of GFX IBs
Draw calls no longer flush SDMA IBs. r600_need_dma_space is
responsible for synchronizing execution between both IBs.
Initial buffer clears and fast clears will stay unflushed in the SDMA IB
(up to 64 MB) as long as the GFX IB isn't flushed either.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 29144d0f34d9325a3549e4ed0feecc0577c70358 |
|
24-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: stop using PIPE_BIND_CUSTOM
it has no effect whatsoever
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| b5cd7dfe3e9a04bf6edd5d100f7c74b8fcb5c277 |
|
30-Sep-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
gallium/radeon: implement set_device_reset_callback
Check for device reset on flush. It would be nicer if the kernel just
reported this as an error on the submit ioctl (and similarly for fences),
but this will do for now.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3ee9be42ac6f0c3d841c4136419a759c014d43eb |
|
30-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move VGT_LS_HS_CONFIG to derived tess_state
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| a67d81580b520aa6adf6c06ef29f27692b1aebe5 |
|
08-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove the cache_flush atom
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| fe40a65fb6210206720776662f202879777057cd |
|
06-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: skip redundant INDEX_TYPE writes
Ported from Vulkan.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 687c4be9cf61df18e5318f918a32e24d0a2aca0e |
|
26-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: set VPORT_ZMIN/MAX registers correctly
Calculate depth ranges from viewport states and
pipe_rasterizer_state::clip_halfz.
The evergreend.h change is required to silence a warning.
This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| fe91ae06d3ecc2080b61a6bc35867653de0da418 |
|
25-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: unify and simplify checking for an empty gfx IB
We can take advantage of the fact that multi_fence does the obvious thing
with NULL fences.
This fixes unflushed fences that can get stuck due to empty IBs.
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 16d568d91166f800dc694510b7c455798bb3b1c0 |
|
15-Jul-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: count gfx IB flushes
This will be used as a counter for whether fence_finish needs to flush
the IB.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| c5ff0d3e65d499dcb466c151ed48cdf67e43cdbb |
|
29-Jul-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: move radeon_winsys::cs_memory_below_limit to drivers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| a6bfafa083ef4f3320ca45bfc3e5697674e4b12c |
|
15-Jul-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: move last_gfx_fence from radeonsi to common code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 1a1cc67edd4c1ae08b739adaf78e014b828908de |
|
15-Jul-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flag
always set
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| d938b8c0bf32ab5f0103ac68071c4cc467846108 |
|
06-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: explicitly choose center locations for 1xAA on Polaris
Unlike SC, the small primitive filter does not automatically use center
locations in 1xAA mode, so this is needed to avoid artifacts caused by
the small primitive filter discarding triangles that it shouldn't.
As a side effect of how the effective number of samples is now calculated,
this patch also avoids submitting the sample locations for line/poly smoothing
when they're not really needed.
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 28d0d0c5b4ba9e636b540fafa3b9b2157e848757 |
|
24-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix fractional odd tessellation spacing for Polaris
ported from Vulkan (and no source explains why this is needed)
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| d46a9db840b8f82c079a6610723e8a6c519c46cd |
|
20-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeon: check VM faults from DMA flush
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 80dd7870fe87969e97045ea71b1f6e8180ac9606 |
|
20-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: move gfx fence wait out of si_check_vm_faults
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| ad8438403b32088260ec845fc2e7304586328913 |
|
20-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: extract IB and bo list saving into separate functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 54f755fa0fda14c578022767bcef2f27b2e89707 |
|
06-Jun-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Reinitialize all descriptors in CE preamble.
This fixes a problem with the CE preamble and restoring only stuff in the
preamble when needed.
To illustrate suppose we have two graphics IB's 1 and 2, which are submitted in
that order. Furthermore suppose IB 1 does not use CE ram, but IB 2 does, and we
have a context switch at the start of IB 1, but not between IB 1 and IB 2.
The old code put the CE RAM loads in the preamble of IB 2. As the preamble of
IB 1 does not have the loads and the preamble of IB 2 does not get executed, the
old values are not load into CE RAM.
Fix this by always restoring the entire CE RAM.
v2: - Just load all descriptor set buffers instead of load and store the entire
CE RAM.
- Leave the ce_ram_dirty tracking in place for the non-preamble case.
v3: - Fixed parameter alignment.
- Rebased to master (Nicolai's descriptor series).
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 89ba076de4c8cfa171365700e6a3b017d5e3eeff |
|
07-May-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeon/winsys: introduce radeon_winsys_cs_chunk
We will chain multiple chunks together and will keep pointers to the older
chunks to support IB dumping.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| d6211a61b0c8cd81509cbbf0e75766eb4be30bed |
|
06-May-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
gallium/radeon: use cs_check_space throughout
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| fc4896e686f79893d6496c7a792a6c72cb3759c1 |
|
26-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0
It's not needed since it was fixed in the kernel.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 0558564200466878f1a86e7a192d085b551079c4 |
|
07-May-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
gallium/radeon: add radeon_emitted to check for non-trivial IBs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 7d49b459b64e8cad2210c2ffc409b4efe6ea2214 |
|
22-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove flushes at the beginning and end of IBs done by the kernel
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 80e5fb60b40c491acd182dc451236b71e55c11ea |
|
22-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add RW_BUFFERS only once in si_ce_needed_cs_space
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 4d13c7c8794082400e383ac6d76eb6ba753dcb0f |
|
21-Apr-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Enable loading into CE RAM.
We need to enable a bit in the CONTEXT_CONTROL packet for the
loads to work.
v2: Style issues.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 7a92c0842892bf55a82b7d95ab5a3b7dfbb83407 |
|
27-Mar-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: do not do two full flushes on every compute dispatch
v2: Add more CS_PARTIAL_FLUSH events.
Essentially every place with waits on finishing for pixel shaders
also has a write after read hazard with compute shaders.
Invalidating L2 waits implicitly on pixel and compute shaders,
so, we don't need a CS_PARTIAL_FLUSH for switching FBO.
v3: Add CS_PARTIAL_FLUSH events even if we already have INV_GLOBAL_L2.
According to Marek the INV_GLOBAL_L2 events don't wait for compute
shaders to finish, so wait for them explicitly.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 107f4d3538e6eeab396bf41a4d4334950adf81ac |
|
02-Apr-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: do per cs setup for compute shaders once per cs
Also removes PKT3_CONTEXT_CONTROL as that is already being done
by si_begin_new_cs, when emitting init_config.
v2: - Use radeon_set_sh_reg_seq.
- Also set COMPUTE_STATIC_THREAD_MGMT_SE2 / SE3 for CIK+
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8fee75d606e83b1f0d665fef9ea59ba24fc6682d |
|
13-Apr-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Create CE IB.
Based on work by Marek Olšák.
v2: Add preamble IB.
Leaves the load packet in the space calculation as the
radeon winsys might not be able to support a premable.
The added space calculation may look expensive, but
is converted to a constant with (at least) -O2 and -O3.
v3: - Fix code style.
- Remove needed space for vertex buffer descriptors.
- Fail when the preamble cannot be created.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8e70a58af394a8699aecdaad6e406a9183ce2090 |
|
12-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added
For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 2ca5566ed7847f5a56d055fd6530382c55012663 |
|
10-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move scissor and viewport states into gallium/radeon
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8140154ae92c6bd022e409790bb069966a857aed |
|
11-Mar-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove old CS tracing
Cons:
- it was only integrated in r600g
- it doesn't work with GPUVM
- it records buffer contents at the end of IBs instead of at the beginning,
so the replay isn't exact
- it lacks an IB parser and user-friendliness
A better solution is apitrace in combination with gallium/ddebug, which
has a complete IB parser and can pinpoint hanging CP packets.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| b9126dcda834ba9cf58af32e97f4b5d93c9817a3 |
|
03-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement forcing per-sample_interpolation using the shader key only
It was partly a state and partly emulated by shader code, but since we want
to do this in a fragment shader prolog, we need to put it into the shader
key, which will be used to generate the prolog.
This also removes the spi_ps_input states and moves the registers
to the PS state.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 066d76c2f46ecf2e2c02705687738afe7fee8d13 |
|
23-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename cb_target_mask state to cb_render_state
and rename a variable in the function.
SX_PS_DOWNCONVERT will be emitted here.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| b1c5f3faa9d7a227150b677469df1a5832236541 |
|
08-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: calculate optimal GS ring sizes to fix GS hangs on Tonga
I discovered that increasing the ESGS ring size fixes GS hangs on Tonga,
so let's do it properly.
There is now a separate init_config_gs_rings state that is not immutable,
because GS rings are resized when needed.
This also saves some memory. Most apps won't need more than 1MB
per ring per shader engine.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 12596cfd4cea4cff2bc067876d5ff25c54cdc874 |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: atomize render condition (SET_PREDICATION)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 6cc8f6c6a72b1aab7bb506deb220e04ae50d8c2b |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: inline the r600_rings structure
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3d963abc81789870d86257956a8fc24f7c6b661b |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: prevent recursion in si_context_gfx_flush
The recursion can only occur if you modify need_cs_space to always flush.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8569f9a87ec8d1bea3946476d5cc0be2a58ea149 |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove the IB flushing flag
Not needed anymore. A similar flag will be introduced in the next commit,
which will be private in radeonsi.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 81d412e02ce7db644774202b175f1f24b1f262c7 |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: move GFX/DMA flushing from add_to_buffer_list to need_cs_space
need_cs_space isn't invoked so often and is called before all commands too.
This is a lot cleaner. The code in radeon_add_to_buffer_list always seemed
dodgy to me.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| c6012a6650c894e57dba51f8e336f134aad13d61 |
|
06-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename cache flushing flags once more
KCACHE, TC L1 and TC L2 are renamed to:
- SMEM L1
- VMEM L1
- GLOBAL L2
You can easily tell what they are used for now.
Shaders must deal with coherency issues between both L1s manually,
e.g. by setting GLC=1 or by using s_dcache_*.
BOTH_ICACHE_KCACHE was an unused definition.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 214de2d815360aa3986eb52a3b3060c33523f1b3 |
|
28-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move SPI_PS_INPUT_ENA/ADDR registers to a separate state
This will be a derived state used for changing center->sample and
centroid->sample at runtime.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| cc92b9037507ccfb498bdcec27b4d186e230004f |
|
27-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: dump buffer lists while debugging
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 93641f43416b8b8be8944e9d1473369bfda7f302 |
|
27-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: stop using "reloc" in a few places
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 9bd7928a35c27d3d0898db83bc8db823a6dbee5e |
|
26-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add an option for debugging VM faults
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 28b34b474e330be881d15a34859811e9f5e36eb5 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't send IB dword usage to si_need_cs_space
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| ec9d5e181e3ae30e00abed64762945beda6d3c0e |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't count IB space for states, just use an upper bound
Since we don't put any resource descriptors in IBs, the space used by draw
calls is quite small.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| fc95058add3d7a90220548e0bb5679d97264f3d2 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert SPI state to an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 45e549fcbc8c2454e242155f0cf4c21360f0b958 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert CB_TARGET_MASK setup to an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| e21418f221f645397847c867b5f368ad0753e6fe |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert stencil ref state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| c44de3097925e0d7b4f310432448a62a681189d5 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert blend color state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 74aa64876b54bc2d0088bc9ed2d390eaa2b73349 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert sample mask state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 12b205341acd2d95887099e14a217902fe21a476 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert clip state into an atom
Reducing calloc overhead.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 0c2eed0edec877584c9362bd9cb9004ff10a8b91 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: avoid redundant CB and DB register updates
The main idea is to avoid setting CB_COLORi_INFO = 0 for i>0 repeatedly
when those colorbuffers aren't used. This is mainly for glamor.
Same for DB. Z_INFO and STENCIL_INFO need to be cleared only once.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 87c1e9e19c6baa8c6fb03b0894c72744a07cde63 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use a bitmask for tracking dirty atoms
This mainly removes the cache misses when checking the dirty flags.
Not much else though.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 5bb0ad7ccc74e3aa69a1d55d2f7935587288312c |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: call si_init_atom for remaining radeonsi atoms
I need to initialize more atom IDs.
This adds 4 more si_init_atom calls, which simplifies the code.
(si_init_atom needs a different context type of the emit functions though)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| ba7a6cf6264dbb747f5b897d09bf1b98b232c1d0 |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: define the state atom array separately
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8a97528b3a97a430a887e9044b938b349585f4ab |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize viewport states
same as scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| f6a10f60b75821c20ce7cf338b519b92ed0330fc |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize scissor states
- convert 16 states to 1 atom
- only emit 1 scissor if VIEWPORT_INDEX isn't written
- use only one packet when emitting consecutive scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 05af645a951fd985d0dbe3c22614e1dee8dfb3f0 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix memory usage checking for big IBs
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 2c14a6d3b1c53d5814414ce9e91fd8d24c90b787 |
|
19-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add IB tracing support for debug contexts
This adds trace points to all IBs and the parser prints them and also
prints which trace points were reached (executed) by the CP.
This can help pinpoint a problematic packet, draw call, etc.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 189953ee13ad7d6b5d9d04ac21a230e8137a700d |
|
17-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove old CS tracing code
Some of it is left there and it will be re-used in the next commit.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| be6dc8777662645958d4be6639ee2bb47c5054d8 |
|
15-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: save the contents of indirect buffers for debug contexts
This will be used by the IB parser.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3206d4ed44e761186fee3c679801e57f8ce923cb |
|
09-Aug-2015 |
Grazvydas Ignotas <notasas@gmail.com> |
gallium/radeon: use helper functions to mark atoms dirty
This is analogous to r300_mark_atom_dirty() used by r300, and will
be used by later patches. For common radeon code, appropriate helper
is called through a function pointer.
No functional changes.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| a3e81f819c20dd50d551de9b7e1280b2bd9c18de |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: always flush framebuffer caches at the beginning of IBs
better safe than sorry
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 0615ad1c70777b515d00aa5b0c41b1073ad5a2d1 |
|
27-Jun-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't count the exact needed CS space if the CS is large enough
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| d587742650c262dea8007474b9956fd65472f8b2 |
|
27-Jun-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: allow the winsys to choose the IB size
Picked from the amdgpu branch.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 57245cce52d544c61f03fc966850f0f94e8118d5 |
|
31-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: suspend timer queries between IBs
When we are measuring the time spent in a draw call, an unexpected flush
can distort the result.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 08fd736a45c98bd0acd96dfc1a61e6a695d2703c |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: flush if the memory usage for an IB is too high
Picked from the amdgpu branch.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3344699243b856c3bc7b8ea08a949d2e3274e871 |
|
22-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set VGT_LS_HS_CONFIG for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 74c1001d13f07538e349c157598f9de83f252c49 |
|
22-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add derived tessellation state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 800efb0690e962750b9a072bcbab279fdaae24a1 |
|
22-Jul-2015 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Flush when we're asked to return a fence but don't have one yet
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| f1be3d8cdde17a9b9ae283e1bab2f46b992d3bf3 |
|
27-Jun-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't flush an empty IB if the only thing we need is a fence
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 1f4bb3826464e2ce1d3f47183c96e6e7fde9a1d7 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't emit PA_SC_LINE_STIPPLE after every rasterizer state change
Do it only when the line stipple state is changed.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 4f20a8f278aa92fb0dc6abc6998171b3ddea7dc1 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: split sample locations into its own state atom
Sample locations are not updated as often as framebuffers.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 2397a721291457c146c7f4bcd48adcb3b2d979bd |
|
10-Dec-2014 |
Tom Stellard <thomas.stellard@amd.com> |
radeonsi: Enable VGPR spilling for all shader types v5
v2:
- Only emit write SPI_TMPRING_SIZE once per packet.
- Use context global scratch buffer.
v3:
- Patch shaders using WRITE_DATA packet instead of map/unmap.
- Emit ICACHE_FLUSH, CS_PARTIAL_FLUSH, PS_PARTIAL_FLUSH, and
VS_PARTIAL_FLUSH when patching shaders.
v4:
- Code cleanups.
- Remove unnecessary multiplies.
v5:
- Patch shaders in system memory and re-upload to vram.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 0aecf9e2d18804d83473a5cc142297c1bbae04f8 |
|
30-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add a combined flag for flushing a framebuffer
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 2bfe9d4538693ebad3c0330a92e432c6c4c5afd3 |
|
29-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename flush flags, split the TC flag into L1 and L2
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 638fa8016a39db95361922ea63390f34654aef37 |
|
31-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove init config from states
It really doesn't do anything there.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3291eedfe601b9d09023fb24987ae7d2c7e977c3 |
|
08-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only emit line stippling and provoking vertex state when it changes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 834bee42ed45b1f993694c27aedd2f24d77d35f1 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit DRAW_PREAMBLE only if it changes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 6fde19491038074eb2d5ddb1bae48276530f9d74 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit GS_OUT_PRIM_TYPE only if it changes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 34350131ded27e7584cfde273675a9a99b1ba7db |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit primitive restart only if it changes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3382036946cf7c7859c9027c4ffe4881e30ead56 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit base vertex and start instance only if they change
v2: added a helper function for invalidation of the sh constants
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| b472709090c10d17686b0ae5a5112e43ba8ac0c6 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit clip registers only if VS, GS, or rasterizer is changed
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| c6546cfb03e4f8bf5bea8def990248fcd70597ba |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove useless variable si_context::pm4_dirty_cdwords
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 837907b8b3bd290e2fa8092579a4855097ecab9f |
|
05-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix CS tracing and remove excessive CS dumping
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 884f1654e22c2845b388560b297a7c440a68e594 |
|
16-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB registers from draw_vbo into new db_render_state
It's called db_misc_state in r600g.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 1c03a690bfc3265c7fefa7f87e69782a6672a9b2 |
|
06-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use gpu_address from r600_resource
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| be536efe20d7d0969e6d5286fc488fcc1c403b63 |
|
08-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: mark MSAA config state as dirty at the beginning of CS
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81020
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 86035cd88dc66db06f0a120654e4d8d7ad25c139 |
|
05-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only count CS space for state atoms if we're going to draw
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 74388dd24bc7fdb9e62ec18096163f5426e03fbf |
|
22-Apr-2014 |
Adam Jackson <ajax@redhat.com> |
radeonsi: Don't use anonymous struct trick in atom tracking
I'm somewhat impressed that current gccs will let you do this, but
sufficiently old ones (including 4.4.7 in RHEL6) won't.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 352e06ddea1108bad1d2c6742fe3a67b2b1da5d9 |
|
18-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: don't skip the context flush if a fence should be returned
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 11459436d9314681087463f2c006c58b6fcff396 |
|
12-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: share some of gfx flush code
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| d4edc607670e37138f7a804ba208cf91acd9d0f1 |
|
12-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: merge si_flush with si_context_flush
This also removes si_flush_gfx_ring.
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 70cf6639c331342619e65c46db925d115bf51920 |
|
12-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: create and return a fence in the flush function
All flush functions get a fence parameter. cs_create_fence is removed.
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| f549129564e018e21f58483f697cc7073854247b |
|
09-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g, radeonsi: fix primitives-generated query with disabled streamout
Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works
if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled.
This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1
if either streamout or the primitives-generated query is enabled.
However, the primitives-emitted query is also incremented, so it's disabled
by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound.
This fixes piglit:
ARB_transform_feedback2/counting with pause
EXT_transform_feedback/primgen-query transform-feedback-disabled
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 61a2fac1996c92c9bfa486723803f9f346c9c9f6 |
|
06-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert the framebuffer state to atom-based
This looks like r600g. The shared Cayman MSAA code is used here.
The real motivation for this is that I need the ability to change values
of color registers after the framebuffer state is set. The PM4 state cannot
be modified easily after it's generated. With this, I can just change
r600_surface::cb_color_xxx and set framebuffer.atom.dirty=true and it's done.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| cf0172d46ab940a691da6516057c81f28961482f |
|
13-Feb-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
r600g,radeonsi: Consolidate logic for short-circuiting flushes
Fixes radeonsi emitting command streams to the kernel even when there
have been no draw calls before a flush, potentially powering up the GPU
needlessly.
Incidentally, this also cuts the runtime of piglit gpu.py in about half
on my Kaveri system, probably because an X11 client going away no longer
always results in a command stream being submitted to the kernel via
glamor.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65761
Cc: "10.1" mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 7209703432ef88daf7ec67b7eeb80577fcb60ef7 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: cleanup includes, add missing license
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 2942124db89107a3b4bdb65da3aca153fee2e678 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove open-coded PS_PARTIAL_FLUSH event
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| a4c218f398a6176f2ecbe7e295020d348670a957 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: consolidate variables for CS tracing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 62d55c0a2d96cf482f955bc841006c2ac1e0d867 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use queries from r600g
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| aa7ae4fd6e24ba7f2b687e3f3c4301919830750b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename the commonly occurring rscreen variable.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 8662e66bf237a820a704df112718be599136098b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename the commonly occurring rctx/r600 variables.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 0b57fc15e13ee6b1f8271927b7334a7ea280624b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename R600->SI in some remaining defines.
I had previously considered that unsafe.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 238427625f42915c10538867a7797dc4d657a0ac |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si remaining identifier in si_hw_context.c.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 45578def716f17e4588c6567a5fb3b6dc9569aec |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 280c360c0287608227466c6f366606ef5bd62cfa |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| f2a21ed8b9aeb08d019a5aabaf6c581303254308 |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si_resource.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 3e81883a4267807d654db8f739a32604d519816c |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for structs in si.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 238aeabce0e5cfd850279a68fe0c816adc175294 |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for structs in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|
| 786af2f963925df2c2a6fb60b29a83e8340f03c7 |
|
04-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Apply si_* file naming scheme.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_hw_context.c
|