| 613e6e4d5df91ae498d6f64fe40e247e6bcc762d |
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23-Mar-2017 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Don't emit SEL instructions for type-converting MOVs.
SEL can only convert between a few integer types, which we basically
never do.
Fixes fs/vs-double-uniform-array-direct-indirect-non-uniform-control-flow
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 7dccd38b400d3a65da20ddefe282a7bb0b7ccb58)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| ece41df247af247fb573ae8ec208d50e895b7aef |
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21-May-2016 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Expose arbitrary channel execution groups to the IR.
This generalizes the current fs_inst::force_sechalf flag to allow
specifying channel enable groups other than 0 or 8. At some point it
will likely make sense to fix the vec4 generator to support arbitrary
execution groups and then move the definition of fs_inst::group into
backend_instruction (e.g. so we can do FP64 in the VEC4 back-end).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 596441992130460c7d9a792e50eea46d27297d44 |
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03-Oct-2015 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Remove SNB embedded-comparison support from optimizations.
We never emit IF instructions with an embedded comparison (lost in the
switch to NIR), so this code is not used. If we want to readd support,
we should have a pass that merges a CMP instruction with an IF or a
WHILE instruction after other optimizations have run.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| e1f4724097d1074ec9afdc9ce9ad024add125923 |
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27-Jul-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Set execution controls explicitly in opt_peephole_sel().
Emit the SELs and MOVs with the same execution controls as the
original MOVs, and the CMP with the same execution controls as the IF.
Also explicitly check that the execution controls of any pair of MOVs
being folded into a SEL are compatible (which is almost always going
to be the case), since otherwise it would seem wrong to initialize the
builder object below from the then_mov instruction only.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| a800ec04ad84abeb6243897a276facc4ef6cac82 |
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03-Jun-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Migrate opt_peephole_sel to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 78f7c9edeb21ec4e7a4f96aa12b51cecc40e9688 |
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03-Jun-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Create and emit instructions in one step in opt_peephole_sel.
This simplifies opt_peephole_sel() slightly by emitting the SEL
instructions immediately after they are created, what makes the
sel_inst and mov_imm_inst arrays unnecessary and will make it possible
to get rid of the explicit inserts when the pass is migrated to the IR
builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 28e9601d0e681411b60a7de8be9f401b0df77d29 |
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16-Apr-2015 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965: Add a devinfo field to backend_visitor and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| ccb9cbc849af50c435ec69498281cd3cef52d02e |
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20-Mar-2015 |
Connor Abbott <cwabbott0@gmail.com> |
i965/fs: bail on move-to-flag in sel peephole
Fixes a piglit regression
(shaders/glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined) with
my series for GVN.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| d1533d87cc7e2c39e7ce9dc838b45a2c39c96e33 |
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16-May-2014 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Replace fs_reg(fs_visitor, type) with fs_visitor::vgrf(type).
I dislike how fs_reg has a constructor that knows about fs_visitor.
Apart from that, it stands alone, with no need to interact with the
rest of the compiler. Which is sensible - a class that represents
a register should do just that. Allocating virtual register numbers
should be left up to the compiler (fs_visitor).
This patch replaces the constructor with a new fs_visitor::vgrf method,
eliminating fs_reg's dependency on fs_visitor. It ends up being no
more code.
v2: Rebase from May 2014 -> January 2015.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 4001181ba37f2a79129fe52c489e626724c390dd |
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11-Nov-2014 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Don't use if_block/else_block in SEL peephole.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| ef75f60822b71a5ac1715f0e3d9b04b9f7e9020f |
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03-Sep-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Add and use functions to get next/prev blocks.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 49374fab5d793ed426e01f7fef82c87442c14860 |
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02-Sep-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Make instruction lists local to the bblocks.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| f0598d413bc8eb7ab02318f1db2dbd446a3c736c |
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02-Sep-2014 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Don't iterate between blocks with inst->next/prev.
When instruction lists are per-basic block, this won't work.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| a4fb8897a2bd00eefa8a503ec17d45e791bced91 |
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01-Sep-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Remove now unneeded calls to calculate_cfg().
Now that nothing invalidates the CFG, we can calculate_cfg() immediately
after emit_fb_writes()/emit_thread_end() and never again.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 072ea414d04f1b9a7bf06a00b9011e8ad521c878 |
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01-Sep-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Remove cfg-invalidating parameter from invalidate_live_intervals.
Everything has been converted to preserve the CFG.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 1db74a423f7bada1e78a840eae6231ee01f909f2 |
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17-Jul-2014 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Preserve CFG in the SEL peephole.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 5e6ead5e8b0a79dce63f741dfca8328b7d4020f9 |
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17-Jul-2014 |
Matt Turner <mattst88@gmail.com> |
i965/cfg: Point to bblock_t containing associated control flow
... rather than pointing directly to the associated instruction. This
will let us set the block containing the IF statement's else-pointer to
NULL, when we delete a useless ELSE instruction, as in the case
(+f0) if(8)
...
else(8)
endif(8)
Also, remove the pointer to the ENDIF, since it's unused, and it was
also potentially wrong, in the case of a basic block containing both an
ENDIF and an IF instruction:
endif(8)
cmp.ne.f0(8) ...
(+f0) if(8)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 596990d91e2a4c4a3a303c6c2da623bf1840771b |
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12-Jul-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Add and use foreach_block macro.
Use this as an opportunity to rename 'block_num' to 'num'. block->num is
clear, and block->block_num has always been redundant.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 2a33510f1649f2ef5c5b2d693aa89ef0efc5dcfb |
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11-Feb-2014 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Decide predicate/predicate_inverse outside of the for loop.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 96128d134be82cd5a8cda2c473c1242c18409029 |
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11-Feb-2014 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Swap if/else conditions in SEL peephole.
Will clarify make the next commit easier to read.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 1761671b0627ce8e1c0eae721e1fca5c2d04690e |
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12-Jul-2014 |
Matt Turner <mattst88@gmail.com> |
i965: Replace cfg instances with calls to calculate_cfg().
Avoids regenerating it unnecessarily.
Every program in shader-db improved, none by an amount less than a 1/3
reduction. One Dota2 shader decreased from 62 -> 24.
cfg calculations: 429492 -> 193197 (-55.02%)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 0978a6966abb886539158934d11ae7f170786be2 |
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07-Jan-2014 |
Tapani Pälli <tapani.palli@intel.com> |
i965/fs: do SEL optimization only when src type for MOV matches
Fixes a bug where then branch operates with ivec4 while else uses vec4.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72379
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 9658b04fc473a9b16ede16b632e4f0b23ae90a70 |
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28-Oct-2013 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Emit a MOV instead of a SEL if the sources are the same.
One program affected.
instructions in affected programs: 436 -> 428 (-1.83%)
Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 4532cac06a9da527549efb685c6f37ffed24ddbf |
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30-Oct-2013 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Extend SEL peephole to handle only matching MOVs.
Before this patch, the following code would not be optimized even though
the first two instructions were common to the then and else blocks:
(+f0) IF
MOV dst0 ...
MOV dst1 ...
MOV dst2 ...
ELSE
MOV dst0 ...
MOV dst1 ...
MOV dst3 ...
ENDIF
This commit extends the peephole to handle this case.
No shader-db changes.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
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| 13de9f03f177d3ae0921fded1a102b66130f8b40 |
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23-Oct-2013 |
Matt Turner <mattst88@gmail.com> |
i965/fs: New peephole optimization to generate SEL.
fs_visitor::try_replace_with_sel optimizes only if statements whose
"then" and "else" bodies contain a single MOV instruction. It also
could not handle constant arguments, since they cause an extra MOV
immediate to be generated (since we haven't run constant propagation,
there are more than the single MOV).
This peephole fixes both of these and operates as a normal optimization
pass.
fs_visitor::try_replace_with_sel is still arguably necessary, since it
runs before pull constant loads are lowered.
total instructions in shared programs: 1559129 -> 1545833 (-0.85%)
instructions in affected programs: 167120 -> 153824 (-7.96%)
GAINED: 13
LOST: 6
Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
|