| 2d7d4a791083ff63f37ac1e40bfe8b448e7f8045 |
|
02-Sep-2016 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Simplify a bunch of fs_inst::size_written calculations by using component_size().
Using component_size() is easier and generally more correct because it
takes into account the register type and stride for you.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 69570bbad876bb9da609c3b651aacda28cecc542 |
|
07-Sep-2016 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.
The previous regs_written field can be recovered by rewriting each
rvalue reference of regs_written like 'x = i.regs_written' to 'x =
DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference
like 'i.regs_written = x' to 'i.size_written = x * reg_unit'.
For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible. I'll come
back later to clean up any ugliness introduced here.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 527f37199929932300acc1688d8160e1f3b1d753 |
|
23-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
intel: s/brw_device_info/gen_device_info/
Generated by:
sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c
sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 01855d7331cd34633b8accc343ddf0a86a860c94 |
|
09-Jul-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
isl: Use bpb in a few places where it's more natural than bs
Reviewed-by: Chad Versace <chad.versace@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| e53cabe730ca5d4491a34fd1d385face3100f5bb |
|
16-Apr-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Use isl instead of mesa for format info
Reviewed-by: Chad Versace <chad.versace@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 1831fa104c706658741dabeac03ed7e3bf48ed5f |
|
16-Apr-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Add a helper for converting GL to ISL formats
Reviewed-by: Chad Versace <chad.versace@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 24bb75049ba0f5cdda5808fcdbb659f2dd3ce45b |
|
05-Nov-2015 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Explicitly handle FORMAT_NONE in num_image_coordinates
Previously, we were relying on has_matching_typed_format returning true for
MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning
1 for MESA_FORMAT_NONE. When we switch to ISL, this behaviour will no
longer be something we can rely on.
Reviewed-by: Chad Versace <chad.versace@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| f310c02b94fba0a0a5ea7f5573f906de823cc5fe |
|
16-Apr-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Take a GL format enum instead of mesa_format
Reviewed-by: Chad Versace <chad.versace@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| a241ab43b5599f29c43e143bbcaaffef2af3e982 |
|
19-Jan-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Mask signed integers after conversion
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 058ed980c6564428c257b4e0c09a41cff9cfe8c3 |
|
17-Aug-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Return result of image atomic in a register of the expected type.
So the result is of float type if we're implementing the float
overload of imageAtomicExchange. This is the only back-end change
required to support OES_shader_image_atomic AFAICT.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 1817e3c07a63c6404d6df323fbd443ccd9304b02 |
|
07-Feb-2016 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Don't emit unnecessary SEL instruction from emit_image_atomic().
The SEL instruction with predication mode NONE emitted when the atomic
operation doesn't need to be predicated is a no-op and might rely on
undocumented hardware behaviour. Noticed by chance while looking at
the assembly output.
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 3ccc41ecfc5e9345a1c291748d8840984f7413ae |
|
02-Nov-2015 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Replace fs_reg(imm) constructors with brw_imm_*().
Cuts 10k of .text, of which only 776 bytes are the fs_reg constructor
implementations themselves.
text data bss dec hex filename
5204535 214112 27784 5446431 531b1f i965_dri.so before
5193977 214112 27784 5435873 52f1e1 i965_dri.so after
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| b61292296bd7e1876fdb64725a783a7e96f6c4c1 |
|
26-Aug-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Fix hang on IVB and VLV with image format mismatch.
IVB and VLV hang sporadically when an untyped surface read or write
message is used to access a surface of format other than RAW, as may
happen when there is a mismatch between the format qualifier of the
image uniform and the format of the actual image bound to the
pipeline. According to the spec this condition gives undefined
results but may not lead to program termination (which is one of the
possible outcomes of the hang). Fix it by checking at runtime whether
the surface is of the right type.
Fixes the "arb_shader_image_load_store.invalid/format mismatch" piglit
subtest.
Reported-by: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91718
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 0c6df7a1cb593666636aed660e90be0c6aca4591 |
|
15-Sep-2015 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/fs_surface_builder: Only apply predicate to components that exist
In certain conditions, we have to do bounds-checking in the shader for
image_load_store. The way this works for image loads is that we do a
predicated load and then emit a series of selects, one per component,
that gives us 0 or the loaded value depending on whether or not you're
in bounds. However, we were hard-coding 4 components which may not be
correct. Instead, we should be using size which is the number of
components read.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| a4ba41638d41865ef34bf36a525efcf8102c01ee |
|
29-Aug-2015 |
Matt Turner <mattst88@gmail.com> |
i965/fs: Use greater-equal cmod to implement maximum.
The docs specifically call out SEL with .l and .ge as the
implementations of MIN and MAX respectively. Among other things,
SEL with these conditional mods are commutative.
See commit 3b7f683f.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| caae52561dabb2d20f2369c547e660d078974285 |
|
30-Jul-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Implement image load, store and atomic.
v2: Drop VEC4 suport.
v3: Rebase.
v4: Move array coordinate workaround into the surface builder.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 7e8be000101cc6fe3846745b559f2d785430e253 |
|
30-Jul-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import image format conversion primitives.
Define bitfield packing, unpacking and type conversion operations in
terms of which the image format conversion code will be implemented.
These don't directly know about image formats: The packing and
unpacking functions take a 4-tuple of bit shifts and a 4-tuple of bit
widths as arguments, determining the bitfield position of each
component. Most of the remaining functions perform integer, fixed
point normalized, and floating point type conversions, mapping between
a target type with per-component bit widths given by a parameter and a
matching native representation of the same type.
v2: Drop VEC4 suport.
v3: Rebase.
v4: Fix clamping of negative floats in the unsigned case of
emit_convert_to_scaled().
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 26ca81ce3029cbd2531f52635258aecae19bf185 |
|
22-Apr-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import image format metadata queries.
Define some utility functions to query the bitfield layout of a given
image format and whether it satisfies a number of more or less
hardware-specific properties.
v2: Drop VEC4 suport.
v3: Add SKL support.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 86dbd8af40deaa99aedf011e863b908173e63012 |
|
23-Jul-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import code to transform image coordinates into surface coordinates.
Accounting for the padding required for 1D arrays in certain cases.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 1a37619763a99b78aa574aca0058eda86de7a0dc |
|
22-Apr-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import image memory offset calculation code.
Define a function to calculate the memory address of the image
location given by a vector of coordinates. This is required in cases
where we need to fall back to untyped surface access, which take a raw
memory offset and know nothing about surface coordinates, type
conversion or memory tiling and swizzling. They are still useful
because typed surface reads don't support any 64 or 128-bit formats on
IVB, and they don't support any 128-bit formats on HSW and BDW.
The tiling algorithm is implemented based on a number of parameters
which are passed in as uniforms and determine whether the surface
layout is X-tiled, Y-tiled or untiled. This allows binding surfaces
of different tiling layouts to the pipeline without recompiling the
program.
v2: Drop VEC4 suport.
v3: Rebase.
v4: Add plenty of comments (Jason).
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| fb19df7a626d02cb54614d4610af2d14720a2ef3 |
|
22-Apr-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import image access validity checks.
These utility functions check whether an image access is valid.
According to the spec an invalid image access should have no effect on
the image and yield well-defined results. Typically the hardware
implements correct bounds and surface checking by itself, but in some
cases (typed atomics on IVB and untyped messages elsewhere) we need to
implement it in software to work around lacking hardware support.
v2: Drop VEC4 suport.
v3: Rebase.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|
| 1aab58f39450213ea2ac43549eefb8acd1e6584a |
|
30-Apr-2015 |
Francisco Jerez <currojerez@riseup.net> |
i965/fs: Import surface message builder helper functions.
Implement helper functions that can be used to construct and send
untyped and typed surface read, write and atomic messages to the
shared dataport unit easily.
v2: Drop VEC4 suport.
v3: Reimplement in terms of logical send opcodes.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
|