e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b |
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13-Oct-2016 |
Timothy Arceri <timothy.arceri@collabora.com> |
nir/i965/anv/radv/gallium: make shader info a pointer When restoring something from shader cache we won't have and don't want to create a nir_shader this change detaches the two. There are other advantages such as being able to reuse the shader info populated by GLSL IR. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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64c3d735354932c3b14397e9c292f5989a9da710 |
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07-Jul-2016 |
Jordan Justen <jordan.l.justen@intel.com> |
i965/cs: Don't use a thread channel ID for small local sizes When the local group size is 8 or less, we will execute the program at most 1 time. Therefore, the local channel ID will always be 0. By using a constant 0 in this case we can prevent using push constant data. This is not expected to be common a occurance in real applications, but it has been seen in tests. We could extend this optimization to 16 and 32 for SIMD16 and SIMD32, but it gets a bit more complicated, because this optimization is currently being done early on, before we have decided the SIMD size. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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1fa000a33b010436ac3bf4b3c8da2974d3788382 |
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19-Oct-2016 |
Jordan Justen <jordan.l.justen@intel.com> |
i965/cs: Use udiv/umod for local IDs This allows for more optimizations relating to power-of-two divisions. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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c35f9792202c4450d19c5616e2a38b9e81e418fe |
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06-Aug-2016 |
Eric Anholt <eric@anholt.net> |
nir: Add nir_builder support for individual system value loads. The previous nir_load_system_value(b, nir_intrinsic_load_whatever), 0) was rather verbose, when system values should be easy to generate. The index is left out because only one system value had an index included in it. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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0a3acff5b53d409181dcd2f31a4a50af06f73a57 |
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23-May-2016 |
Jordan Justen <jordan.l.justen@intel.com> |
i965: Remove old CS local ID handling The old method pushed data for each channels uvec3 data of gl_LocalInvocationID. The new method pushes 1 dword of data that is a 'thread local ID' value. Based on that value, we can generate gl_LocalInvocationIndex and gl_LocalInvocationID with some calculations. Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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3ef0957dac11edee7babc9746ec766dcb055d909 |
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22-May-2016 |
Jordan Justen <jordan.l.justen@intel.com> |
i965: Add nir based intrinsic lowering and thread ID uniform We add a lowering pass for nir intrinsics. This pass can replace nir intrinsics with driver specific nir lower code. We lower the gl_LocalInvocationIndex intrinsic based on a uniform which is loaded with a thread specific ID. We also lower the gl_LocalInvocationID based on gl_LocalInvocationIndex. v2: * Create variable during lowering pass. (Ken) v3: * Don't create a variable, but instead just insert an intrisic call to load a uniform from the allocated location. (Jason) v4: * Don't run this pass if thread_local_id_index < 0 Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
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