History log of /external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
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9694b23f66f4c41407289fb7d3ff25321042ef49 01-Dec-2015 Kenneth Graunke <kenneth@whitecape.org> i965: Rename intelScreen to screen.

"intelScreen" is wordy and also doesn't fit our style guidelines.
"screen" is shorter, which is nice, because we use it fairly often.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
949a89202621eb73e9f9d4c7b452d9bf9afbfd40 09-Aug-2016 Jason Ekstrand <jason.ekstrand@intel.com> i965: Roll intel_reg.h into brw_defines.h

More than half of the stuff in intel_reg.h had nothing whatsoever to do
with registers and really belongs in brw_defines.h anyway.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
ddcfc35f62ed3ad83b100beacb5b30394dcd9960 26-May-2016 Ben Widawsky <ben@bwidawsk.net> i965/sklgt4: Implement depth/timestamp write w/a

The stated bug describes a scenario in which a post sync write operation for
depth or timestamp can be ignored. There are two workarounds suggested, the
first and easier is to simply do a cs stall when we do these type of writes.
The second option is to do a PIPE_CONTROL flush after the post sync but before
the data is required.

Generally, I believe the data written out is consumed by the application on the
CPU side and so doing the easier of the two is ideal. Furthermore, these queries
aren't tremendously common in the perf sensitive apps I have looked at. However,
there could be cases where a shader stage might directly consume the data, and
as a result option 2 may be desirable.

This patch goes with the easier solution for now.

gen9lp bug_de_id=2137196

By itself, this does *not* fix any of the GT4 hangs we're currently
experiencing.

Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
f00c399bae7376bad2257d085fe754adfaa11cc8 19-Apr-2016 Jordan Justen <jordan.l.justen@intel.com> i965: Implement ARB_query_buffer_object for HSW+

v2:
* Declare loop index variable at loop site (idr)
* Make arrays of MI_MATH instructions 'static const' (idr)
* Remove commented debug code (idr)
* Updated comment in set_query_availability (Ken)
* Replace switch with if/else in hsw_result_to_gpr0 (Ken)
* Only divide GL_FRAGMENT_SHADER_INVOCATIONS_ARB by 4 on
hsw and gen8 (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
6817e0f1ce71d2a6d347d4c182f2cf4742dd5deb 21-Aug-2015 Chris Wilson <chris@chris-wilson.co.uk> i965: Move control flush into pipelined conditional render

The nv_conditional_render piglits were sporadically failing. Moving
the control flush from the write and placing it just before the read
was sufficient to make the piglits pass a 1000/1000 times. The bspec
says that the flush enable bit "waits until all previous writes of
immediate data from post sync circles are complete before executing the
next command" - the operative word being previous!

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90691
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Neil Roberts <neil@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
013d731a67538a2eb8f508fa54bb86191f0e5491 21-Jul-2015 Chris Wilson <chris@chris-wilson.co.uk> i965: Use updated kernel interface for accurate TIMESTAMP reads

I was mistaken, I thought we already had fixed this in the kernel a
couple of years ago. We had not, and the broken read (the hardware
shifts the register output on 64bit kernels, but not on 32bit kernels) is
now enshrined into the ABI. I also had the buggy architecture reversed,
believing it to be 32bit that had the shifted results. On the basis of
those mistakes, I wrote

commit c8d3ebaffc0d7d915c1c19d54dba61fd1e57b338
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed Apr 29 13:32:38 2015 +0100

i965: Query whether we have kernel support for the TIMESTAMP register once

Now that we do have an extended register read interface for always
reporting the full 36bit TIMESTAMP (irrespective of whether the hardware
is buggy or not), make use of it and in the process fix my reversed
detection of the buggy reads for unpatched kernels.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Tested-and-acked-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
426023050d1d3cd1b5fc0b3508dd7e1ee3b061e7 04-Nov-2014 Neil Roberts <neil@linux.intel.com> i965: Use predicate enable bit for conditional rendering w/o stalling

Previously whenever a primitive is drawn the driver would call
_mesa_check_conditional_render which blocks waiting for the result of
the query to determine whether to render. On Gen7+ there is a bit in
the 3DPRIMITIVE command which can be used to disable the primitive
based on the value of a state bit. This state bit can be set based on
whether two registers have different values using the MI_PREDICATE
command. We can load these two registers with the pixel count values
stored in the query begin and end to implement conditional rendering
without stalling.

Unfortunately these two source registers were not in the whitelist of
available registers in the kernel driver until v3.19. This patch uses
the command parser version from intel_screen to detect whether to
attempt to set the predicate data registers.

The predicate enable bit is currently only used for drawing 3D
primitives. For blits, clears, bitmaps, copypixels and drawpixels it
still causes a stall. For most of these it would probably just work to
call the new brw_check_conditional_render function instead of
_mesa_check_conditional_render because they already work in terms of
rendering primitives. However it's a bit trickier for blits because it
can use the BLT ring or the blorp codepath. I think these operations
are less useful for conditional rendering than rendering primitives so
it might be best to leave it for a later patch.

v2: Use the command parser version to detect whether we can write to
the predicate data registers instead of trying to execute a
register load command.
v3: Simple rebase
v4: Changes suggested by Kenneth Graunke: Split the
load_64bit_register function out to a separate patch so it can be
a shared public function. Avoid calling
_mesa_check_conditional_render if we've already determined that
there's no query object. Some styling fixes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
1e1d5456ba3dff82301ad4bbdde2fb6e2f562fe3 12-Apr-2015 Mathias Froehlich <Mathias.Froehlich@gmx.net> i965: Flush batchbuffer containing the query on glQueryCounter.

This change fixes a regression with timer queries introduced with
commit 3eb6258. There the pending batchbuffer is flushed
only if glEndQuery is executed. This present change adds such
a flush to glQueryCounter which also schedules a value query
just like glEndQuery does. The patch fixes GPU timer queries
going mad from within osgviewer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
4e56a9ad46ff7fe85308ce12e21719ff2b476516 20-Mar-2015 Jordan Justen <jordan.l.justen@intel.com> i965/state: Don't use brw->state.dirty.brw

Now, we only use ctx->NewDriverState.

I used this bash & sed command in the i965 directory:
for file in *.[ch] *.[ch]pp; do
sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file
done

Followed by manual changes to brw_state_upload.c.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
0b499abb51c80867ad034f2a6d9fcb1e86d021cc 10-Jan-2015 Kenneth Graunke <kenneth@whitecape.org> i965: Do Sandybridge workaround flushes before each primitive.

Sandybridge requires the post-sync non-zero workaround in a ton of
places, and if you ever miss one, the GPU usually hangs.

Currently, we try to track exactly when a workaround flush is
necessary (via the brw->batch.need_workaround_flush flag). This is
tricky to get right, and we've botched it several times in the past.

This patch unconditionally performs the post-sync non-zero flush at the
start of each primitive's state upload (including BLORP). We drop the
needs_workaround_flush flag, and drop all the other callers, as the
flush has already been performed.

We have no data to indicate that simply flushing all the time will
hurt performance, and it has the potential to help stability.

v2: Add post-sync workaround to initial GPU state upload to be extra
cautious (suggested by Chad Versace).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
864c463485aafaa2802b18a7427f8b75dc96e3ef 03-Sep-2014 Jordan Justen <jordan.l.justen@intel.com> Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404

Reverts
* "i965: Modify state upload to allow 2 different sets of state atoms."
8e27a4d2b3e4e74e9a77446bce49607433d86be3
* "i965: Modify dirty bit handling to support 2 pipelines."
373143ed9187c4d4ce1e3c486b5dd0880d18ec8b
* "i965: Create a macro for checking a dirty bit."
c5bdf9be1eca190417998d548fd140c1eca37a54
Conflicts:
src/mesa/drivers/dri/i965/brw_context.h
* "i965: Create a macro for setting all dirty bits."
6f56e1424d923fd80c84090fbf4506c9eaaffea1
Conflicts:
src/mesa/drivers/dri/i965/brw_blorp.cpp
src/mesa/drivers/dri/i965/brw_state_cache.c
src/mesa/drivers/dri/i965/brw_state_upload.c
* "i965: Create a macro for setting a dirty bit."
88e3d404dad009d8cff5124cf8acee7daeaceb64

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
88e3d404dad009d8cff5124cf8acee7daeaceb64 10-Jan-2014 Paul Berry <stereotype441@gmail.com> i965: Create a macro for setting a dirty bit.

This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
3d826729dabab53896cdbb1f453c76fab1c7e696 29-Jun-2014 Matt Turner <mattst88@gmail.com> i965: Use unreachable() instead of unconditional assert().

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
f7e76e00b6d476ad045a70db34908cce31e767fa 12-Dec-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions.

Now that we have a helper function that handles the PIPE_CONTROL
variations between the various platforms, these are basically the same.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
f5dd608db2d6a67cfe27efed948408414a057fe3 14-Jan-2014 Kenneth Graunke <kenneth@whitecape.org> i965: Create a helper function for emitting PIPE_CONTROL writes.

There are a lot of places that use PIPE_CONTROL to write a value to a
buffer (either an immediate write, TIMESTAMP, or PS_DEPTH_COUNT).
Creating a single function to do this seems convenient.

As part of this refactor, we now set the PPGTT/GTT selection bit
correctly on Gen7+. Previously, we set bit 2 of DW2 on all platforms.
This is correct for Sandybridge, but actually part of the address on
Ivybridge and later!

Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to adjust that in substantially fewer
places, giving us confidence that we've hit them all.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
9420b577ddeefe04c9812e9b62628e2f01be06cf 11-Dec-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Create a helper function for emitting PIPE_CONTROL flushes.

These days, we need to emit PIPE_CONTROL flushes all over the place.
Being able to do that via a single function call seems convenient.

Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to do this in substantially fewer places.

v2: Add back forgotten intel_emit_post_sync_nonzero_flush (caught by
Eric Anholt). Drop unlikely() from BLT_RING check.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
db1dc21a75d110344c0a7eccbddcce9c3a1b99d9 11-Dec-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Delete duplicate write_timestamp function.

brw_queryobj.c needs a version of write_timestamp that works on all
generations for the QueryCounter() driver hook. So there's no point in
duplicating it in gen6_queryobj.c.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
8c9a54e7bcfc80295ad77097910d35958dfd3644 06-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Delete intel_context entirely.

This makes brw_context inherit directly from gl_context; that was the
only thing left in intel_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
53631be4ebaa4fb13a7f129727c1cdd32fcc6f3d 06-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::gen and gt fields to brw_context.

Most functions no longer use intel_context, so this patch additionally
removes the local "intel" variables to avoid compiler warnings.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
b15f1fc3c6b3b9dc4422940c412f80e581c9900d 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::perf_debug to brw_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
ec995de6fbafe8d6018b91ca130abac760112475 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::stats_wm to brw_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
329779a0b45b63be17627f026533c80b2c8f7991 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::batch to brw_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
5d8186ac1a22afbaa6ed68e0fb67d1f150f798cb 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::hw_ctx to brw_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
eeb75b41f1d7be609861d3e98b64b6fffd13bb4f 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Move intel_context::bufmgr to brw_context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
ca437579b3974b91a5298707c459908a628c1098 03-Jul-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Pass brw_context to functions rather than intel_context.

This makes brw_context available in every function that used
intel_context. This makes it possible to start migrating fields from
intel_context to brw_context.

Surprisingly, this actually removes some code, as functions that use
OUT_BATCH don't need to declare "intel"; they just use "brw."

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
647fc0c50bc9832c336b2b7e4329abec31df9dec 17-May-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Remove software geometry query code.

EXT_transform_feedback isn't yet supported on Gen4-5, so none of this
query code is actually used. This also means we can remove some of the
surrounding support code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
e32cd5ffbb7231f8d4bb44189492c89c9a4fbfa9 16-May-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Rely on hardware contexts for query objects on Gen6+.

Hardware contexts greatly simplify the query object code. The pipeline
statistics counters get saved and restored with the context, which means
that we don't need to worry about other workloads polluting them.

This means that we can simply write a single pair of values (one at
BeginQuery and one at EndQuery) rather than a series of pairs. This
also means we don't need to worry about the BO getting full. We also
don't need to delay BO allocation and starting snapshot until the first
draw.

The generation split here is a little off: technically, Ironlake can also
support hardware contexts. However, the kernel currently doesn't, and
even if it were to do so someday, we'd need to wait a while before
bumping the kernel requirement to take advantage of it.

v2: Incorporate Paul's feedback.
- Clarify which functions are Gen4/5-only via assertions and comments.
- Change how driver hook initialization happens.
- Update comments.
- Squash a bug fix from a later commit here where it belongs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
43dac2700ca05bc773b3fd84fab6f8c1f83079d6 15-Apr-2013 Marek Olšák <maraeo@gmail.com> mesa: don't flag _NEW_DEPTH in Begin/EndQuery if driver implements the functions

We don't want to set the flag for Gallium.

I think only swrast needs the flag to be set for occlusion queries.

v2: fix stats_wm updates in i965

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
95c83824e6c3740781d1e9f7ce6a5fbe839d0457 28-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Fix a mistake in the comments for software counters.

The code doesn't set brw->query.obj to NULL, it sets query->bo to NULL.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
492693c0a5d653b95ab4a970fdc5bba074050243 04-Mar-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Don't fill buffer with zeroes.

This was only necessary because our bounds checking was off by one, and
thus we read an extra pair of values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
89e5c8e0fa0f7ec6e1dc0d1ee269c164fd1cf3b0 04-Mar-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Fix off-by-one in query object result gathering.

If we've written N pairs of values to the buffer, then last_index = N,
but the values are 0 .. N-1. Thus, we need to use <, not <=.

This worked anyway because we fill the buffer with zeroes, so we just
added an extra (0 - 0) to our results.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
14cec07177f438717cc6fb9252525e16d6b3d8dd 22-Feb-2013 Eric Anholt <eric@anholt.net> i965: Make perf_debug() output to GL_ARB_debug_output in a debug context.

I tried to ensure that performance in the non-debug case doesn't change
(we still just check one condition up front), and I think the impact is
small enough in the debug context case to warrant including all of it.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
cf0c0a778273d6ada00e9bb8ee15938f3595bd7b 27-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Pull query BO reallocation out into a helper function.

We'll want to reuse this for non-occlusion queries in the future.

Plus, it's a single logical task, so having it as a helper function
clarifies the code somewhat.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
961c9b8cac6c438b74d8328a5e8c61215a16ea40 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Replace the global brw->query.bo variable with query->bo.

Again, eliminating a global variable in favor of a per-query object
variable will help in a future where we have more queries in hardware.

Personally, I find this clearer: there's just the query object's BO,
rather than two variables that usually shadow each other.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
614944b8975ce9827b26b92f42ad8b48493eb7f0 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Turn if (query->bo) into an assertion.

The code a few lines above calls brw_emit_query_begin() if !query->bo,
and that creates query->bo. So it should always be non-NULL.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
981a22b62bc7f8e50ba8bcb0a7f329c25bd53c8d 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Unify query object BO reallocation code.

If we haven't allocated a BO yet, we need to do that. Or, if there
isn't enough room to write another pair of values, we need to gather up
the existing results and start a new one. This is simple enough.

However, the old code was awkwardly split into two blocks, with a
write_depth_count() placed in the middle. The new depth count isn't
relevant to gathering the old BO's data, so that can go after the
reallocation is done. With the two blocks adjacent, we can merge them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
90feda81de3c608d5a6041246fc010904a3afa81 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Use query->last_index instead of the global brw->query.index.

Since we already have an index in the brw_query_object, there's no need
to also keep a global variable that shadows it.

Plus, if we ever add support for more types of queries that still need
the per-batch before/after treatment we do for occlusion queries, we
won't be able to use a single global variable. In contrast, per-query
object variables will work fine.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
ec5d502ec3215c7610bcff0be4418f698b2f36ab 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Remove brw_query_object::first_index field as it's always 0.

brw->query.index is initialized to 0 just a few lines before it's
copied to first_index.

Presumably the idea here was to reuse the query BO for subsequent
queries of the same type, but since that doesn't happen, there's no need
to have the extra code complexity.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
d92c7d8eed4eb0a1c1291a93d84439ba9a9983a2 26-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Add a pile of comments to brw_queryobj.c.

This code was really difficult to follow, for a number of reasons:

- Queries were handled in four different ways (TIMESTAMP writes a single
value, TIME_ELAPSED writes a single pair of values, occlusion queries
write pairs of values for the start and end of each batch, and other
queries are done entirely in software. It turns out that there are
very good reasons each query is handled the way it is, but
insufficient comments explaining the rationale.

- It wasn't immediately obvious which functions were driver hooks
and which were helper functions. For example, brw_query_begin() is
a driver hook that implements glBeginQuery() for all query types, but
the similarly named brw_emit_query_begin() is a helper function that's
only relevant for occlusion queries.

Extra explanatory comments should save me and others from constantly
having to ask how this code works and why various query types are
handled differently.

v2: Incorporate Eric's feedback: change "as soon as possible" to "the
results will be present when mapped."

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
d1b34baf9b9c977d2bcd612aa8ea7256f2143ad8 25-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Write TIMESTAMP query values into the first buffer element.

For timestamp queries, we just write a single value to a BO. The
natural place to write that is element 0, so we should do that.

Previously, we wrote it into element 1 (the second slot) leaving
element 0 filled with garbage.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
3d71f4fbac2e0337a1881cef93a220c36f9875f5 25-Feb-2013 Kenneth Graunke <kenneth@whitecape.org> i965: Implement the new QueryCounter() hook.

This moves the GL_TIMESTAMP handling out of EndQuery.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
d9d857e24fef2ae5576523b861f46c426b94ba0d 14-Dec-2012 Carl Worth <cworth@cworth.org> i965: Force even an empty query to flush all previous queries.

The specification requires that query results are processed in order, (when
one query result is returned, all previous query of the same type must also be
available). The implementation was failing this requirement in the case of
BeginQuery and EndQuery with no intervening drawing, (the result would be made
available immediately without flushing previous queries).

This fixes the following es3conform test:

occlusion_query_query_order

as well as the following piglit test:

occlusion_query_order

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
00d8ad81ffeda1d2a10b1ee65f4a144467d0afd1 09-Nov-2012 Ian Romanick <ian.d.romanick@intel.com> i965: Add support for GL_ANY_SAMPLES_PASSED_CONSERVATIVE

We just treat this as an alias for GL_ANY_SAMPLES_PASSED.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
459b28aba7c4ef0afe8d23dd2953e236d1bf7aed 18-Oct-2012 Eric Anholt <eric@anholt.net> i965: Merge brw_prepare_query_begin() and brw_emit_query_begin().

This is a leftover from when we had to split those two functions due to
the separate BO validation step.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
99dc87061333eeb8f617a6919cc3b6e9cc85beee 18-Oct-2012 Eric Anholt <eric@anholt.net> i965: Rename misleading "active" field of brw->query.

"Active" is an already-used term for the query being between
glBeginQuery() and glEndQuery(), while this is tracking whether the
start of the packet pair for emitting state has been inserted into the
current batchbuffer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
e755c1a36b27d6e45f0ae81729908342b8775c74 17-Oct-2012 Eric Anholt <eric@anholt.net> i965: Actually add support for GL_ANY_SAMPLES_PASSED from GL_ARB_oq2.

v2: Fix mangled sentence in the comment, and make the loop exit early.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
cae077cd0ff81ecbe67ef9bec88734891934c54e 16-Oct-2012 Eric Anholt <eric@anholt.net> i965: Stop flushing the batch on timestamp queries, too.

Given the usecase we have of trying to measure timestamps across individual
draw calls, flushing will totally mess up what people are trying to measure.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
1973845fbd0af05dc252ead57fae39d1f866dd9e 16-Oct-2012 Eric Anholt <eric@anholt.net> i965: Don't flush the batch immediately on EndQuery.

The theory I had when I wrote the code was that you wanted to minimize latency
on your queries because the app was going to ask soon. Only, it turns out
that everybody batches up their queries and asks for the results later (often
after the next SwapBuffers!), so this was a pessimization.

Until now, I had no workload where it mattered enough to benchmark. Recently
I started playing some Minecraft, which uses tons of queries to decide whether
to render chunks of the terrain. For that app, avoiding the flush in the
query-generation loop improves performance 22.7% +/- 4.7% (n=3) on an apitrace
capture of it (confirmed in game by watching the fps meter found by pressing
F3, 15/16 -> 20/21 fps).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
7540f25a345ed8d35d97ba4fbf66227a281eff6a 23-Aug-2012 Eric Anholt <eric@anholt.net> i965: Rewrite the comment describing the query object support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
f0159018d7709b57d9916575512d75cb3f2fb395 18-Jul-2012 Eric Anholt <eric@anholt.net> i965/gen6+: Add support for GL_ARB_timer_query.

Needs updated libdrm.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
0e723b135bfd59868c92c3ae243f1adaedaec3a5 12-Jul-2012 Eric Anholt <eric@anholt.net> intel: Add performance debug for some common GPU stalls.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
5deb1d1a1f9e3354597569032af9bdf27d629cca 08-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Rework the extra flushes surrounding occlusion queries.

This removes the CS stall on Ivybridge.

On Sandybridge, the depth stall needs to be preceded by a non-zero
post-sync op, which requires a CS stall, which needs a stall at
scoreboard. Emit the full workaround.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
e45a9ce474c3562f16c8a773260752d77a4fed5c 07-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Use 64-bit writes for occlusion queries.

The hardware seems to use the length of the PIPE_CONTROL command to
indicate whether the write is 64-bits or 32-bits. Which makes sense
for immediate writes.

Daniel discovered this by writing a pattern into the query object bo
and noticing that the high 32-bits were left intact, even on those
pipe control writes that seemingly worked.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
20c09b82d0520843f1c168adaf9bd5d17a572085 07-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Refactor depth count write PIPE_CONTROLs into a helper function.

This consolidates the complexity in one place, which is important
because it's about to get even more complicated.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
a2cdd5ada8ae315acbc4225398b7cbf78181f610 07-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Emit a CS stall before timestamp writes.

This implements one of the Sandybridge PIPE_CONTROL workarounds. It
doesn't appear to be required for Ivybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
c4c78c275abffe8d1014b1355f02239859d6aa2b 07-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Use 64-bit writes for timestamp queries.

The hardware seems to use the length of the PIPE_CONTROL command to
indicate whether the write is 64-bits or 32-bits. Which makes sense
for immediate writes.

Daniel discovered this by writing a pattern into the query object bo
and noticing that the high 32-bits were left intact, even on those
pipe control writes that seemingly worked.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
03f14664b6b12bc7853866fe613d8af350e51e08 07-Aug-2012 Kenneth Graunke <kenneth@whitecape.org> i965: Refactor timestamp write PIPE_CONTROLs into a helper function.

This consolidates the complexity in one place, which is important
because it's about to get even more complicated.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
61d0b9f52c6be4a4a64c30ea3a2a93ef8260c67b 26-Jul-2012 Kenneth Graunke <kenneth@whitecape.org> intel: Make the length for PIPE_CONTROL explicit.

PIPE_CONTROL has variable length, depending upon generation and whether
we want to do 32-bit or 64-bit data writes. Make it explicit, rather
than hiding a length of 4 in the #define for _3DSTATE_PIPE_CONTROL.

Generated by s/3DSTATE_PIPE_CONTROL/3DSTATE_PIPE_CONTROL | (4 - 2)/g.
This is equivalent since the #define used to have | 2 in it. A grep
through the sources shows that all instances have been converted, so
it's safe to remove the | 2 from the #define.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
8aa78c104a6fa9497cba558b54c41f6f2292bd74 28-Jun-2012 Jordan Justen <jordan.l.justen@intel.com> i965: fix transform feedback with primitive restart

When querying GL_PRIMITIVES_GENERATED, if primitive restart
is also used, then take the software primitive restart
path so GL_PRIMITIVES_GENERATED is returned correctly.

GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN is also updated
since it will also affected by the same issue.

As noted in brw_primitive_restart.c, with further work we
should be able to move this situation back to a hardware
handled path.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
c59393b7069f59ca2a13bfb6500f2a5360c38031 15-Dec-2011 Paul Berry <stereotype441@gmail.com> i965 gen6: Implement transform feedback queries.

This patch adds software-based PRIMITIVES_GENERATED and
TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN queries that work by keeping
track of the number of primitives that are sent down the pipeline, and
adjusting as necessary to account for the way each primitive type is
tessellated.

In the long run we'll want to replace this with a hardware-based
implementation, because the software approach won't work with geometry
shaders or primitive restart. However, at the moment, we don't have
the necessary kernel support to implement a hardware-based query (we
would need the kernel to save GPU registers when context switching, so
that drawing performed by another process doesn't get counted).

Fixes Piglit tests EXT_transform_feedback/query-primitives_generated-*
and EXT_transform_feedback/query-primitives-written-*.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
c5e17a84983d7799fd842a62daaece3d97a670be 19-Dec-2011 Paul Berry <stereotype441@gmail.com> i965: Convert if/else to switch statements in brw_queryobj.c

Previously, i965 only supported two query types: GL_TIME_ELAPSED_EXT
and GL_SAMPLES_PASSED_ARB, and it distinguished between the two using
if/else statements that compared query->Base.Target to
GL_TIME_ELAPSED_EXT.

This patch changes the if/else statements to switch statements so that
we can add more query types without having to have a chain of
else-ifs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
eaf4d3e6e2493a6e0b20d1205a5fb33ce500c9c2 22-Oct-2011 Eric Anholt <eric@anholt.net> i965: Remove the validated BO list, now that it's unused.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
2e5a1a254ed81b1d3efa6064f48183eefac784d0 07-Oct-2011 Kenneth Graunke <kenneth@whitecape.org> intel: Convert from GLboolean to 'bool' from stdbool.h.

I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done

Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.

Finally, I cleaned up some whitespace issues introduced by the change.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
7457da5edd4a33c2581f10608ce5bcf0e254c5f9 20-Jul-2011 Zou Nan hai <nanhai.zou@intel.com> i965: Fix timer query on gen6+

PIPE_CONTROL reported time stamp are 64 bits value incrementing every
80 ns, and only the low 32 bits are active (high 32 are always 0).

v2: Cleaned up whitespace, function arguments (anholt).

Fixes piglit EXT_timer_query/time-elapsed

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
8d68a90e225d831a395ba788e425cb717eec1f9a 10-Feb-2011 Chris Wilson <chris@chris-wilson.co.uk> intel: use pwrite for batch

It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.

And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
689aca782216d2666486dea02206cbc9c4162e0d 28-Dec-2010 Zhenyu Wang <zhenyuw@linux.intel.com> i965: Fix occlusion query on sandybridge

Clear target query buffer fixed occlusion query on sandybridge.

https://bugs.freedesktop.org/show_bug.cgi?id=32167
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
f9995b30756140724f41daf963fa06167912be7f 12-Oct-2010 Kristian Høgsberg <krh@bitplanet.net> Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
3074b61f64601be4620f1fb3c48c7c6024d3fd57 27-Sep-2010 Zhenyu Wang <zhenyuw@linux.intel.com> i965: fix occlusion query on sandybridge

Fix pipe control command for depth stall and PS_DEPTH_COUNT write.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e 07-Jun-2010 Eric Anholt <eric@anholt.net> intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.

The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
3b68b6c83e491d7f85baff6a31dcceee28622ae0 26-May-2010 Eric Anholt <eric@anholt.net> i965: Add support for EXT_timer_query on Ironlake.

We could potentially do this on G45 as well, though the units are
different. On 965, the timestamp is tied to hclk, which would make
supporting it harder.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
df3590f570cb88eb9695b443208d7576b5867fd1 17-May-2010 Eric Anholt <eric@anholt.net> i965: Remove the half-baked code for multiple OQs at the same time.

GL doesn't actually let you begin an OQ while one is active, so the
extra work was pointless.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
32f2fd1c5d6088692551c80352b7d6fa35b0cd09 19-Feb-2010 Kristian Høgsberg <krh@bitplanet.net> Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
5203b7227ccb6b618fa42f08434d4a3cf123dca2 02-Jan-2010 Kristian Høgsberg <krh@bitplanet.net> intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
3c1172f06636ff4aec24a6c68df937844da73a53 29-Aug-2009 Eric Anholt <eric@anholt.net> i965: Fix segfault with ARB_oq CheckQuery when results are already fetched.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
446a226f9fb958678dcee892847f1e6ad35151e9 28-Aug-2009 Eric Anholt <eric@anholt.net> i965: Implement ARB_oq CheckQuery in the intended way.

Previously we blocked because I hadn't added the libdrm function. Now it's
there, so update your libdrm.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
59b2c2adbbece27ccf54e58b598ea29cb3a5aa85 24-Oct-2008 Eric Anholt <eric@anholt.net> i965: Fix check_aperture calls to cover everything needed for the prim at once.

Previously, since my check_aperture API change, we would check each piece of
state against the batchbuffer individually, but not all the state against the
batchbuffer at once. In addition to not being terribly useful in assuring
success, it probably also increased CPU load by calling check_aperture many
times per primitive.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c
c157cfc6376f7469ab272b18868183e5ff9ac754 07-Oct-2008 Eric Anholt <eric@anholt.net> i965: Add ARB_occlusion_query support.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_queryobj.c