| f9d8c6e6eacb90fa4284a0d3fc784ad2bc4874af |
|
12-Sep-2017 |
Vincent Belliard <vincent.belliard@arm.com> |
Check unpredictable (OutsideITBlock()) for crc, hvc.
Change-Id: I1d61eac5e2db61b9e89e88438089d1c6ba672c84
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 8b57c86886020cf0a5331823be4789ee558764e2 |
|
02-Mar-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
[pool-manager] Integration with aarch32.
Key points of this patch:
- renames LabelBase to LocationBase
- makes the Location class derive from LoctionBase
- moves the code for Location, Label and RawLiteral/Literal to a shared file
- moves ReferenceInfo out of Assembler
- removes all the old veneer pool and literal pool code
- updates the macro assembler to use the new pool manager
- updates existing tests that expect a certain behaviour from the pool manager
- adds new tests for corner cases that came up during integration
- adds tests for issues that the new pool manager addresses (literal_and_veneer_interaction_*)
Change-Id: Ied81401d40f88cb988ff95e85fe832851f171f77
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 275c9d477d5bb717ac48f29db4ed153495be5ad3 |
|
12-May-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
[pool-manager] Split Label and Literal.
Add a new Location class that's a parent of both Label and Literal. Uses of
Label and Literal in the MacroAssembler stay as before, whereas in the
Assembler the new simple Location class is used.
Also changes the EmitOperator to store the ISA of the reference instruction (to
avoid storing this information in ForwardReference), and removes the minimum
and maximum offsets from EmitOperator, since that information is now stored in
ReferenceInfo. Addition of the architecture-specific PC-offset is now done in
the Encode method of the EmitOperator, where we don't need to check which
instruction set we are using (it's statically known).
These changes are in preparation of integration with the new pool manager, but
also clean up usage of labels and literals in some cases. For example, it won't
be possible to jump to a literal with the MacroAssembler anymore, as Literal
does not derive from Label.
Change-Id: I1139faaccfbd087e97ecbff2cfc2433a35582973
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 4b139a2dd8a7c32fc0f7df0cfd36d6c1336bc26c |
|
31-Mar-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
[pool-manager] Add helper functions to get info on forward references.
Change-Id: I0da221d37d8fa8b0188ace565be37a5f3dd6f3da
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 07f9e742691f10b7ff8b0107415eb94e157c2b33 |
|
21-Apr-2017 |
Vincent Belliard <vincent.belliard@arm.com> |
Use SOperand and DOperand for cmp and cmpe.
Change-Id: Ie5419a9f423c9dca7e21308ce3b35909500f2ca2
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 609821fcd0b88f46b514e1938c420bde12284267 |
|
08-Feb-2017 |
Vincent Belliard <vincent.belliard@arm.com> |
Use an integer instead of an operand for bfc, bfi, sbfx and ubfx width operand.
Change-Id: I5eb025f01b4d92eded9a393b6364c38de27c6fe5
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 9a9331faeba996d6c85e6e2a6355ccfc22c6cab6 |
|
09-Dec-2016 |
Rodolph Perfetta <rodolph.perfetta@arm.com> |
Allow conditional inclusion of A32, T32 and A64.
The 'target_arch' option has been replace by 'target' which can be any
combination of aarch32, aarch64, a32, t32, a64.
Change-Id: Id5cd052276747cd718551f562b74f79443b91869
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 0cc43be9ba1881f608a25467b1387927af3b4caa |
|
22-Dec-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Revert "[aarch32] Dot not abort when one uses unpredictable or strongly discouraged instructions"
This reverts commit d836966fcbe0ec3136486ec36de6bd2572d451eb.
Change-Id: I3e8b0ea9bc43594ab3ad569e54f78e00593dfea8
/external/vixl/src/aarch32/assembler-aarch32.h
|
| d836966fcbe0ec3136486ec36de6bd2572d451eb |
|
19-Dec-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
[aarch32] Dot not abort when one uses unpredictable or strongly discouraged instructions
Calling VIXL_ABORT when a MacroAssembler object would call
AllowUnpredictable or AllowStronglyDiscouraged would prevent us from
handling those cases in delegates. It should be up to a delegate to
decide whether to give the user an error or generate an alternative code
sequence.
Additionally, the user is able (but that's not recommended of course) to
lift the UNPREDICTABLE or STRONGLY DISCOURAGED limitation using
scopes. Since the AllowUnpredictable() and AllowStronglyDiscouraged()
methods were virtual and overriden by the macro-assembler to
abort. There was no way to write the following code:
```c++
MacroAssembler masm(T32);
{
ExactAssemblyScope scope(&masm, ...);
AllowUnpredictableScope allow_unpredictable(&masm);
// Here be dragons!
}
```
This patch fixes this by turning AllowUnpredictable() and
AllowStronglyDiscouraged() into non-virtual methods.
Finally, the related scopes were inside the `aarch32::Assembler::`
namespace, which is inconsistent with other scopes. Move it to
`aarch32`.
Change-Id: I42e5b772e850a8c23521385cf399aaae77b5eab6
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 9ae5da2ba518573576cc92e93e7a01dd34c8d1f7 |
|
05-Dec-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Specify instructions which use a delegate.
Change-Id: I47b2ed73eab09d5ed6541073d571300e2fcdeef0
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 000f93f0af01f9a3f250ad8fb8cd7a42e7b31c99 |
|
01-Dec-2016 |
Baptiste Afsa <baptiste.afsa@arm.com> |
aarch32: Add a few assertions in code dealing with literals.
Change-Id: Idce680b4f7b98fa1fadfdbc079783e05aa01c3f0
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 8d191abf32edf41421f68f35585e4fce8da4d50c |
|
29-Nov-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch32: Use the shared scopes `CodeBufferCheckScope` and `EmissionCheckScope`.
This patch continues toward the goal of unifying code-generation scopes for all
backends.
The new scopes differ from the existing AArch32 mechanisms, so a few tests for
literal and veneer pools needed to be updated.
The patch also adds AArch32 tests for the new scopes.
Change-Id: Ia6a93e6e860b47e703b6c9034fefa405810c18a0
/external/vixl/src/aarch32/assembler-aarch32.h
|
| d17e348e16bf0d6eca4f9ea0e935c7544098d045 |
|
23-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Add unpredictable conditions for ADC_i, ADC_r, ADC_rr, ADD_ADR, ADD_i, ADD_r, ADD_rr, ADD_SP_i, ADD_SP_r, ADR and MOV_i.
Change-Id: I2d0255c352881d855b375db65794ee7f282b1cfe
/external/vixl/src/aarch32/assembler-aarch32.h
|
| b44f7a6ee7f9cd194cde9577f5a941f2864795a4 |
|
17-Nov-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Remove delegate support for load/store exclusive and pld
This patch removes delegates that were trying to handle the following
instructions:
- pld
- pldw
- pli
- lda
- ldab
- ldaex
- ldaexb
- ldaexh
- ldah
- ldrex
- ldrexb
- ldrexh
- stl
- stlb
- stlh
- ldaexd
- ldrexd
- stlex
- stlexb
- stlexh
- strex
- strexb
- strexh
- stlexd
- strexd
Instead, the user will get an error if they are used incorrectly. We no
longer try to make them work with addressing modes that are not already
supported by the instruction itself.
Instead of having the delegates use VIXL_ABORT_WITH_MSG directly, I've
changed the `UnimplementedDelegate` method to print the message
"Ill-formed '{}' instruction.". To do this, we now have a
`ToCString(InstructionType)` function to print instructions, defined in
a new file "aarch32/constants-aarch32.cc".
Change-Id: I4e1f955576b88aae3edaf4dad157f11d4755e6ca
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 7827144797ee5ebfa0b574f45ad8ff235f919304 |
|
08-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Allow a label which is in the veneer pool to be bound with 'bind'.
Change-Id: I1e0d03498ec86ed23d94ef1db2d2adc5b73ef984
/external/vixl/src/aarch32/assembler-aarch32.h
|
| e42218c6ca969b7d4032da978fb05f06641df100 |
|
19-Oct-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Make bind and place more consistent.
Change-Id: I1743511e3c6f995f05cded38347a015c198b1fb9
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 7f4a230cbb795755d24e1d4658e99a7ccf1eb24b |
|
13-Oct-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Add instruction information to the DisassemblerStream.
Change-Id: I2da5371c86c000caef7cf82db8f5440184c8d0a3
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 6a049f97861bd71c69d81f643e42308d28c5de31 |
|
21-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Unify the `Assembler` helpers related to the code buffer.
A few helpers in `Assembler` classes that were simply wrappers around
`CodeBuffer` methods have been deprecated, and should be replaced by calls to
the `CodeBuffer` methods.
Change-Id: I72608c8c1f1f2823c58c8f6de042e932abe12629
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 919e3fe28a5024c53ede42922092bbc32e89dcb8 |
|
14-Oct-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Create a base class for assemblers.
This base class defines an interface that assemblers must adhere to.
For now, we use it to hold the code buffer.
Change-Id: I487430bb98c7044e57b348cffa1e74a2a4c8026f
/external/vixl/src/aarch32/assembler-aarch32.h
|
| f5348cedd702124c90fc75e75d0195e2e485c620 |
|
22-Sep-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Remove implicit 64 to 32 bit narrowing
This patch fixes cases of implicit 64 to 32 bit narrowing. The issue is
that `CodeBuffer` represents code offsets with `ptrdiff_t`, which will
be 64 bit on a 64 bit system. However, we want to support generating 32
bit code from a 64 bit program, therefore the 32 bit part of VIXL works
with `int32_t` for code offsets. We had implicit conversions happening
due to this.
We solve this by explicitely casting to `int32_t` in the AArch32
assembler when calling `GetCursorOffset`. If you are working with the
`CodeBuffer` directly, you are dealing with a code buffer on the host
and so will work with offsets as `ptrdiff_t`. But, when working with the
AArch32 assembler itself you will get offsets as `int32_t`. The
assembler is in charge of checking that the offsets it gets from the
code buffer fit into `int32_t`.
Additionally, we had narrowing cases when generally wrapping host
pointers into an Operand. This can only work if the pointer fits into 32
bits. This patch introduces a Operand::From() factory method that can be
used for converting any integral or pointer type to an immediate
operand.
Change-Id: Icc15711b34c2477ed997eef238e25496d86ea9aa
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 31dd2ae90d5e82871667fbf3ee2697a155e7c3ac |
|
05-Jul-2016 |
Alex Gilday <Alexander.Gilday2@arm.com> |
Correctly allocate executable memory in CodeBuffer
CodeBuffer allocates memory that is executable via an ExecuteMemory
function.
Change-Id: Ib2dca824e9edd3144694cfac627becd35dd48e3c
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 753bb5554d5832fbd470a460b0c5f839c0f51201 |
|
20-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch32: Remove the empty `Instructions` base class for `Assembler`.
Change-Id: Ic6c00c0ad98988ede47d3cad8426291972c59c0c
/external/vixl/src/aarch32/assembler-aarch32.h
|
| bf01e787b9ca4ff28b8c4d4355fd575c4ac81dfa |
|
14-Sep-2016 |
Anton Kirilov <anton.kirilov@linaro.org> |
Add some missing header file inclusions.
Change-Id: I8f7497ea6921b655e9996ab7843793f12b27eeed
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 8885c17bce593f82cf90c086da242e52943c50ef |
|
24-Aug-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
forbid direct use of assembler from the macro-assembler
Change-Id: Ic00c9c72e9aed7efaab72a6fd6838bbd0bda6531
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 1e85b7f2e8ad2bfb233de29405aade635ed207ce |
|
05-Aug-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Introduce architecture specific guards for the simulator
This patch makes the VIXL_INCLUDE_SIMULATOR and
VIXL_GENERATE_SIMULATOR_CODE header guards specific to either AArch64 or
AArch32. Even though the simulator only support AArch64. The build
system was updated accordingly, the "simulator" variable now takes
"aarch64" or "none" as possible values instead of "on" and "off".
This fixes issues we have when we want to build VIXL natively on
AArch64 without a simulator, but still include the AArch32
macro-assembler. The later would check for VIXL_GENERATE_SIMULATOR_CODE
and then generate calls to native code, which breaks.
Change-Id: I2850782558d4cc37f37c1644f0efbd70a3123057
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 979b1d25d9104f3c545a2c5740612b026053b670 |
|
29-Jul-2016 |
Artem Serov <artem.serov@linaro.org> |
Add GetStartAddress helper function.
Change-Id: I957db991bc84493a36eaf89a16b699c907c3479f
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 10dae1a549308bddc1931f29754d6a4459f70c9b |
|
27-Jul-2016 |
Jacob Bramley <jacob.bramley@arm.com> |
AArch32: Improve the API for selecting the ISA.
Specifically, replace SetT32(false) with SetA32(), and SetT32(true) with
SetT32(). This also adds a parameterised SetInstructionSet(...) helper, and
allows the instruction set to be set in the constructors.
Change-Id: I82609823a4b2af908b38c0a4240ff239561f7507
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 294e6f426db143d5409895ff4c755b2b203fc07d |
|
22-Jul-2016 |
Scott Wakeling <scott.wakeling@linaro.org> |
AArch32: Add GetSizeOfCodeGenerated() const accessor to Assembler.
Change-Id: I84877dd2c6aa6d0c5755c9dab6235e618bec26b6
/external/vixl/src/aarch32/assembler-aarch32.h
|
| 703ff06a087f67fccde24a7ffbc8a2e74a406cb1 |
|
11-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Aarch64: Rename `allow_simulator_instructions_` to `generate_simulator_code_`.
Change-Id: I72956db90ab3380b5ad62b37d2ed203ec4045931
/external/vixl/src/aarch32/assembler-aarch32.h
|
| d3832965c62a8ad461b9ea9eb0994ca6b0a3da2c |
|
04-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Update naming to `aarch32` and `aarch64`.
Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
/external/vixl/src/aarch32/assembler-aarch32.h
|