1bce007699e07bd855b7d194ca93fa5504a73eda |
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06-Jun-2017 |
Pierre Langlois <pierre.langlois@arm.com> |
Use clang-format 3.8 to format VIXL Additionally, this version of clang-format orders include directives alphabetically which showed that the "non-const-visitor.h" header was missing two of them. Change-Id: Ib03407dd2046a0bb7175370685e09fb3aebe583f
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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210db2113e52bd22a2835e366ed4abac6e7df2a6 |
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02-Jun-2017 |
Martyn Capewell <martyn.capewell@arm.com> |
Fix pre-shifted immediate generation involving sp. The function that generated a pre-shifted immediate didn't account for the instruction with post-shift being unencodable. Fix this by passing information about the target instruction, and use it to limit the application of pre-shift. Change-Id: I22ba36cce8a9e1d6da0b8a04c3602036af448d4f
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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1cb7144de5478fd860f6d64fad4207730d2e139b |
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30-Jan-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
Import new standalone pool manager. Change-Id: Icd46198a2980f4b4e17ac18367a006d5e4a33c69
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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62799611b9a3406de8c456052a0e4e8c7d728203 |
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06-Feb-2017 |
Alexandre Rames <alexandre.rames@uop.re> |
AArch64: Add support for `MacroAssembler::TailCallRuntime()`. This is similar to the existing `MacroAssembler::CallRuntime()` but uses (or behaves as when simulating) a branch instruction instead of a 'branch and link' instruction. Change-Id: I95f5ed010590edff93c09ac4eabf4334a13109ea
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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896682f0411643afa78e8c62caf723ec5f2b4dbe |
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10-Feb-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
Fix issue with TBZ and large literal pool. Before emitting a TBZ or TBNZ instruction, check whether the literal pool exceeds the range of these branches and if it does, emit it. Change-Id: I7de1e58c7ff0670a10dc09961bdafcabc5f874d5
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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8571b89fb163d8f3551327ceb46deb1cda359cee |
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09-Jan-2017 |
Pierre Langlois <pierre.langlois@arm.com> |
Introduce a FinalizeOption to Finalize() The last instruction we generate before calling `Finalize` should be an unconditional branch. However, it is useful to break this constraint when fuzzing. We now have two options that we can pass to Finalize: - kUnreachable: This is the default, with the existing behaviour. - kFallThrough: You are allowed to generate more instructions after Finalize. Change-Id: I3ecc873934a8448ab35646ecabd7085af3182637
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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7e0f1ebcf5ac1f83fd4b85a5b8f2e80dc991ed67 |
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06-Feb-2017 |
Georgia Kouveli <georgia.kouveli@arm.com> |
Make assertion in VeneerPool::CheckEmitFor stricter. Also rename max_reachable_pc to first_unreachable_pc, since it is not actually reachable by the branch instruction. Change-Id: I5e27939a7f8d3ee8b76c3f6640ae76abe41b2cf2
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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f4ba40fc419a9d484da9be1df051ad03327ce4f4 |
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19-Jan-2017 |
Pierre Langlois <pierre.langlois@arm.com> |
Remove pool blocking and assembler enablement from the API The MacroAssemblerInsterface and AssemblerBase classes define methods that should not be used directly. Instead, scope utilities should be used. This patch hides the following methods from the user: ~~~ void MacroAssemblerInterface::SetAllowMacroInstructions(bool allow); void AssemblerBase::SetAllowAssembler(); void MacroAssemblerInterface::BlockPools(); void MacroAssemblerInterface::ReleasePools(); void MacroAssemblerInterface::EnsureEmitPoolsFor(size_t size); ~~~ Change-Id: I26b55c560cd94a2158757ca969c6bf95f7ba743b
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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fb37b5d8438252728469290fa35a779817faea00 |
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18-Jan-2017 |
Pierre Langlois <pierre.langlois@arm.com> |
Add tests for pool blocking in nested ExactAssemblyScope On top of adding tests, this patch adds a new top-level MacroAssembler::ArePoolsBlocked() API method. This is useful for testing that the pools are actually blocked or not, and that nesting does not accidentally unblock them. Change-Id: If3845c6686ef45ddf1d28b8876ffd349731cdd9d
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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4fea551fb8ef5884ebd7157a82b1635063ea651f |
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17-Jan-2017 |
Jacob Bramley <jacob.bramley@arm.com> |
Add specialised W and X Register classes. These allow for the register type to be determined at compile time, so that the it can be used for overload resolution. Note that this does break the API in the case of the ternary operator. The following pattern will no longer work: Register r0 = (condition) ? x0 : w0; The workaround is to explicitly cast each register: Register r0 = (condition) ? Register(x0) : Register(w0); Some existing overload situation may also fail with the new scheme; in general, resolutions can be added by simply providing specific WRegister and XRegister implementations, which typically can fall through to the existing Register implementation with an explicit cast. In the future, we expect an extension which will make WRegister and XRegister POD types. Change-Id: I6da8e3f87161f23de7c13e3c5142d4fc40532090
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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e8ce9f0ec7fe9484fca0c446ecc8a9d7929bea66 |
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14-Dec-2016 |
Jacob Bramley <jacob.bramley@arm.com> |
Assert perfect nesting for UseScratchRegisterScope. Since UseScratchRegisterScope now has a MacroAssembler pointer anyway, this patch also removes available_ and availablefp_, and uses the MacroAssembler directly. Some negative tests would be useful but I'll add them separately. Change-Id: Ia093c67a980044f8e1514cff81998fd9dbfaa44e
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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4c5d65bf4d3a5fcc6ccb5cd19fed81e2b735789b |
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06-Dec-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Include AllowMacroInstructions methods in release mode The SetAllowMacroInstructions and AllowMacroInstructions methods were only included if VIXL_DEBUG was defined. While this is understandable, these methods are virtual and part of the MacroAssemblerInterface, which means the vtable of macro-assemblers has a different layout depending on VIXL_DEBUG. This can produce strange errors when headers are used incorrectly by the user, for instance if linking with a library compiled with VIXL_DEBUG defined by mistake. Additionally, this patch explicitely marks overriden methods of the MacroAssemblerInterface as virtual, as well as adding missing "internal" namespaces for AssemblerBase. Change-Id: I2f4595bd5990c944381b177809853e33354e9244
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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8d191abf32edf41421f68f35585e4fce8da4d50c |
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29-Nov-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch32: Use the shared scopes `CodeBufferCheckScope` and `EmissionCheckScope`. This patch continues toward the goal of unifying code-generation scopes for all backends. The new scopes differ from the existing AArch32 mechanisms, so a few tests for literal and veneer pools needed to be updated. The patch also adds AArch32 tests for the new scopes. Change-Id: Ia6a93e6e860b47e703b6c9034fefa405810c18a0
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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3fac43c1a101f98f116e752b80abc122d32b83ac |
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31-Oct-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Mark methods as `override` when compiling with C++11 This patch introduces a VIXL_OVERRIDE macro. When building with gcc -std=c++11, we now enable the `-Wsuggest-override` warning so that we do not forget to add them in the future. Change-Id: I0f402599019ba9de1a7a654e9499f00a07f00201
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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07d1aa5b941ace15deb01e5df2c79e677039c4ae |
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25-Oct-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: follow the design guidelines for `ExactAssemblyScope`. Change-Id: I5b942e033681c69f5e6cac3a669b3b3ebacbf1f8
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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c0b25f28106fbbbf8880e0b259de1a639ea1e73f |
|
19-Oct-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Follow the design guidelines for the AArch64 `EmissionCheckScope`. It uses a newly defined `MacroAssemblerInterface` class. Change-Id: I10ba663ec047d1ea320610bc2d5565de24d9686b
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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9dd6fa37dbb79f62177aebd04d7e945ce1dc3108 |
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12-Oct-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Follow the design guidelines for the AArch64 `CodeBufferCheckScope`. The implementation of the scopes relies only on the `AssemblerBase` interface. The AArch32 scopes will be updated in a separate commit. Change-Id: Ibe0eab35f60da39fe0bcbd60a16bdc65b12e0dd5
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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6a049f97861bd71c69d81f643e42308d28c5de31 |
|
21-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Unify the `Assembler` helpers related to the code buffer. A few helpers in `Assembler` classes that were simply wrappers around `CodeBuffer` methods have been deprecated, and should be replaced by calls to the `CodeBuffer` methods. Change-Id: I72608c8c1f1f2823c58c8f6de042e932abe12629
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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b49bdb7996e603555eba4c8b56c7325e3e737ab6 |
|
26-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Improve include directives in `src/aarch64`. Some `aarch64` files had include directives such as: #include "globals-vixl.h" #include "aarch64/other-aarch64.h" This required users of VIXL to compile with `-I<path/to/vixl/src>`. Change-Id: Ie0d1d39d1d8eb4a0e6b4b96af95a352b16043003
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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1c78c34397f2c08c012733cc661076e8bd029eab |
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16-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Do not bypass optimisations in `Mov` for registers. Change-Id: I060e7518cf7e3bca5b531b714683a64f73ea8ba0
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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0d2a3d5456e4464fd18cfe534c62b93e129f2637 |
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15-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Use `uintptr_t` to embed addresses for runtime call simulation. The addresses embedded in the data stream are only manipulated by the C++ code, that knows what `uintptr_t` is. So we do not need to stick to a 'fixed width' type for the addresses embedded in the data stream. Change-Id: Id78721b52fd259522d0e1b4c9ce0f9fda06f9f01
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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a4055d25c688d1397fc369a40abf57fa4f1ab805 |
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17-Aug-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Add guards around the AArch64 simulator If VIXL_INCLUDE_SIMULATOR_AARCH64 is not defined, including the "simulator-aarch64.h" header should have no effect. We couldn't do this because the macro-assembler relies on TraceCommand and TraceParameter being defined. Change-Id: Ide0b9f87482e51addfb2b6199cb5453ca4f15f7f
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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c3487d2febf913244d5789d096732df569e8b7fd |
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12-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Fix macros for `CallRuntime` support. The associated test was failing to compile natively. Change-Id: I8962f348d3e019766c778dacd5c05f93b2295630
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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fd09817b8770a5e3a64a6fe4fefe85cc29805cd7 |
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09-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Do not include data members conditionally on `VIXL_DEBUG` in headers. Objects visible via headers should have the same data-layout in release and debug modes. Change-Id: I7ce5014ab8406968cdd8e9818a7f840cb443b6c1
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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01cbce53c0162cc3220b378bc6ce919b02a9cf4b |
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08-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Make the destructors of 'scopes' virtual. Change-Id: Icf23d4ed777fe1f8b57e536774c95d6c8ced5ad5
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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de5bb0beb4a3342bb9f0d7e7fe16737a171517b0 |
|
04-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Refactor `InstructionAccurateScope` and add a regression test. The previous implementation was not emitting the pools when it needed to upon construction, and was not correctly blocking emission of the pools. Change-Id: I06db5b5891234946b139ba64898929c0e3ced3c4
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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9fbd11bbc6a56071f455df28e08854a848f46c3b |
|
08-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Refactor `EmissionCheckScope`. It now inherits from `CodeBufferCheckScope` instead of reimplementing the buffer size checking feature. Change-Id: I9cb5f0ea49aba8b87c21d9de41d94562265943f3
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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61240278b0526ce7a177b3641447948007696891 |
|
03-Aug-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Follow the `Open()` and `Close()` design for `CodeBufferCheckScope`. The `Open()` and `Close()` helpers will be used in incoming commits refactoring related scopes. Change-Id: Ia57f74a5c98324cd6cd026a4c36f9049c7ae6a03
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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ca73ba046c11d65b6dce59cfd26847d14aba06ab |
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28-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Fix `#define` directives related to ABI and runtime call simulation. Also add a regression test. Change-Id: Iad770e7181f3b994590bdee069845885039e8bc4
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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064e02d4e85938b2e2be4d4b37a2691b2e015ebb |
|
12-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Support runtime call simulation. Change-Id: I063c2223a63791e90d8aa9cffc6e88f96d57187e
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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4e7c93cc256c7719d69279d64e4f5d09044b8b2c |
|
19-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
AArch64: Introduce a new `GenericOperand` abstraction. Currently, a `GenericOperand` can represent a `CPURegister` or a memory area (`MemOperand` extended by a 'size' field). Change-Id: Ic37c4da07ea888444ccb1bfbd82646d0c56bbe84
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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703ff06a087f67fccde24a7ffbc8a2e74a406cb1 |
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11-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Aarch64: Rename `allow_simulator_instructions_` to `generate_simulator_code_`. Change-Id: I72956db90ab3380b5ad62b37d2ed203ec4045931
/external/vixl/src/aarch64/macro-assembler-aarch64.h
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d3832965c62a8ad461b9ea9eb0994ca6b0a3da2c |
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04-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Update naming to `aarch32` and `aarch64`. Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
/external/vixl/src/aarch64/macro-assembler-aarch64.h
|