History log of /external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
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1bce007699e07bd855b7d194ca93fa5504a73eda 06-Jun-2017 Pierre Langlois <pierre.langlois@arm.com> Use clang-format 3.8 to format VIXL

Additionally, this version of clang-format orders include directives
alphabetically which showed that the "non-const-visitor.h" header was missing
two of them.

Change-Id: Ib03407dd2046a0bb7175370685e09fb3aebe583f
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
74d4ef31746fbfd90118858857502c7006e3e925 08-May-2017 Pierre Langlois <pierre.langlois@arm.com> [test] Remove TEARDOWN macro for AArch32

This macro was never necessary, remove it.

Change-Id: Ie7428a80eb55505d36235467ea40ebdca72037ad
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
d1bf2784420717dcd20888a6eaecb18ab7f01d56 27-Sep-2016 Pierre Langlois <pierre.langlois@arm.com> [tests] Allow generating one description to support two ISA

This patch changes the naming scheme of the generated tests, so we can
support generating both a A32 and T32 test for a single
description. This is a pre-requisite to tests NEON/VFP instructions, as
they very often have the same constraints in both ISAs.

The name of the ISA is now placed at the end of each tests. A
configuration file which does not specify an ISA will see its test files
duplicated for both.

Finally, the "rd-rn-rm-{a32,t32}.json" configurations where identical
apart from the ISA. This patch shares them.

Change-Id: Icd89112b94dd135b7519b6c65fade17fe3b8e217
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
9a9331faeba996d6c85e6e2a6355ccfc22c6cab6 09-Dec-2016 Rodolph Perfetta <rodolph.perfetta@arm.com> Allow conditional inclusion of A32, T32 and A64.

The 'target_arch' option has been replace by 'target' which can be any
combination of aarch32, aarch64, a32, t32, a64.

Change-Id: Id5cd052276747cd718551f562b74f79443b91869
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
cb6592f4b00347a84f9d7638473f0af8f1b6b1dd 08-Dec-2016 Georgia Kouveli <georgia.kouveli@arm.com> Close the UseScratchRegisterScope in the right place.

Change-Id: I97b37a24730e3d8f5b771712e7b5a780f481ead4
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
4cb13e841305b38acbd8195b1c511d59c91ec8d9 08-Dec-2016 Georgia Kouveli <georgia.kouveli@arm.com> Correct usage of scratch registers in tests.

Exclude all registers from the UseScratchRegister list for start and end code
in tests, then include ip where necessary. Similarly, exclude all registers
from the scratch register list in the Printf implementation, which handles
available registers in its own way.

Change-Id: I96100411a45f104f85bbc4020959fc9d98e240af
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
28ee02e59261f0aaa4824953fa3db5dd8f7f8dcf 16-Nov-2016 Pierre Langlois <pierre.langlois@arm.com> [tests] Skip simulator tests when the host is not 32-bit

We would get assertions from the simulator tests when trying to convert
a 64-bit pointer into an immediate Operand. This patch just skips all
those tests when building with a non 32-bit compiler and show a warning
instead.

Change-Id: I4393e56f2ce523fcd508e0801f8cc9f0e2201d10
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
1d451fce2580f360ef249893135526156985a85c 04-Nov-2016 Pierre Langlois <pierre.langlois@arm.com> Isolate each generated tests into anonymous namespaces

Generated tests all have declarations and definitions with the sames
names, and in a C-like fashion we've used the `static` keywords to make
sure things are local to their compilation unit.

However, we cannot make a *type* local to its compilation unit in C, as
it doesn't make sense. But in C++, due to the template instantiation
phase, we need to be able to do that, as the compiler could create a
single template instantiation for a type that is defined differently in
different files. It can lead to very confusing bugs. This what the
anonymous namespaces are for, they make both funcions and type
definitions local to them.

So this patch drops the use of C-like `static` locality in favor of a
C++ anonymous namespace.

Change-Id: Ic1b74b0a589c250d9e7bb77d4c4864dababc4596
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
6a049f97861bd71c69d81f643e42308d28c5de31 21-Sep-2016 Alexandre Rames <alexandre.rames@linaro.org> Unify the `Assembler` helpers related to the code buffer.

A few helpers in `Assembler` classes that were simply wrappers around
`CodeBuffer` methods have been deprecated, and should be replaced by calls to
the `CodeBuffer` methods.

Change-Id: I72608c8c1f1f2823c58c8f6de042e932abe12629
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
919e3fe28a5024c53ede42922092bbc32e89dcb8 14-Oct-2016 Alexandre Rames <alexandre.rames@linaro.org> Create a base class for assemblers.

This base class defines an interface that assemblers must adhere to.
For now, we use it to hold the code buffer.

Change-Id: I487430bb98c7044e57b348cffa1e74a2a4c8026f
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
f5348cedd702124c90fc75e75d0195e2e485c620 22-Sep-2016 Pierre Langlois <pierre.langlois@arm.com> Remove implicit 64 to 32 bit narrowing

This patch fixes cases of implicit 64 to 32 bit narrowing. The issue is
that `CodeBuffer` represents code offsets with `ptrdiff_t`, which will
be 64 bit on a 64 bit system. However, we want to support generating 32
bit code from a 64 bit program, therefore the 32 bit part of VIXL works
with `int32_t` for code offsets. We had implicit conversions happening
due to this.

We solve this by explicitely casting to `int32_t` in the AArch32
assembler when calling `GetCursorOffset`. If you are working with the
`CodeBuffer` directly, you are dealing with a code buffer on the host
and so will work with offsets as `ptrdiff_t`. But, when working with the
AArch32 assembler itself you will get offsets as `int32_t`. The
assembler is in charge of checking that the offsets it gets from the
code buffer fit into `int32_t`.

Additionally, we had narrowing cases when generally wrapping host
pointers into an Operand. This can only work if the pointer fits into 32
bits. This patch introduces a Operand::From() factory method that can be
used for converting any integral or pointer type to an immediate
operand.

Change-Id: Icc15711b34c2477ed997eef238e25496d86ea9aa
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
31dd2ae90d5e82871667fbf3ee2697a155e7c3ac 05-Jul-2016 Alex Gilday <Alexander.Gilday2@arm.com> Correctly allocate executable memory in CodeBuffer

CodeBuffer allocates memory that is executable via an ExecuteMemory
function.

Change-Id: Ib2dca824e9edd3144694cfac627becd35dd48e3c
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
1e85b7f2e8ad2bfb233de29405aade635ed207ce 05-Aug-2016 Pierre Langlois <pierre.langlois@arm.com> Introduce architecture specific guards for the simulator

This patch makes the VIXL_INCLUDE_SIMULATOR and
VIXL_GENERATE_SIMULATOR_CODE header guards specific to either AArch64 or
AArch32. Even though the simulator only support AArch64. The build
system was updated accordingly, the "simulator" variable now takes
"aarch64" or "none" as possible values instead of "on" and "off".

This fixes issues we have when we want to build VIXL natively on
AArch64 without a simulator, but still include the AArch32
macro-assembler. The later would check for VIXL_GENERATE_SIMULATOR_CODE
and then generate calls to native code, which breaks.

Change-Id: I2850782558d4cc37f37c1644f0efbd70a3123057
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
ec4fdd22abecf1b8f52ee9dbff596ebdded9b5d6 11-Aug-2016 Serban Constantinescu <serban.constantinescu@linaro.org> Fix Valgrind issues

Change-Id: I7cc0a45f3831d93589eb546003225436c2419e01
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
19c0535d3c9c0bec6eeecce0ae704a7fd527a9d8 10-Aug-2016 Pierre Langlois <pierre.langlois@arm.com> [test] Make generated tests satisfy VIXL's clang-format

The test generator would use Google's style guide instead of VIXL's when
running clang-format over the generated files. Now that VIXL has its own
".clang-format", let's use it.

Change-Id: I960ed290d1b7e762da9e96f105b83e749ed560a5
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
10dae1a549308bddc1931f29754d6a4459f70c9b 27-Jul-2016 Jacob Bramley <jacob.bramley@arm.com> AArch32: Improve the API for selecting the ISA.

Specifically, replace SetT32(false) with SetA32(), and SetT32(true) with
SetT32(). This also adds a parameterised SetInstructionSet(...) helper, and
allows the instruction set to be set in the constructors.

Change-Id: I82609823a4b2af908b38c0a4240ff239561f7507
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
77f0f9fad6140b5db96044459ead7110ecee98e2 28-Jul-2016 Alexandre Rames <alexandre.rames@linaro.org> Remove now unnecessary `#ifdef` directives in AArch32 tests.

Change-Id: I7e6baab44d0f2156492a0ddc18c625e6edebe65f
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
54fce717d9371fa2e8fc46e1d811bdb4ab74f279 21-Jul-2016 Alexandre Rames <alexandre.rames@linaro.org> AArch32: Do not verify simulator test results when tests cannot be run.

Change-Id: Ie32499560265f9fec6d73b585b6d823286fa9a65
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
d3832965c62a8ad461b9ea9eb0994ca6b0a3da2c 04-Jul-2016 Alexandre Rames <alexandre.rames@linaro.org> Update naming to `aarch32` and `aarch64`.

Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
/external/vixl/test/aarch32/test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc