48f5fb14daab6b742ab405821b6ec28b04a135b2 |
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19-Jun-2015 |
Yuanjun Huang <yuanjun.huang@intel.com> |
Add flush cache operation for VP8 encode in user point type surface Bug: 21156664 Change-Id: I790b7f39cea94cababf50b09876f7c68ed742518
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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d50cf45fbdb02245b8d45b14935fc5f2f4575653 |
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14-Nov-2014 |
Thierry Strudel <thierry.strudel@intel.com> |
Enable VSP driver 1. builds VSP vpp files. 2. remove dependency on libvpp 3. Remove the limitation of va surface can't be NULL when vaCreateContext 4. Fix a multiple thread issue when vaCreateSurfaces When try to invoke gralloc_lock for the same native handle from different thread, will return lock err. Add a interface lock to protect the access to native handle. 5. Remove the compiling warning for VPP/VP8. Update the data structure for parameters Add "unused" attribute for unused function parameter. 7. Add flag in vaCreateSurfaces2 to explicit set NOT initialized share info when creating surfaces. 8. Copy VPP input share info to output Bug: 17383204 BZ: 227971 Change-Id: I6cfe01494d12f8704145294d391f4241801b05f6 Signed-off-by: Xigui Wang <xigui.wang@intel.com> Signed-off-by: pingshix <pingx.shi@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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b35344f5c0b8568df0630efe9fce076e810de8d3 |
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10-Oct-2014 |
ywan171 <yi.a.wang@intel.com> |
add vsp vp8 encoder into build Bug: 17783054 BZ: 225951 Change-Id: Ic0883ff983c2b34ac7c7c104ce312d5bf33bf405 Signed-off-by: ywan171 <yi.a.wang@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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58c96451d7ea53930d4eb94b6573571a51170de4 |
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22-Dec-2013 |
Fei Jiang <fei.jiang@intel.com> |
psb_video: remove unused group member in psb_validate_req BZ: 160699 group is not used in structure psb_validate_req, remove it to let the structure size aligned at 8 bytes. If psb_validate_req struture size is not aligned at 8 byte, will occure imcompatible problem for 32 bit user space and 64 bit kernel case. Change-Id: I12445ecc4fef52ffeebc6702a5b5861150103237 Signed-off-by: Fei Jiang <fei.jiang@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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5d69fca537b4dd301c586b988129305fa60f1c06 |
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08-Mar-2013 |
Wang Kun <kun.k.wang@intel.com> |
Update the VSP codes to match VIED 1.10 release. BZ: 91558 Support VSP tiling and FRC 1.25x support. Update the Deblock parameters tables. Change-Id: I6b46748e21077a4f5a24723e74beb3e13321d82d Signed-off-by: Wang Kun <kun.k.wang@intel.com> Reviewed-on: http://android.intel.com:8080/95748 Reviewed-by: cactus <cactus@intel.com> Reviewed-by: Wang, Lili A <lili.a.wang@intel.com> Reviewed-by: Shi, PingX <pingx.shi@intel.com> Tested-by: Shi, PingX <pingx.shi@intel.com> Reviewed-by: buildbot <buildbot@intel.com> Tested-by: buildbot <buildbot@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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36b2fec53dda9155f2a93eb75f7fe2b7c63d3941 |
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05-Dec-2012 |
Wang Kun <kun.k.wang@intel.com> |
[PORT FROM MAIN]Remove the VPP filter pipeline check.[MRFLD-VIDEO] BZ: 72833 After discussed with architecture, the psb_video VPP driver should expose the individual filters. Change-Id: Ieac032ccd4851059308acd054bf3088451a28769 Signed-off-by: Wang Kun <kun.k.wang@intel.com> Reviewed-on: http://android.intel.com:8080/81247 Reviewed-by: Ding, Haitao <haitao.ding@intel.com> Tested-by: Ding, Haitao <haitao.ding@intel.com> Reviewed-by: cactus <cactus@intel.com> Tested-by: cactus <cactus@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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cc2673c315517dd5a4bd294fb8707cf40c0d2088 |
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19-Sep-2012 |
Fei Jiang <fei.jiang@intel.com> |
kernel-drm: refine video driver decode/encode common code BZ: 58132 Correct PSB_ENGINE_VIDEO to PSB_ENGINE_DECODE. Signed-off-by: Fei Jiang <fei.jiang@intel.com> Change-Id: I62a369103031c329e29c390d9070be7ef17f097a Signed-off-by: Fei Jiang <fei.jiang@intel.com> Reviewed-on: http://android.intel.com:8080/67180 Reviewed-by: Feng, Wei <wei.feng@intel.com> Reviewed-by: Zeng, Li <li.zeng@intel.com> Reviewed-by: Guo, Nana N <nana.n.guo@intel.com> Reviewed-by: Shi, PingX <pingx.shi@intel.com> Tested-by: Shi, PingX <pingx.shi@intel.com> Reviewed-by: buildbot <buildbot@intel.com> Tested-by: buildbot <buildbot@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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8e9a21e730449c10cac6e6f69d255611c93f63c2 |
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13-Sep-2012 |
hding3 <haitao.ding@intel.com> |
porting MRFL branch to ICS mainline [MRFLD-VIDEO]. BZ: 35390 porting MRFL branch to ICS mainline.update version r7. Change-Id: Ia48689ead949f44d32817d062accab06b1ecd3a6 Signed-off-by: hding3 <haitao.ding@intel.com>
/hardware/intel/img/psb_video/src/vsp_cmdbuf.c
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