Cross Reference: /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Lines Matching defs:Rd
1789   unsigned Rd = fieldFromInstruction32(Insn, 8, 4);
1798     if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1800   if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1813   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
1821     if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1823   if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1839   unsigned Rd = fieldFromInstruction32(Insn, 16, 4);
1848   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
1959   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
1960   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
1967   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2020       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2041       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2083       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2098       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2127       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2136       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2208   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2209   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2274   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2327       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2348       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2391       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2406       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2435       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2444       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2458   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2459   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2468   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2471     if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2497   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2498   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2506   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2508   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2533   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2534   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2539   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2541   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2543   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2568   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2569   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2589   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2591   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2593   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2595   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder)))
2621   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2622   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2631     if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2634     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2645       if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2652       if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2666   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2667   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2672   if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2709   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2710   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2718   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2721     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3260   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3265   if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
3269   if (Rd == Rn || Rd == Rt || Rd == Rt+1) return MCDisassembler::Fail;
3392   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3393   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3421   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3438   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3451   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3452   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3495   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3509   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3510   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3542   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3544   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3561   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3563   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3576   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3577   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3624   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3626   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3640   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3641   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3671   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3673   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3675   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3693   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3695   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3697   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3710   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3711   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3756   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3758   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3760   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3774   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3775   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3805   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3807   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3809   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3811   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
3829   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3831   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3833   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3835   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
3848   unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3849   Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3894   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3896   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3898   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3900   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))