Lines Matching defs:ENUM_ENTRY
51 ENUM_ENTRY(ATTR_NONE, 0x00) \
52 ENUM_ENTRY(ATTR_64BIT, 0x01) \
53 ENUM_ENTRY(ATTR_XS, 0x02) \
54 ENUM_ENTRY(ATTR_XD, 0x04) \
55 ENUM_ENTRY(ATTR_REXW, 0x08) \
56 ENUM_ENTRY(ATTR_OPSIZE, 0x10) \
57 ENUM_ENTRY(ATTR_VEX, 0x20) \
58 ENUM_ENTRY(ATTR_VEXL, 0x40)
60 #define ENUM_ENTRY(n, v) n = v,
65 #undef ENUM_ENTRY
75 ENUM_ENTRY(IC, 0, "says nothing about the instruction") \
76 ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \
78 ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \
80 ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \
82 ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \
84 ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \
86 ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \
88 ENUM_ENTRY(IC_64BIT_REXW, 4, "requires a REX.W prefix, so operands "\
90 ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \
91 ENUM_ENTRY(IC_64BIT_XD, 5, "XD instructions are SSE; REX.W is " \
93 ENUM_ENTRY(IC_64BIT_XS, 5, "Just as meaningful as IC_64BIT_XD") \
94 ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \
95 ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \
96 ENUM_ENTRY(IC_64BIT_REXW_XS, 6, "OPSIZE could mean a different " \
98 ENUM_ENTRY(IC_64BIT_REXW_XD, 6, "Just as meaningful as " \
100 ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 7, "The Dynamic Duo! Prefer over all " \
103 ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \
104 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
105 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
106 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
107 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
108 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
109 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
110 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
111 ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \
112 ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\
113 ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\
114 ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize")
117 #define ENUM_ENTRY(n, r, d) n,
122 #undef ENUM_ENTRY
163 ENUM_ENTRY(MODRM_ONEENTRY) \
164 ENUM_ENTRY(MODRM_SPLITRM) \
165 ENUM_ENTRY(MODRM_FULL)
167 #define ENUM_ENTRY(n) n,
172 #undef ENUM_ENTRY
210 ENUM_ENTRY(ENCODING_NONE, "") \
211 ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \
212 ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \
213 ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \
214 ENUM_ENTRY(ENCODING_CB, "1-byte code offset (possible new CS value)") \
215 ENUM_ENTRY(ENCODING_CW, "2-byte") \
216 ENUM_ENTRY(ENCODING_CD, "4-byte") \
217 ENUM_ENTRY(ENCODING_CP, "6-byte") \
218 ENUM_ENTRY(ENCODING_CO, "8-byte") \
219 ENUM_ENTRY(ENCODING_CT, "10-byte") \
220 ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \
221 ENUM_ENTRY(ENCODING_IW, "2-byte") \
222 ENUM_ENTRY(ENCODING_ID, "4-byte") \
223 ENUM_ENTRY(ENCODING_IO, "8-byte") \
224 ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8L..R15L) Register code added to " \
226 ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \
227 ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \
228 ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \
229 ENUM_ENTRY(ENCODING_I, "Position on floating-point stack added to the " \
232 ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \
233 ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \
234 ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \
236 ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \
239 #define ENUM_ENTRY(n, d) n,
244 #undef ENUM_ENTRY
251 ENUM_ENTRY(TYPE_NONE, "") \
252 ENUM_ENTRY(TYPE_REL8, "1-byte immediate address") \
253 ENUM_ENTRY(TYPE_REL16, "2-byte") \
254 ENUM_ENTRY(TYPE_REL32, "4-byte") \
255 ENUM_ENTRY(TYPE_REL64, "8-byte") \
256 ENUM_ENTRY(TYPE_PTR1616, "2+2-byte segment+offset address") \
257 ENUM_ENTRY(TYPE_PTR1632, "2+4-byte") \
258 ENUM_ENTRY(TYPE_PTR1664, "2+8-byte") \
259 ENUM_ENTRY(TYPE_R8, "1-byte register operand") \
260 ENUM_ENTRY(TYPE_R16, "2-byte") \
261 ENUM_ENTRY(TYPE_R32, "4-byte") \
262 ENUM_ENTRY(TYPE_R64, "8-byte") \
263 ENUM_ENTRY(TYPE_IMM8, "1-byte immediate operand") \
264 ENUM_ENTRY(TYPE_IMM16, "2-byte") \
265 ENUM_ENTRY(TYPE_IMM32, "4-byte") \
266 ENUM_ENTRY(TYPE_IMM64, "8-byte") \
267 ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \
268 ENUM_ENTRY(TYPE_RM8, "1-byte register or memory operand") \
269 ENUM_ENTRY(TYPE_RM16, "2-byte") \
270 ENUM_ENTRY(TYPE_RM32, "4-byte") \
271 ENUM_ENTRY(TYPE_RM64, "8-byte") \
272 ENUM_ENTRY(TYPE_M, "Memory operand") \
273 ENUM_ENTRY(TYPE_M8, "1-byte") \
274 ENUM_ENTRY(TYPE_M16, "2-byte") \
275 ENUM_ENTRY(TYPE_M32, "4-byte") \
276 ENUM_ENTRY(TYPE_M64, "8-byte") \
277 ENUM_ENTRY(TYPE_LEA, "Effective address") \
278 ENUM_ENTRY(TYPE_M128, "16-byte (SSE/SSE2)") \
279 ENUM_ENTRY(TYPE_M256, "256-byte (AVX)") \
280 ENUM_ENTRY(TYPE_M1616, "2+2-byte segment+offset address") \
281 ENUM_ENTRY(TYPE_M1632, "2+4-byte") \
282 ENUM_ENTRY(TYPE_M1664, "2+8-byte") \
283 ENUM_ENTRY(TYPE_M16_32, "2+4-byte two-part memory operand (LIDT, LGDT)") \
284 ENUM_ENTRY(TYPE_M16_16, "2+2-byte (BOUND)") \
285 ENUM_ENTRY(TYPE_M32_32, "4+4-byte (BOUND)") \
286 ENUM_ENTRY(TYPE_M16_64, "2+8-byte (LIDT, LGDT)") \
287 ENUM_ENTRY(TYPE_MOFFS8, "1-byte memory offset (relative to segment " \
289 ENUM_ENTRY(TYPE_MOFFS16, "2-byte") \
290 ENUM_ENTRY(TYPE_MOFFS32, "4-byte") \
291 ENUM_ENTRY(TYPE_MOFFS64, "8-byte") \
292 ENUM_ENTRY(TYPE_SREG, "Byte with single bit set: 0 = ES, 1 = CS, " \
294 ENUM_ENTRY(TYPE_M32FP, "32-bit IEE754 memory floating-point operand") \
295 ENUM_ENTRY(TYPE_M64FP, "64-bit") \
296 ENUM_ENTRY(TYPE_M80FP, "80-bit extended") \
297 ENUM_ENTRY(TYPE_M16INT, "2-byte memory integer operand for use in " \
299 ENUM_ENTRY(TYPE_M32INT, "4-byte") \
300 ENUM_ENTRY(TYPE_M64INT, "8-byte") \
301 ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \
302 ENUM_ENTRY(TYPE_MM, "MMX register operand") \
303 ENUM_ENTRY(TYPE_MM32, "4-byte MMX register or memory operand") \
304 ENUM_ENTRY(TYPE_MM64, "8-byte") \
305 ENUM_ENTRY(TYPE_XMM, "XMM register operand") \
306 ENUM_ENTRY(TYPE_XMM32, "4-byte XMM register or memory operand") \
307 ENUM_ENTRY(TYPE_XMM64, "8-byte") \
308 ENUM_ENTRY(TYPE_XMM128, "16-byte") \
309 ENUM_ENTRY(TYPE_XMM256, "32-byte") \
310 ENUM_ENTRY(TYPE_XMM0, "Implicit use of XMM0") \
311 ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \
312 ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \
313 ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \
315 ENUM_ENTRY(TYPE_Mv, "Memory operand of operand size") \
316 ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \
317 ENUM_ENTRY(TYPE_IMMv, "Immediate operand of operand size") \
318 ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \
319 ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \
320 ENUM_ENTRY(TYPE_DUP1, "operand 1") \
321 ENUM_ENTRY(TYPE_DUP2, "operand 2") \
322 ENUM_ENTRY(TYPE_DUP3, "operand 3") \
323 ENUM_ENTRY(TYPE_DUP4, "operand 4") \
324 ENUM_ENTRY(TYPE_M512, "512-bit FPU/MMX/XMM/MXCSR state")
326 #define ENUM_ENTRY(n, d) n,
331 #undef ENUM_ENTRY
348 ENUM_ENTRY(MODIFIER_NONE) \
349 ENUM_ENTRY(MODIFIER_OPCODE) \
350 ENUM_ENTRY(MODIFIER_MODRM)
352 #define ENUM_ENTRY(n) n,
357 #undef ENUM_ENTRY