Lines Matching refs:T0
32 const uint32_t T0 = allocateDword();
37 __ popl(dwordAddress(T0));
40 test.setDwordTo(T0, V0);
44 ASSERT_EQ(0xC0FFEEul, test.contentsOfDword(T0));
50 const uint32_t T0 = allocateDword(); \
58 __ setcc(Cond::Br_##C, dwordAddress(T0)); \
61 test.setDwordTo(T0, V0); \
68 EXPECT_EQ((0xF00F00 | IsTrue), test.contentsOfDword(T0)) \
395 const uint32_t T0 = allocateDword(); \
399 __ test(IceType_i##Size, dwordAddress(T0), \
401 __ mov(IceType_i32, dwordAddress(T0), Immediate(ValueIfFalse)); \
404 __ mov(IceType_i32, dwordAddress(T0), Immediate(ValueIfTrue)); \
408 test.setDwordTo(T0, uint32_t(Value0)); \
413 test.contentsOfDword(T0)) \
425 const uint32_t T0 = allocateDword(); \
427 __ test(IceType_i##Size, dwordAddress(T0), \
429 __ mov(IceType_i32, dwordAddress(T0), Immediate(ValueIfFalse)); \
432 __ mov(IceType_i32, dwordAddress(T0), Immediate(ValueIfTrue)); \
436 test.setDwordTo(T0, uint32_t(Value0)); \
441 test.contentsOfDword(T0)) \
520 const uint32_t T0 = allocateDword(); \
525 __ mov(IceType_i##Size, dwordAddress(T0), Immediate(Value1)); \
527 dwordAddress(T0)); \
530 test.setDwordTo(T0, V0); \
568 const uint32_t T0 = allocateDword(); \
573 __ Inst(IceType_i##Size, dwordAddress(T0), \
577 test.setDwordTo(T0, V0); \
583 Mask##Size &test.contentsOfDword(T0)) \
593 const uint32_t T0 = allocateDword(); \
596 __ Inst(IceType_i##Size, dwordAddress(T0), Immediate((Imm)&Mask##Size)); \
599 test.setDwordTo(T0, V0); \
605 Mask##Size &test.contentsOfDword(T0)) \
719 const uint32_t T0 = allocateDword(); \
728 dwordAddress(T0)); \
733 test.setDwordTo(T0, V0); \
783 const uint32_t T0 = allocateDword(); \
791 __ Inst0(IceType_i##Size, dwordAddress(T0), \
797 test.setDwordTo(T0, V0); \
806 ASSERT_EQ(Expected0, test.contentsOfDword(T0)) << TestString << ": 0"; \
818 const uint32_t T0 = allocateDword(); \
822 __ Inst0(IceType_i##Size, dwordAddress(T0), \
828 test.setDwordTo(T0, V0); \
837 ASSERT_EQ(Expected0, test.contentsOfDword(T0)) << TestString << ": 0"; \
963 static const uint32_t T0 = allocateDword(); \
976 __ Inst(IceType_i##Size, dwordAddress(T0)); \
986 test.setDwordTo(T0, V0); \
1111 const uint32_t T0 = allocateDword(); \
1116 dwordAddress(T0)); \
1126 test.setDwordTo(T0, static_cast<uint32_t>(Operand1)); \
1244 const uint32_t T0 = allocateDword(); \
1256 __ Inst(IceType_i##Size, dwordAddress(T0)); \
1265 test.setDwordTo(T0, static_cast<uint32_t>(V0)); \
1366 const uint32_t T0 = allocateDword(); \
1369 __ Inst(dwordAddress(T0)); \
1372 test.setDwordTo(T0, V0); \
1376 test.contentsOfDword(T0)); \
1509 const uint32_t T0 = allocateDword(); \
1514 __ Inst(IceType_i##Size, dwordAddress(T0), GPRRegister::Encoded_Reg_ecx); \
1517 test.setDwordTo(T0, V0); \
1521 Mask##Size &test.contentsOfDword(T0)) \
1535 const uint32_t T0 = allocateDword(); \
1541 __ Inst(IceType_i##Size, dwordAddress(T0), \
1545 test.setDwordTo(T0, static_cast<uint32_t>(Value0)); \
1548 ASSERT_EQ(static_cast<uint32_t>(Expected), test.contentsOfDword(T0)) \
1666 const uint32_t T0 = allocateDword(); \
1667 __ neg(IceType_i##Size, dwordAddress(T0)); \
1670 test.setDwordTo(T0, Value &Mask##Size); \
1674 test.contentsOfDword(T0)) \
1833 const uint32_t T0 = allocateDword(); \
1836 dwordAddress(T0)); \
1840 test.setDwordTo(T0, Value1); \