Lines Matching refs:T0

26     const uint32_t T0 = allocateQword();                                       \
32 dwordAddress(T0)); \
40 test.setQwordTo(T0, static_cast<double>(V0)); \
43 test.setDwordTo(T0, static_cast<float>(V0)); \
62 const uint32_t T0 = allocateQword(); \
68 dwordAddress(T0)); \
74 test.setQwordTo(T0, static_cast<double>(V0)); \
77 test.setDwordTo(T0, static_cast<float>(V0)); \
128 const uint32_t T0 = allocateDqword(); \
134 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
140 test.setDqwordTo(T0, V0); \
154 const uint32_t T0 = allocateDqword(); \
160 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
165 test.setDqwordTo(T0, V0); \
179 const uint32_t T0 = allocateDqword(); \
182 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
186 test.setDqwordTo(T0, V0); \
199 const uint32_t T0 = allocateDqword(); \
205 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
211 test.setDqwordTo(T0, V0); \
225 const uint32_t T0 = allocateDqword(); \
231 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
236 test.setDqwordTo(T0, V0); \
398 const uint32_t T0 = allocateDqword(); \
403 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
409 test.setDqwordTo(T0, V0); \
423 const uint32_t T0 = allocateDqword(); \
428 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
433 test.setDqwordTo(T0, V0); \
447 const uint32_t T0 = allocateDqword(); \
452 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
456 test.setDqwordTo(T0, V0); \
470 const uint32_t T0 = allocateDqword(); \
475 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
481 test.setDqwordTo(T0, V0); \
495 const uint32_t T0 = allocateDqword(); \
500 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
505 test.setDqwordTo(T0, V0); \
589 const uint32_t T0 = allocateDqword(); \
597 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
603 test.setDqwordTo(T0, V0); \
618 const uint32_t T0 = allocateDqword(); \
626 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
630 test.setDqwordTo(T0, V0); \
684 const uint32_t T0 = allocateDqword(); \
689 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
695 test.setDqwordTo(T0, V0); \
707 const uint32_t T0 = allocateDqword(); \
712 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
717 test.setDqwordTo(T0, V0); \
729 const uint32_t T0 = allocateDqword(); \
736 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
742 test.setDqwordTo(T0, V0); \
754 const uint32_t T0 = allocateDqword(); \
761 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
766 test.setDqwordTo(T0, V0); \
851 const uint32_t T0 = allocateDqword(); \
854 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
858 test.setDqwordTo(T0, V0); \
908 const uint32_t T0 = allocateDqword(); \
911 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
916 test.setDqwordTo(T0, V0); \
962 const uint32_t T0 = allocateDqword(); \
965 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
971 test.setDqwordTo(T0, V0); \
982 const uint32_t T0 = allocateDqword(); \
985 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
990 test.setDqwordTo(T0, V0); \
1046 const uint32_t T0 = allocateDqword(); \
1049 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1055 test.setDqwordTo(T0, V0_##Ty); \
1067 const uint32_t T0 = allocateDqword(); \
1070 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1074 test.setDqwordTo(T0, V0_##Ty); \
1125 const uint32_t T0 = allocateDqword(); \
1128 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1134 test.setDqwordTo(T0, V0_##Ty); \
1146 const uint32_t T0 = allocateDqword(); \
1149 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1153 test.setDqwordTo(T0, V0_##Ty); \
1202 const uint32_t T0 = allocateDqword(); \
1205 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1211 test.setDqwordTo(T0, V0_##Ty); \
1223 const uint32_t T0 = allocateDqword(); \
1226 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1230 test.setDqwordTo(T0, V0_##Ty); \
1272 const uint32_t T0 = allocateDqword(); \
1275 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1281 test.setDqwordTo(T0, V0); \
1292 const uint32_t T0 = allocateDqword(); \
1295 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1299 test.setDqwordTo(T0, V0); \
1372 const uint32_t T0 = allocateDqword(); \
1375 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1381 test.setDqwordTo(T0, Inst##Size##DstValue); \
1393 const uint32_t T0 = allocateDqword(); \
1395 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1402 test.setDqwordTo(T0, Inst##Size##DstValue); \
1413 const uint32_t T0 = allocateDqword(); \
1417 __ movups(XmmRegister::Encoded_Reg_##Src, dwordAddress(T0)); \
1422 test.setDqwordTo(T0, Inst##Size##SrcValue); \
1434 const uint32_t T0 = allocateDqword(); \
1437 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1442 test.setDqwordTo(T0, Inst##Size##DstValue); \
1454 const uint32_t T0 = allocateDqword(); \
1457 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1462 test.setDqwordTo(T0, Inst##Size##DstValue); \
1474 const uint32_t T0 = allocateDqword(); \
1479 dwordAddress(T0)); \
1482 test.setDqwordTo(T0, Inst##Size##SrcValue); \
1546 const uint32_t T0 = allocateDqword(); \
1553 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1565 test.setDqwordTo(T0, test##Size##DstValue); \
1579 const uint32_t T0 = allocateDqword(); \
1586 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1597 test.setDqwordTo(T0, test##Size##DstValue); \
1660 const uint32_t T0 = allocateDqword(); \
1664 __ movups(XmmRegister::Encoded_Reg_##Src, dwordAddress(T0)); \
1670 test.setDqwordTo(T0, test##Size##SrcValue); \
1684 const uint32_t T0 = allocateDqword(); \
1690 dwordAddress(T0)); \
1693 test.setDqwordTo(T0, test##Size##SrcValue); \
1740 const uint32_t T0 = allocateDqword(); \
1745 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1751 test.setDqwordTo(T0, V0); \
1763 const uint32_t T0 = allocateDqword(); \
1768 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1773 test.setDqwordTo(T0, V0); \
1828 const uint32_t T0 = allocateDqword(); \
1831 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1837 test.setDqwordTo(T0, V0); \
1851 const uint32_t T0 = allocateDqword(); \
1856 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1861 test.setDqwordTo(T0, V0); \
1913 const uint32_t T0 = allocateDqword(); \
1916 __ movups(XmmRegister::Encoded_Reg_##Src, dwordAddress(T0)); \
1921 test.setDqwordTo(T0, V0); \
1962 const uint32_t T0 = allocateDqword(); \
1967 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
1973 test.setDqwordTo(T0, V0); \
1991 const uint32_t T0 = allocateDqword(); \
1996 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
2001 test.setDqwordTo(T0, V0); \
2065 const uint32_t T0 = allocateDqword(); \
2070 __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \
2077 test.setDqwordTo(T0, V0); \