/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 705 int64_t Align = 1LL << scale; local 706 int64_t Max = Align * ((1LL << width) - 1); 707 return ((Val % Align) == 0) && (Val >= 0) && (Val <= Max); 719 int64_t Align = 1LL << scale; local 720 int64_t Max = Align * ((1LL << (width-1)) - 1); 721 int64_t Min = -Align * (1LL << (width-1)); 722 return ((Val % Align) == 0) && (Val >= Min) && (Val <= Max); 4893 unsigned Align = 0; local 4898 case 16: Align = 2; break; 4899 case 32: Align [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 996 unsigned Align = Subtarget.isPPC64() ? 8 : 4; local 998 getMaxByValAlign(Ty, Align, Subtarget.hasQPX() ? 32 : 16); 999 return Align; 1834 unsigned Align = MFI->getObjectAlignment(FrameIdx); local 1835 if (Align >= 4) 2427 // Align GprIndex to be even if it isn't 2754 unsigned Align = PtrByteSize; local 2761 Align = 16; 2765 Align = 32; 2775 Align 2808 unsigned Align = local 3213 unsigned CurArgOffset, Align; local 5103 unsigned Align = local [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 724 InterleaveGroup(Instruction *Instr, int Stride, unsigned Align) argument 725 : Align(Align), SmallestKey(0), LargestKey(0), InsertPos(Instr) { 726 assert(Align && "The alignment should be non-zero"); 737 unsigned getAlignment() const { return Align; } 769 Align = std::min(Align, NewAlign); 801 unsigned Align; member in class:__anon14813::InterleaveGroup 903 unsigned Align) 904 : Stride(Stride), Scev(Scev), Size(Size), Align(Alig 902 StrideDescriptor(int64_t Stride, const SCEV *Scev, uint64_t Size, unsigned Align) argument 912 unsigned Align = 0; // The alignment of this access. member in struct:__anon14813::InterleavedAccessInfo::StrideDescriptor 922 createInterleaveGroup(Instruction *Instr, int Stride, unsigned Align) argument 4959 unsigned Align = LI ? LI->getAlignment() : SI->getAlignment(); local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2412 unsigned Align = MF.getTarget().getFrameLowering()->getStackAlignment(); local 2414 VARegSaveSize = (VARegSize + Align - 1) & ~(Align - 1);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5984 const unsigned Align = MinAlign(LN0->getAlignment(), Offset); local 5990 Align, LN0->getAAInfo()); 7324 unsigned Align = LD1->getAlignment(); local 7328 if (NewAlign <= Align && 7332 false, false, false, Align); 10109 if (unsigned Align = DAG.InferPtrAlignment(Ptr)) { 10110 if (Align > LD->getMemOperand()->getBaseAlignment()) { 10117 LD->isInvariant(), Align, LD->getAAInfo()); 12046 if (unsigned Align = DAG.InferPtrAlignment(Ptr)) { 12047 if (Align > S 12261 unsigned Align = OriginalLoad->getAlignment(); local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1985 unsigned Align) const { 1991 Align = std::max(Align, 4U); 1997 unsigned AlignInRegs = Align / 4; 7571 unsigned Align = MF->getDataLayout().getPrefTypeAlignment(Int32Ty); local 7572 if (Align == 0) 7573 Align = MF->getDataLayout().getTypeAllocSize(C->getType()); 7574 unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align); 7660 unsigned Align = MF->getDataLayout().getPrefTypeAlignment(Int32Ty); local 7661 if (Align 7908 unsigned Align = MI.getOperand(3).getImm(); local 8037 unsigned Align = MF->getDataLayout().getPrefTypeAlignment(Int32Ty); local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1222 unsigned Align = 4; local 1224 getMaxByValAlign(Ty, Align); 1225 return Align; 1831 // Align stack specially for tail calls. 6254 unsigned Align = LN0->getAlignment(); local 6259 if (NewAlign > Align || !TLI.isOperationLegalOrCustom(ISD::LOAD, VT)) 9057 unsigned Align = Op.getConstantOperandVal(3); local 9093 InstOps.push_back(DAG.getConstant(Align, MVT::i32)); 9099 /*Align=*/0, 11365 // 8 ) Align 11379 unsigned Align = MI->getOperand(8).getImm(); local [all...] |
/external/v8/src/ |
H A D | api.cc | 5337 static inline const uint16_t* Align(const uint16_t* chars) { function in namespace:v8 5356 // Align to uintptr_t. 5363 const uint16_t* aligned_end = Align(end);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1785 unsigned Align = 4; local 1787 getMaxByValAlign(Ty, Align); 1788 return Align; 2701 // Align stack specially for tail calls. 16819 unsigned Align = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); local 16841 if (Align > StackAlign) 16843 DAG.getConstant(-(uint64_t)Align, dl, VT)); 16874 if (Align) { 16876 DAG.getConstant(-(uint64_t)Align, dl, VT)); 16960 unsigned Align local 22758 unsigned Align = MI.getOperand(8).getImm(); local 26230 unsigned Align = LN0->getAlignment(); local [all...] |
/external/robolectric/v1/lib/main/ |
H A D | android.jar | META-INF/ META-INF/MANIFEST.MF com/ com/android/ com/android/internal/ com/android/internal/util/ ... |
/external/robolectric/v3/runtime/ |
H A D | android-all-4.1.2_r1-robolectric-0.jar | META-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ... |
H A D | android-all-4.2.2_r1.2-robolectric-0.jar | META-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ... |
H A D | android-all-4.3_r2-robolectric-0.jar | META-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ... |
H A D | android-all-4.4_r1-robolectric-1.jar | META-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ... |
H A D | android-all-5.0.0_r2-robolectric-1.jar | META-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ... |
H A D | android-all-5.1.1_r9-robolectric-1.jar | META-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ... |