/external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
H A D | PTXRegisterInfo.cpp | 35 int SPAdj, 57 DEBUG(dbgs() << "- SPAdj: " << SPAdj << "\n"); 34 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/llvm/lib/Target/AMDGPU/ |
H A D | R600RegisterInfo.cpp | 94 int SPAdj, 93 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/BPF/ |
H A D | BPFRegisterInfo.cpp | 45 int SPAdj, unsigned FIOperandNum, 47 assert(SPAdj == 0 && "Unexpected"); 44 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.cpp | 92 int SPAdj, unsigned FIOperandNum, 94 assert(SPAdj == 0 && "Unexpected"); 91 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 105 int SPAdj, unsigned FIOperandNum, 107 assert(SPAdj == 0 && "Unexpected"); 104 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 67 int SPAdj, unsigned FIOperandNum, 69 assert(SPAdj == 0 && "Outgoing arguments should be part of the frame"); 66 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
H A D | MBlazeRegisterInfo.cpp | 128 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, argument
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
H A D | MipsRegisterInfo.cpp | 244 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, argument
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 74 int SPAdj, RegScavenger *RS) const { 75 assert(SPAdj == 0 && "Unexpected"); 73 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 96 int SPAdj, RegScavenger *RS) const { 97 assert(SPAdj == 0 && "Unxpected"); 95 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 140 /// available and do the appropriate bookkeeping. SPAdj is the stack 144 MachineBasicBlock::iterator I, int SPAdj); 145 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { argument 146 return scavengeRegister(RegClass, MBBI, SPAdj);
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/external/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.cpp | 122 int SPAdj, unsigned FIOperandNum, 124 assert(SPAdj == 0 && "Unexpected SPAdj value"); 121 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/Lanai/ |
H A D | LanaiRegisterInfo.cpp | 136 int SPAdj, unsigned FIOperandNum, 138 assert(SPAdj == 0 && "Unexpected"); 174 Reg = RS->scavengeRegister(&Lanai::GPRRegClass, II, SPAdj); 135 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsRegisterInfo.cpp | 275 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, argument
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 162 int SPAdj, unsigned FIOperandNum, 164 assert(SPAdj == 0 && "Unexpected"); 161 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegisterInfo.cpp | 55 MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, 57 assert(SPAdj == 0); 54 eliminateFrameIndex( MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger * ) const argument
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 115 /// available and do the appropriate bookkeeping. SPAdj is the stack 119 MachineBasicBlock::iterator I, int SPAdj); 120 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { argument 121 return scavengeRegister(RegClass, MBBI, SPAdj);
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
H A D | AlphaRegisterInfo.cpp | 130 int SPAdj, RegScavenger *RS) const { 131 assert(SPAdj == 0 && "Unexpected"); 129 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
H A D | BlackfinRegisterInfo.cpp | 181 int SPAdj) { 185 Reg = RS->scavengeRegister(RC, II, SPAdj); 191 int SPAdj, RegScavenger *RS) const { 209 assert(SPAdj==0 && "Unexpected SP adjust in function with frame pointer"); 212 Offset += MF.getFrameInfo()->getStackSize() + SPAdj; 267 unsigned ScratchReg = findScratchRegister(II, RS, &BF::PRegClass, SPAdj); 282 unsigned ScratchReg = findScratchRegister(II, RS, &BF::DRegClass, SPAdj); 304 unsigned ScratchReg = findScratchRegister(II, RS, &BF::DRegClass, SPAdj); 178 findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, const TargetRegisterClass *RC, int SPAdj) argument 190 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
H A D | SPURegisterInfo.cpp | 254 SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, argument 299 unsigned tmpReg = findScratchRegister(II, RS, &SPU::R32CRegClass, SPAdj); 348 int SPAdj) const 353 Reg = RS->scavengeRegister(RC, II, SPAdj);
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 165 int SPAdj, RegScavenger *RS) const { 166 assert(SPAdj == 0 && "Unexpected"); 164 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 364 int SPAdj, unsigned FIOperandNum, 366 assert(SPAdj == 0 && "Unexpected"); 363 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 159 int SPAdj, unsigned FIOp, 163 assert(SPAdj == 0 && "Unexpected"); 158 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOp, RegScavenger *RS) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 576 int SPAdj, unsigned FIOperandNum, 631 FIOffset += SPAdj; 575 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 262 int SPAdj, unsigned FIOperandNum, 264 assert(SPAdj == 0 && "Unexpected"); 261 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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