1//===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SystemZ implementation of the TargetRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SystemZ.h"
15#include "SystemZInstrInfo.h"
16#include "SystemZMachineFunctionInfo.h"
17#include "SystemZRegisterInfo.h"
18#include "SystemZSubtarget.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineRegisterInfo.h"
23#include "llvm/Target/TargetFrameLowering.h"
24#include "llvm/Target/TargetInstrInfo.h"
25#include "llvm/Target/TargetMachine.h"
26#include "llvm/Target/TargetOptions.h"
27#include "llvm/ADT/BitVector.h"
28
29#define GET_REGINFO_TARGET_DESC
30#include "SystemZGenRegisterInfo.inc"
31
32using namespace llvm;
33
34SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
35                                         const SystemZInstrInfo &tii)
36  : SystemZGenRegisterInfo(0), TM(tm), TII(tii) {
37}
38
39const unsigned*
40SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
41  static const unsigned CalleeSavedRegs[] = {
42    SystemZ::R6D,  SystemZ::R7D,  SystemZ::R8D,  SystemZ::R9D,
43    SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
44    SystemZ::R14D, SystemZ::R15D,
45    SystemZ::F8L,  SystemZ::F9L,  SystemZ::F10L, SystemZ::F11L,
46    SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
47    0
48  };
49
50  return CalleeSavedRegs;
51}
52
53BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
54  BitVector Reserved(getNumRegs());
55  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
56
57  if (TFI->hasFP(MF)) {
58    // R11D is the frame pointer. Reserve all aliases.
59    Reserved.set(SystemZ::R11D);
60    Reserved.set(SystemZ::R11W);
61    Reserved.set(SystemZ::R10P);
62    Reserved.set(SystemZ::R10Q);
63  }
64
65  Reserved.set(SystemZ::R14D);
66  Reserved.set(SystemZ::R15D);
67  Reserved.set(SystemZ::R14W);
68  Reserved.set(SystemZ::R15W);
69  Reserved.set(SystemZ::R14P);
70  Reserved.set(SystemZ::R14Q);
71  return Reserved;
72}
73
74const TargetRegisterClass*
75SystemZRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
76                                              const TargetRegisterClass *B,
77                                              unsigned Idx) const {
78  switch(Idx) {
79  // Exact sub-classes don't exist for the other sub-register indexes.
80  default: return 0;
81  case SystemZ::subreg_32bit:
82    if (B == SystemZ::ADDR32RegisterClass)
83      return A->getSize() == 8 ? SystemZ::ADDR64RegisterClass : 0;
84    return A;
85  }
86}
87
88void SystemZRegisterInfo::
89eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
90                              MachineBasicBlock::iterator I) const {
91  MBB.erase(I);
92}
93
94void
95SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
96                                         int SPAdj, RegScavenger *RS) const {
97  assert(SPAdj == 0 && "Unxpected");
98
99  unsigned i = 0;
100  MachineInstr &MI = *II;
101  MachineFunction &MF = *MI.getParent()->getParent();
102  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
103
104  while (!MI.getOperand(i).isFI()) {
105    ++i;
106    assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
107  }
108
109  int FrameIndex = MI.getOperand(i).getIndex();
110
111  unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
112
113  // This must be part of a rri or ri operand memory reference.  Replace the
114  // FrameIndex with base register with BasePtr.  Add an offset to the
115  // displacement field.
116  MI.getOperand(i).ChangeToRegister(BasePtr, false);
117
118  // Offset is a either 12-bit unsigned or 20-bit signed integer.
119  // FIXME: handle "too long" displacements.
120  int Offset =
121    TFI->getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
122
123  // Check whether displacement is too long to fit into 12 bit zext field.
124  MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset));
125
126  MI.getOperand(i+1).ChangeToImmediate(Offset);
127}
128
129unsigned
130SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
131  assert(0 && "What is the frame register");
132  return 0;
133}
134
135unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
136  assert(0 && "What is the exception register");
137  return 0;
138}
139
140unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
141  assert(0 && "What is the exception handler register");
142  return 0;
143}
144