/external/vixl/test/aarch64/ |
H A D | test-utils-aarch64.h | 112 inline double dreg(unsigned code) const { function in class:vixl::aarch64::RegisterDump
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/external/vixl/test/aarch32/ |
H A D | test-utils-aarch32.cc | 145 const DRegister& dreg) { 146 return Equal64(expected, core, core->GetDRegisterBits(dreg.GetCode())); 236 const DRegister& dreg) { 238 uint64_t result = core->GetDRegisterBits(dreg.GetCode()); 143 Equal64(uint64_t expected, const RegisterDump* core, const DRegister& dreg) argument 234 EqualFP64(double expected, const RegisterDump* core, const DRegister& dreg) argument
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/external/v8/src/ppc/ |
H A D | deoptimizer-ppc.cc | 130 const DoubleRegister dreg = DoubleRegister::from_code(code); local 132 __ stfd(dreg, MemOperand(sp, offset)); 275 const DoubleRegister dreg = DoubleRegister::from_code(code); local 277 __ lfd(dreg, MemOperand(r4, src_offset));
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H A D | simulator-ppc.h | 186 void set_d_register_from_double(int dreg, const double dbl) { argument 187 DCHECK(dreg >= 0 && dreg < kNumFPRs); 188 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; 190 double get_double_from_d_register(int dreg) { argument 191 DCHECK(dreg >= 0 && dreg < kNumFPRs); 192 return *bit_cast<double*>(&fp_registers_[dreg]); 194 void set_d_register(int dreg, int64_t value) { argument 195 DCHECK(dreg > 198 get_d_register(int dreg) argument [all...] |
H A D | macro-assembler-ppc.cc | 245 DoubleRegister dreg = DoubleRegister::from_code(i); local 247 stfd(dreg, MemOperand(location, stack_offset)); 258 DoubleRegister dreg = DoubleRegister::from_code(i); local 259 lfd(dreg, MemOperand(location, stack_offset));
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/external/v8/src/s390/ |
H A D | deoptimizer-s390.cc | 122 const DoubleRegister dreg = DoubleRegister::from_code(code); local 124 __ StoreDouble(dreg, MemOperand(sp, offset)); 273 const DoubleRegister dreg = DoubleRegister::from_code(code); local 275 __ ld(dreg, MemOperand(r3, src_offset));
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H A D | simulator-s390.h | 163 void set_d_register_from_double(int dreg, const double dbl) { argument 164 DCHECK(dreg >= 0 && dreg < kNumFPRs); 165 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; 168 double get_double_from_d_register(int dreg) { argument 169 DCHECK(dreg >= 0 && dreg < kNumFPRs); 170 return *bit_cast<double*>(&fp_registers_[dreg]); 172 void set_d_register(int dreg, int64_t value) { argument 173 DCHECK(dreg > 176 get_d_register(int dreg) argument 181 set_d_register_from_float32(int dreg, const float f) argument 189 get_float32_from_d_register(int dreg) argument [all...] |
H A D | macro-assembler-s390.cc | 220 DoubleRegister dreg = DoubleRegister::from_code(i); local 222 StoreDouble(dreg, MemOperand(location, stack_offset)); 232 DoubleRegister dreg = DoubleRegister::from_code(i); local 233 LoadDouble(dreg, MemOperand(location, stack_offset));
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/external/v8/src/arm/ |
H A D | simulator-arm.h | 149 void set_dw_register(int dreg, const int* dbl); 152 void get_d_register(int dreg, uint64_t* value); 153 void set_d_register(int dreg, const uint64_t* value); 154 void get_d_register(int dreg, uint32_t* value); 155 void set_d_register(int dreg, const uint32_t* value); 165 void set_d_register_from_double(int dreg, const double& dbl) { argument 166 SetVFPRegister<double, 2>(dreg, dbl); 169 double get_double_from_d_register(int dreg) { argument 170 return GetFromVFPRegister<double, 2>(dreg);
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H A D | simulator-arm.cc | 872 void Simulator::set_dw_register(int dreg, const int* dbl) { argument 873 DCHECK((dreg >= 0) && (dreg < num_d_registers)); 874 registers_[dreg] = dbl[0]; 875 registers_[dreg + 1] = dbl[1]; 879 void Simulator::get_d_register(int dreg, uint64_t* value) { argument 880 DCHECK((dreg >= 0) && (dreg < DwVfpRegister::NumRegisters())); 881 memcpy(value, vfp_registers_ + dreg * 2, sizeof(*value)); 885 void Simulator::set_d_register(int dreg, cons argument 891 get_d_register(int dreg, uint32_t* value) argument 897 set_d_register(int dreg, const uint32_t* value) argument [all...] |
/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
H A D | nv50_ir_lowering_nvc0.cpp | 1461 Value *dreg = bld.getSSA(8); local 1463 bld.mkOp2(OP_MERGE, TYPE_U64, dreg, cas->getSrc(1), cas->getSrc(2)); 1464 cas->setSrc(1, dreg); 1465 cas->setSrc(2, dreg);
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/external/valgrind/VEX/priv/ |
H A D | host_arm_isel.c | 3902 HReg dreg = iselNeon64Expr(env, triop->arg1); local 3917 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, res, dreg, 4, False));
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H A D | guest_arm_toIR.c | 2886 UInt dreg = get_neon_d_regno(theInstr); local 2894 putQReg(dreg, triop(Iop_SliceV128, /*hiV128*/getQReg(mreg), 2897 putDRegI64(dreg, triop(Iop_Slice64, /*hiI64*/getDRegI64(mreg), 2900 DIP("vext.8 %c%u, %c%u, %c%u, #%u\n", reg_t, dreg, reg_t, nreg, 2935 UInt dreg = get_neon_d_regno(theInstr & ~(1 << 6)); local 2947 if (dreg >= 0x100 || mreg >= 0x100 || nreg >= 0x100) 2993 getDRegI64(dreg), 2999 putDRegI64(dreg, mkexpr(old_res), condT); 3000 DIP("vtb%c.8 d%u, {", op ? 'x' : 'l', dreg); 3015 UInt dreg local 3075 UInt dreg = get_neon_d_regno(theInstr); local 4889 UInt dreg = get_neon_d_regno(theInstr); local 5306 UInt dreg = get_neon_d_regno(theInstr & ~(1 << 6)); local 5972 UInt dreg = get_neon_d_regno(theInstr); local 6687 UInt dreg = get_neon_d_regno(theInstr); local 7693 DIPimm(UInt imm, UInt cmode, UInt op, const char *instr, UInt Q, UInt dreg) argument 7707 UInt dreg = get_neon_d_regno(theInstr); local [all...] |
/external/mesa3d/src/gallium/drivers/r600/ |
H A D | r600_shader.c | 1003 int dreg = d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ? 3 : 2; local 1017 do_lds_fetch_values(ctx, temp_reg, dreg); 2761 int dreg = ctx->shader->output[output_idx].gpr; local 2776 do_lds_fetch_values(ctx, temp_reg, dreg);
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/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.cc | 4360 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4362 EmitT32_32(0xed300b01U | (rn.GetCode() << 16) | dreg.Encode(22, 12) | 4373 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4376 dreg.Encode(22, 12) | (len & 0xff)); 4394 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4397 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | 4408 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4411 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | 4431 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4433 EmitT32_32(0xed200b01U | (rn.GetCode() << 16) | dreg 4444 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4465 const DRegister& dreg = dreglist.GetFirstDRegister(); local 4479 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19361 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19374 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19432 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19444 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19498 const DRegister& dreg = dreglist.GetFirstDRegister(); local 19511 const DRegister& dreg = dreglist.GetFirstDRegister(); local 22403 const DRegister& dreg = dreglist.GetFirstDRegister(); local 22413 const DRegister& dreg = dreglist.GetFirstDRegister(); local 22454 const DRegister& dreg = dreglist.GetFirstDRegister(); local 22464 const DRegister& dreg = dreglist.GetFirstDRegister(); local 26989 const DRegister& dreg = dreglist.GetFirstDRegister(); local 27002 const DRegister& dreg = dreglist.GetFirstDRegister(); local 27060 const DRegister& dreg = dreglist.GetFirstDRegister(); local 27072 const DRegister& dreg = dreglist.GetFirstDRegister(); local 27126 const DRegister& dreg = dreglist.GetFirstDRegister(); local 27139 const DRegister& dreg = dreglist.GetFirstDRegister(); local [all...] |