Searched defs:dst2 (Results 51 - 62 of 62) sorted by relevance

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/external/v8/src/arm/
H A Dsimulator-arm.cc4979 uint8_t src1[16], src2[16], dst1[16], dst2[16]; local
4985 dst2[i * 2] = src1[i + 8];
4986 dst2[i * 2 + 1] = src2[i + 8];
4989 set_q_register(Vm, dst2);
4993 uint16_t src1[8], src2[8], dst1[8], dst2[8]; local
4999 dst2[i] = src1[i / 2 + 4];
5000 dst2[i + 1] = src2[i / 2 + 4];
5003 set_q_register(Vm, dst2);
5007 uint32_t src1[4], src2[4], dst1[4], dst2[4]; local
5013 dst2[
[all...]
H A Dassembler-arm.cc2113 void Assembler::ldrd(Register dst1, Register dst2, argument
2118 DCHECK_EQ(dst1.code() + 1, dst2.code());
2909 const Register dst2,
2917 DCHECK(!dst1.is(pc) && !dst2.is(pc));
2920 emit(cond | 0xC*B24 | B22 | B20 | dst2.code()*B16 |
2908 vmov(const Register dst1, const Register dst2, const DwVfpRegister src, const Condition cond) argument
/external/vixl/src/aarch64/
H A Dlogic-aarch64.cc429 LogicVRegister dst2,
432 dst2.ClearForWrite(vform);
437 dst2.ReadUintFromMem(vform, i, addr2);
446 LogicVRegister dst2,
450 dst2.ClearForWrite(vform);
453 dst2.ReadUintFromMem(vform, index, addr2);
459 LogicVRegister dst2,
462 dst2.ClearForWrite(vform);
466 dst2.ReadUintFromMem(vform, i, addr2);
473 LogicVRegister dst2,
427 ld2(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, uint64_t addr1) argument
444 ld2(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, int index, uint64_t addr1) argument
457 ld2r(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, uint64_t addr) argument
471 ld3(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, uint64_t addr1) argument
493 ld3(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, int index, uint64_t addr1) argument
510 ld3r(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, uint64_t addr) argument
528 ld4(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, uint64_t addr1) argument
555 ld4(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, int index, uint64_t addr1) argument
576 ld4r(VectorFormat vform, LogicVRegister dst1, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, uint64_t addr) argument
614 st2(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, uint64_t addr) argument
629 st2(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, int index, uint64_t addr) argument
640 st3(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, uint64_t addr) argument
659 st3(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, int index, uint64_t addr) argument
672 st4(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, uint64_t addr) argument
695 st4(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, int index, uint64_t addr) argument
[all...]
/external/v8/src/arm64/
H A Dmacro-assembler-arm64.cc896 const CPURegister& dst2, const CPURegister& dst3) {
899 DCHECK(!AreAliased(dst0, dst1, dst2, dst3));
900 DCHECK(AreSameSizeAndType(dst0, dst1, dst2, dst3));
903 int count = 1 + dst1.IsValid() + dst2.IsValid() + dst3.IsValid();
906 PopHelper(count, size, dst0, dst1, dst2, dst3);
912 const CPURegister& dst2, const CPURegister& dst3,
917 DCHECK(!AreAliased(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7));
918 DCHECK(AreSameSizeAndType(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7));
924 PopHelper(4, size, dst0, dst1, dst2, dst3);
1022 const CPURegister& dst2 local
895 Pop(const CPURegister& dst0, const CPURegister& dst1, const CPURegister& dst2, const CPURegister& dst3) argument
911 Pop(const CPURegister& dst0, const CPURegister& dst1, const CPURegister& dst2, const CPURegister& dst3, const CPURegister& dst4, const CPURegister& dst5, const CPURegister& dst6, const CPURegister& dst7) argument
1155 PopHelper(int count, int size, const CPURegister& dst0, const CPURegister& dst1, const CPURegister& dst2, const CPURegister& dst3) argument
1269 PeekPair(const CPURegister& dst1, const CPURegister& dst2, int offset) argument
[all...]
/external/v8/src/s390/
H A Dmacro-assembler-s390.cc4699 void MacroAssembler::LoadMultipleP(Register dst1, Register dst2, argument
4703 lmg(dst1, dst2, mem);
4706 lm(dst1, dst2, mem);
4709 lmy(dst1, dst2, mem);
4729 void MacroAssembler::LoadMultipleW(Register dst1, Register dst2, argument
4732 lm(dst1, dst2, mem);
4735 lmy(dst1, dst2, mem);
/external/valgrind/VEX/priv/
H A Dguest_s390_toIR.c7222 IRTemp dst2 = newTemp(Ity_D64); local
7305 assign(dst2, binop(Iop_F32toD64, irrm, mkexpr(src2)));
7306 put_dpr_dw0(0, mkexpr(dst2)); /* put the result in FPR 0,2 */
/external/robolectric/v3/runtime/
H A Dandroid-all-4.1.2_r1-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.2.2_r1.2-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.3_r2-robolectric-0.jarMETA-INF/ META-INF/MANIFEST.MF android/ android/accessibilityservice/ android/accessibilityservice/AccessibilityService$1.class ...
H A Dandroid-all-4.4_r1-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...
H A Dandroid-all-5.0.0_r2-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...
H A Dandroid-all-5.1.1_r9-robolectric-1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/android/ com/google/android/collect/ ...

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