Searched defs:imm8 (Results 26 - 36 of 36) sorted by relevance

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/external/v8/src/x64/
H A Dassembler-x64.cc989 void Assembler::cmpb_al(Immediate imm8) { argument
990 DCHECK(is_int8(imm8.value_) || is_uint8(imm8.value_));
993 emit(imm8.value_);
2816 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument
2818 DCHECK(is_uint8(imm8));
2826 emit(imm8);
2829 void Assembler::pextrb(Register dst, XMMRegister src, int8_t imm8) { argument
2831 DCHECK(is_uint8(imm8));
2839 emit(imm8);
2842 pextrb(const Operand& dst, XMMRegister src, int8_t imm8) argument
2855 pinsrw(XMMRegister dst, Register src, int8_t imm8) argument
2866 pinsrw(XMMRegister dst, const Operand& src, int8_t imm8) argument
2877 pextrw(Register dst, XMMRegister src, int8_t imm8) argument
2888 pextrw(const Operand& dst, XMMRegister src, int8_t imm8) argument
2901 pextrd(Register dst, XMMRegister src, int8_t imm8) argument
2913 pextrd(const Operand& dst, XMMRegister src, int8_t imm8) argument
2925 pinsrd(XMMRegister dst, Register src, int8_t imm8) argument
2938 pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) argument
2950 pinsrb(XMMRegister dst, Register src, int8_t imm8) argument
2962 pinsrb(XMMRegister dst, const Operand& src, int8_t imm8) argument
2974 insertps(XMMRegister dst, XMMRegister src, byte imm8) argument
3038 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument
3280 psllq(XMMRegister reg, byte imm8) argument
3292 psrlq(XMMRegister reg, byte imm8) argument
3303 psllw(XMMRegister reg, byte imm8) argument
3313 pslld(XMMRegister reg, byte imm8) argument
3323 psrlw(XMMRegister reg, byte imm8) argument
3333 psrld(XMMRegister reg, byte imm8) argument
3343 psraw(XMMRegister reg, byte imm8) argument
3353 psrad(XMMRegister reg, byte imm8) argument
4361 rorxq(Register dst, Register src, byte imm8) argument
4373 rorxq(Register dst, const Operand& src, byte imm8) argument
4385 rorxl(Register dst, Register src, byte imm8) argument
4397 rorxl(Register dst, const Operand& src, byte imm8) argument
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H A Dmacro-assembler-x64.cc3310 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { argument
3311 if (imm8 == 0) {
3317 pextrd(dst, src, imm8);
3320 DCHECK_EQ(1, imm8);
3326 void MacroAssembler::Pinsrd(XMMRegister dst, Register src, int8_t imm8) { argument
3329 pinsrd(dst, src, imm8);
3333 if (imm8 == 1) {
3336 DCHECK_EQ(0, imm8);
3342 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { argument
3343 DCHECK(imm8
[all...]
/external/valgrind/VEX/priv/
H A Dhost_arm_defs.h160 ARMam2_RI=3, /* reg +/- imm8 */
236 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */
246 UShort imm8; member in struct:__anon28286::__anon28287::__anon28288
256 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 );
291 /* imm8 = abcdefgh, B = NOT(b);
316 UInt imm8; member in struct:__anon28295
320 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
H A Dguest_arm_toIR.c2485 IRExpr* mk_EA_reg_plusminus_imm8 ( UInt rN, UInt bU, UInt imm8, argument
2490 vassert(imm8 < 0x100);
2492 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm8);
2496 mkU32(imm8) );
2596 UInt imm1, UInt imm3, UInt imm8 )
2600 vassert(imm8 < (1<<8));
2601 UInt i_imm3_a = (imm1 << 4) | (imm3 << 1) | ((imm8 >> 7) & 1);
2602 UInt abcdefgh = imm8;
2603 UInt lbcdefgh = imm8 | 0x80;
2635 UInt imm8 local
14810 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
14826 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
16808 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local
17930 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local
18372 UInt imm8 = (imm4H << 4) | imm4L; local
18428 UInt imm8 = (imm4H << 4) | imm4L; local
18484 UInt imm8 = (imm4H << 4) | imm4L; local
18590 UInt imm8 = (imm4H << 4) | imm4L; local
19817 UInt imm8 = INSN0(7,0); local
20313 UInt imm8 = INSN0(7,0); local
20325 UInt imm8 = INSN0(7,0); local
20367 UInt imm8 = INSN0(7,0); local
20464 UInt imm8 = INSN0(7,0); local
21608 UInt imm8 = INSN1(7,0); local
22076 UInt imm8 = INSN1(7,0); local
22885 UInt imm8 = INSN1(7,0); local
22950 UInt imm8 = INSN1(7,0); local
23088 UInt imm8 = INSN1(7,0); local
23164 UInt imm8 = INSN1(7,0); local
23187 UInt imm8 = INSN1(7,0); local
23208 UInt imm8 = INSN1(7,0); local
23237 UInt imm8 = INSN1(7,0); local
23266 UInt imm8 = INSN1(7,0); local
23288 UInt imm8 = INSN1(7,0); local
23310 UInt imm8 = INSN1(7,0); local
23335 UInt imm8 = INSN1(7,0); local
23371 UInt imm8 = INSN1(7,0); local
[all...]
H A Dguest_x86_toIR.c6092 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */
7293 Int imm8, Bool all_lanes, Int sz )
7295 imm8 &= 7;
7298 if (imm8 >= 4) {
7300 imm8 -= 4;
7304 switch (imm8) {
7313 switch (imm8) {
7322 switch (imm8) {
7331 switch (imm8) {
7348 Int alen, imm8; local
7292 findSSECmpOp( Bool* needNot, IROp* op, Int imm8, Bool all_lanes, Int sz ) argument
[all...]
H A Dguest_arm64_toIR.c7325 |imm8| to either a 32-bit value if N is 32 or a 64 bit value if N
7328 static ULong VFPExpandImm ( ULong imm8, Int N ) argument
7330 vassert(imm8 <= 0xFF);
7334 ULong imm8_6 = (imm8 >> 6) & 1;
7338 ULong sign = (imm8 >> 7) & 1;
7340 ULong frac = ((imm8 & 63) << (F-6)) | Replicate(0, F-6);
7353 UInt op, UInt cmode, UInt imm8 )
7357 vassert(imm8 <= 255);
7366 testimm8 = False; imm64 = Replicate32x2(imm8); break;
7368 testimm8 = True; imm64 = Replicate32x2(imm8 <<
9553 IRTemp imm8 = newTemp(Ity_I8); local
10764 IRTemp imm8 = newTemp(Ity_I8); local
13951 UInt imm8 = INSN(20,13); local
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H A Dguest_amd64_toIR.c7764 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */
9214 UInt imm8, Bool all_lanes, Int sz )
9216 if (imm8 >= 32) return False;
9219 the supplied imm8. */
9229 switch (imm8) {
9284 /* Don't forget to add test cases to VCMPSS_128_<imm8> in
9349 UInt imm8; local
9359 imm8 = getUChar(delta+1);
9360 if (imm8 >= 8) return delta0; /* FAIL */
9361 Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lane
9211 findSSECmpOp( Bool* preSwapP, IROp* opP, Bool* postNotP, UInt imm8, Bool all_lanes, Int sz ) argument
11458 UInt imm8; local
11513 UInt imm8; local
11560 UInt imm8; local
14483 Int imm8 = 0; local
19004 Int imm8; local
19445 Int imm8; local
19482 Int imm8; local
19518 Int imm8; local
19607 Int imm8; local
19638 UInt imm8; local
19743 Int imm8; local
19776 Int imm8; local
19808 Int imm8; local
19846 Int imm8; local
23474 UInt imm8; local
23584 UInt imm8; local
26590 Int imm8; local
26634 Int imm8 = 0; local
26664 Int imm8 = 0; local
26694 Int imm8 = 0; local
26724 Int imm8 = 0; local
30416 UInt imm8 = 0; local
30455 UInt imm8 = 0; local
30495 UInt imm8 = 0; local
30538 UInt imm8 = 0; local
30568 UInt imm8 = 0; local
30596 UInt imm8 = 0; local
30629 UInt imm8 = 0; local
30667 UInt imm8 = 0; local
30969 UInt imm8; local
31000 UInt imm8; local
31034 UInt imm8; local
31065 UInt imm8; local
31099 UInt imm8; local
31130 UInt imm8; local
31173 UInt imm8; local
31208 UInt imm8; local
31357 Int imm8; local
31392 UInt imm8; local
31567 Int imm8; local
31597 Int imm8; local
31635 Int imm8; local
31666 Int imm8; local
31701 Int imm8; local
31748 Int imm8; local
31784 UInt imm8 = 0; local
31938 UChar imm8; local
[all...]
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc4338 uint64_t imm8 = instr->GetImmNEONabcdefgh(); local
4349 imm = imm8 << (8 * cmode_3_1);
4354 imm = imm8 << (8 * cmode_1);
4359 imm = imm8 << 8 | 0x000000ff;
4361 imm = imm8 << 16 | 0x0000ffff;
4367 imm = imm8;
4372 if (imm8 & (1 << i)) {
H A Dmacro-assembler-aarch64.h2486 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { argument
2489 bic(vd, imm8, left_shift);
2684 const int imm8,
2689 mvni(vd, imm8, shift, shift_amount);
2691 void Orr(const VRegister& vd, const int imm8, const int left_shift = 0) { argument
2694 orr(vd, imm8, left_shift);
2683 Mvni(const VRegister& vd, const int imm8, Shift shift = LSL, const int shift_amount = 0) argument
/external/v8/src/arm/
H A Dassembler-arm.cc1103 uint32_t imm8 = base::bits::RotateLeft32(imm32, 2 * rot); local
1104 if ((imm8 <= 0xff)) {
1106 *immed_8 = imm8;
/external/vixl/src/aarch32/
H A Ddisasm-aarch32.cc7209 // MOV<c>{<q>} <Rd>, #<imm8> ; T1
7212 // MOVS{<q>} <Rd>, #<imm8> ; T1
7223 // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
7232 // ADD<c>{<q>} <Rdn>, #<imm8> ; T2
7235 // ADD<c>{<q>} {<Rdn>}, <Rdn>, #<imm8> ; T2
7238 // ADDS{<q>} <Rdn>, #<imm8> ; T2
7241 // ADDS{<q>} {<Rdn>}, <Rdn>, #<imm8> ; T2
7253 // SUB<c>{<q>} <Rdn>, #<imm8> ; T2
7256 // SUB<c>{<q>} {<Rdn>}, <Rdn>, #<imm8> ; T2
7259 // SUBS{<q>} <Rdn>, #<imm8> ; T
22697 unsigned imm8 = (instr & 0xff); local
22717 unsigned imm8 = (instr & 0xff); local
22865 unsigned imm8 = (instr & 0xff); local
22881 unsigned imm8 = (instr & 0xff); local
22901 unsigned imm8 = (instr & 0xff); local
23071 unsigned imm8 = (instr & 0xff); local
23087 unsigned imm8 = (instr & 0xff); local
23107 unsigned imm8 = (instr & 0xff); local
23313 unsigned imm8 = (instr & 0xff); local
23333 unsigned imm8 = (instr & 0xff); local
65504 unsigned imm8 = (instr & 0xff); local
65529 unsigned imm8 = (instr & 0xff); local
65700 unsigned imm8 = (instr & 0xff); local
65717 unsigned imm8 = (instr & 0xff); local
65742 unsigned imm8 = (instr & 0xff); local
65944 unsigned imm8 = (instr & 0xff); local
65960 unsigned imm8 = (instr & 0xff); local
65984 unsigned imm8 = (instr & 0xff); local
66214 unsigned imm8 = (instr & 0xff); local
66238 unsigned imm8 = (instr & 0xff); local
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