Searched defs:inst (Results 1 - 25 of 310) sorted by relevance

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/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dtoy_optimize.c38 struct toy_inst *inst; local
41 while ((inst = tc_next(tc)) != NULL) {
42 switch (inst->opcode) {
55 if (tdst_is_null(inst->dst) || !inst->dst.writemask) {
57 if ((inst->opcode == GEN6_OPCODE_MATH ||
58 inst->cond_modifier == GEN6_COND_NONE) &&
59 !inst->acc_wr_ctrl)
60 tc_discard_inst(tc, inst);
/external/clang/test/Index/
H A Dcursor-ref-names.cpp17 Sub inst; local
18 inst.func();
19 inst[1];
20 inst.operator[](1);
22 inst.Base<int>::operator[](1);
30 // CHECK: cursor-ref-names.cpp:17:9: VarDecl=inst:17:9 (Definition) Extent=[17:5 - 17:13]
35 // CHECK: cursor-ref-names.cpp:18:5: DeclRefExpr=inst:17:9 Extent=[18:5 - 18:9]
37 // CHECK: cursor-ref-names.cpp:19:5: DeclRefExpr=inst:17:9 Extent=[19:5 - 19:9]
41 // CHECK: cursor-ref-names.cpp:20:5: DeclRefExpr=inst:17:9 Extent=[20:5 - 20:9]
44 // CHECK: cursor-ref-names.cpp:22:5: DeclRefExpr=inst
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/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_opcodes.c529 const struct rc_instruction *inst,
533 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
581 switch (inst->U.I.TexSrcTarget) {
598 switch (inst->U.I.TexSrcTarget) {
528 rc_compute_sources_for_writemask( const struct rc_instruction *inst, unsigned int writemask, unsigned int *srcmasks) argument
H A Dradeon_pair_dead_sources.c46 struct rc_instruction * inst,
54 inst->U.P.RGB.Src[sub->Arg[i].Source].Used = 1;
58 inst->U.P.Alpha.Src[sub->Arg[i].Source].Used = 1;
69 struct rc_instruction * inst; local
70 for (inst = c->Program.Instructions.Next;
71 inst != &c->Program.Instructions;
72 inst = inst->Next) {
74 if (inst->Type == RC_INSTRUCTION_NORMAL)
79 inst
45 mark_used( struct rc_instruction * inst, struct rc_pair_sub_instruction * sub) argument
[all...]
H A Dradeon_rename_regs.c50 struct rc_instruction * inst; local
56 for(inst = c->Program.Instructions.Next;
57 inst != &c->Program.Instructions;
58 inst = inst->Next) {
59 if (inst->U.I.Opcode == RC_OPCODE_BGNLOOP)
/external/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_opt_coalesce_ff_writes.c45 qir_for_each_inst_inorder(inst, c) {
46 for (int i = 0; i < qir_get_nsrc(inst); i++) {
47 if (inst->src[i].file == QFILE_TEMP) {
48 uint32_t temp = inst->src[i].index;
67 struct qinst *inst = c->defs[temp]; local
68 if (!inst)
75 if (qir_is_tex(mov_inst) && qir_has_uniform_read(inst))
78 if (qir_depends_on_flags(inst) || inst->sf)
81 if (qir_has_side_effects(c, inst) ||
[all...]
H A Dvc4_qir_validate.c28 fail_instr(struct vc4_compile *c, struct qinst *inst, const char *msg) argument
31 qir_dump_inst(c, inst);
56 qir_for_each_inst_inorder(inst, c) {
57 switch (inst->dst.file) {
59 if (inst->dst.index >= c->num_temps)
60 fail_instr(c, inst, "bad temp index");
62 if (c->defs[inst->dst.index] &&
63 already_assigned[inst->dst.index]) {
64 fail_instr(c, inst, "Re-assignment of SSA value");
66 already_assigned[inst
[all...]
H A Dvc4_opt_constant_folding.c37 dump_from(struct vc4_compile *c, struct qinst *inst) argument
43 qir_dump_inst(c, inst);
48 dump_to(struct vc4_compile *c, struct qinst *inst) argument
54 qir_dump_inst(c, inst);
59 constant_fold(struct vc4_compile *c, struct qinst *inst) argument
61 int nsrc = qir_get_nsrc(inst);
65 struct qreg reg = inst->src[i];
77 switch (inst->op) {
86 dump_from(c, inst);
88 inst
[all...]
H A Dvc4_opt_copy_propagation.c38 is_copy_mov(struct qinst *inst) argument
40 if (!inst)
43 if (inst->op != QOP_MOV &&
44 inst->op != QOP_FMOV &&
45 inst->op != QOP_MMOV) {
49 if (inst->dst.file != QFILE_TEMP)
52 if (inst->src[0].file != QFILE_TEMP &&
53 inst->src[0].file != QFILE_UNIF) {
57 if (inst->dst.pack || inst
65 try_copy_prop(struct vc4_compile *c, struct qinst *inst, struct qinst **movs) argument
157 apply_kills(struct vc4_compile *c, struct qinst **movs, struct qinst *inst) argument
[all...]
H A Dvc4_opt_dead_code.c43 dce(struct vc4_compile *c, struct qinst *inst) argument
47 qir_dump_inst(c, inst);
50 assert(!inst->sf);
51 qir_remove_instruction(c, inst);
55 has_nonremovable_reads(struct vc4_compile *c, struct qinst *inst) argument
57 for (int i = 0; i < qir_get_nsrc(inst); i++) {
58 if (inst->src[i].file == QFILE_VPM) {
59 uint32_t attr = inst->src[i].index / 4;
60 uint32_t offset = (inst->src[i].index % 4) * 4;
75 if (inst
[all...]
/external/swiftshader/third_party/PowerVR_SDK/Tools/
H A DPVRTSingleton.h29 static T& inst() function in class:CPVRTSingleton
37 return &inst();
/external/vulkan-validation-layers/loader/
H A Dgpa_helper.h26 static inline void *trampolineGetProcAddr(struct loader_instance *inst, const char *funcName) { argument
168 if (debug_report_instance_gpa(inst, funcName, &addr)) return addr;
170 if (wsi_swapchain_instance_gpa(inst, funcName, &addr)) return addr;
172 if (extension_instance_gpa(inst, funcName, &addr)) return addr;
175 if (loader_phys_dev_ext_gpa(inst, funcName, true, &addr, NULL)) return addr;
178 addr = loader_dev_ext_gpa(inst, funcName);
/external/jacoco/org.jacoco.agent.rt/src/org/jacoco/agent/rt/internal/
H A DPreMain.java35 * @param inst
40 public static void premain(final String options, final Instrumentation inst) argument
47 final IRuntime runtime = createRuntime(inst);
49 inst.addTransformer(new CoverageTransformer(runtime, agentOptions,
53 private static IRuntime createRuntime(final Instrumentation inst) argument
55 return ModifiedSystemClassRuntime.createFor(inst, "java/lang/UnknownError");
/external/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_asm.c36 check_uniforms(const struct etna_inst *inst) argument
43 const struct etna_inst_src *src = &inst->src[i];
62 etna_assemble(uint32_t *out, const struct etna_inst *inst) argument
65 if (inst->imm && inst->src[2].use)
68 if (!check_uniforms(inst))
71 out[0] = VIV_ISA_WORD_0_OPCODE(inst->opcode) |
72 VIV_ISA_WORD_0_COND(inst->cond) |
73 COND(inst->sat, VIV_ISA_WORD_0_SAT) |
74 COND(inst
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/external/mesa3d/src/mesa/program/
H A Dprogram_parse_extra.c39 struct prog_instruction *inst)
41 inst->Saturate = GL_FALSE;
48 inst->Saturate = GL_TRUE;
37 _mesa_parse_instruction_suffix(const struct asm_parser_state *state, const char *suffix, struct prog_instruction *inst) argument
/external/tensorflow/tensorflow/compiler/tf2xla/
H A Dtest_util.cc32 InstantiationResult inst; local
34 InstantiateFunction(*fdef, AttrSlice(), get_func_sig, &inst));
35 result->arg_types = inst.arg_types;
36 result->ret_types = inst.ret_types;
37 for (NodeDef& n : inst.nodes) {
/external/mesa3d/src/compiler/glsl/
H A Dlower_vertex_id.cpp111 ir_instruction *const inst = local
115 main_sig->body.push_head(inst);
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_action.h87 const struct tgsi_full_instruction * inst; member in struct:lp_build_emit_data
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
H A Dradeon_compiler_optimize_tests.c56 struct rc_instruction *inst; local
67 for(inst = c.Program.Instructions.Next;
68 inst != &c.Program.Instructions;
69 inst = inst->Next, inst_count++) {
70 inst_list[inst_count] = inst;
H A Dradeon_compiler_regalloc_tests.c53 struct rc_instruction *inst; local
67 for(inst = c->Program.Instructions.Next;
68 inst != &c->Program.Instructions;
69 inst = inst->Next) {
70 if (inst->Type == RC_INSTRUCTION_NORMAL &&
71 inst->U.I.Opcode != RC_OPCODE_BEGIN_TEX) {
72 if (GET_SWZ(inst->U.I.SrcReg[0].Swizzle, 0)
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_dead_control_flow.cpp49 backend_instruction *const inst = block->start(); local
55 if (inst->opcode == BRW_OPCODE_ENDIF &&
62 } else if (inst->opcode == BRW_OPCODE_ENDIF &&
66 backend_instruction *const endif_inst = inst;
99 } else if (inst->opcode == BRW_OPCODE_ELSE &&
103 backend_instruction *const else_inst = inst;
H A Dbrw_fs_dead_code_eliminate.cpp41 can_eliminate(const fs_inst *inst, BITSET_WORD *flag_live) argument
43 return !inst->is_control_flow() &&
44 !inst->has_side_effects() &&
45 !(flag_live[0] & inst->flags_written()) &&
46 !inst->writes_accumulator;
53 can_omit_write(const fs_inst *inst) argument
55 switch (inst->opcode) {
65 if (inst->opcode < 128 && inst->mlen == 0)
90 foreach_inst_in_block_reverse_safe(fs_inst, inst, bloc
[all...]
/external/tensorflow/tensorflow/compiler/xla/service/
H A Dhlo_matchers.cc137 void PrintTo(const HloInstruction* inst, ::std::ostream* os) { argument
138 *os << (inst ? inst->ToString() : "nullptr");
141 void PrintTo(HloInstruction* inst, ::std::ostream* os) { argument
142 PrintTo(const_cast<const HloInstruction*>(inst), os);
/external/vulkan-validation-layers/tests/
H A Dtest_environment.h44 VkInstance get_instance() { return inst; }
50 VkInstance inst; member in class:vk_testing::Environment
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_emulate.c105 struct tgsi_full_instruction *inst)
120 for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
123 if (inst->Dst[i].Register.File != TGSI_FILE_OUTPUT ||
124 inst->Dst[i].Register.Indirect)
128 ctx->info.output_semantic_name[inst->Dst[i].Register.Index];
132 inst->Instruction.Saturate = true;
136 tctx->emit_instruction(tctx, inst);
104 transform_instr(struct tgsi_transform_context *tctx, struct tgsi_full_instruction *inst) argument

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