Searched defs:instr1 (Results 1 - 9 of 9) sorted by relevance

/external/mesa3d/src/compiler/nir/
H A Dnir_instr_set.c254 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) argument
256 if (instr1->type != instr2->type)
259 switch (instr1->type) {
261 nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
293 nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
327 nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
340 nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
360 nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
/external/v8/src/arm64/
H A Dcode-stubs-arm64.h104 Instruction* instr1 = local
106 Instruction* instr2 = instr1->following();
108 if (instr1->IsUncondBranchImm()) {
113 DCHECK(instr1->IsPCRelAddressing() && (instr1->Rd() == xzr.code()));
136 Instruction* instr1 = patcher.InstructionAt(0); local
139 DCHECK(instr1->IsPCRelAddressing() || instr1->IsUncondBranchImm());
143 static_cast<int32_t>(instr1->ImmPCOffset());
/external/v8/src/mips/
H A Dassembler-mips-inl.h159 Instr instr1 = Assembler::instr_at(pc + 0 * Assembler::kInstrSize); local
161 DCHECK(Assembler::IsLui(instr1));
163 instr1 &= ~kImm16Mask;
173 instr1 | lui_offset_u);
179 instr1 | ((imm >> kLuiShift) & kImm16Mask));
244 Instr instr1 = Assembler::instr_at(pc_ + 0 * Assembler::kInstrSize); local
246 DCHECK(Assembler::IsLui(instr1));
250 Assembler::CreateTargetAddress(instr1, instr2));
252 int32_t imm = (instr1 & static_cast<int32_t>(kImm16Mask)) << kLuiShift;
H A Dassembler-mips.cc801 Instr instr1 = instr_at(pos + 0 * Assembler::kInstrSize);
806 imm = CreateTargetAddress(instr1, instr2);
808 imm = (instr1 & static_cast<int32_t>(kImm16Mask)) << kLuiShift;
863 Instr instr1 = instr_at(pos + 0 * Assembler::kInstrSize);
868 DCHECK(IsLui(instr1) && (IsJicOrJialc(instr2) || IsOri(instr2)));
869 instr1 &= ~kImm16Mask;
875 instr_at_put(pos + 0 * Assembler::kInstrSize, instr1 | lui_offset_u);
879 instr1 | ((imm & kHiMask) >> kLuiShift));
2973 Instr instr1 = instr_at(pc + 0 * Assembler::kInstrSize); local
2978 imm = CreateTargetAddress(instr1, instr
3212 Instr instr1 = instr_at(pc); local
3255 Instr instr1 = instr_at(pc); local
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/external/v8/src/ppc/
H A Dassembler-ppc-inl.h454 Instr instr1 = instr_at(pc); local
457 if (IsLis(instr1) && IsOri(instr2)) {
462 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) |
469 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) |
573 Instr instr1 = instr_at(pc); local
575 instr1 &= ~kImm16Mask;
576 instr1 |= (hi_word & kImm16Mask);
579 instr_at_put(pc, instr1);
634 Instr instr1 = instr_at(pc); local
637 if (IsLis(instr1)
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H A Dassembler-ppc.cc333 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, argument
341 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c) &&
347 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { argument
351 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c));
/external/tensorflow/tensorflow/compiler/xla/service/
H A Dhlo_verifier.cc540 Status ShapeVerifier::CheckSameChannel(const HloInstruction* instr1, argument
542 if (instr1->channel_id() != instr2->channel_id()) {
546 instr1->ToString().c_str(), instr1->channel_id(),
/external/v8/src/s390/
H A Dassembler-s390.cc345 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { argument
347 return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9));
/external/v8/src/mips64/
H A Dassembler-mips64.cc3457 Instr instr1 = instr_at(pc + 1 * kInstrSize); local
3462 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) &&
3467 ((uint64_t)(GetImmediate16(instr1)) << 16) |
3509 Instr instr1 = instr_at(pc + kInstrSize); local
3510 uint32_t rt_code = GetRt(instr1);
3518 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI &&

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